JPH07255035A - Television signal processor - Google Patents

Abstract

PURPOSE:To obtain a reception part which is improved in crosstalk between a digital signal orthogonally multiplexed with a video signal (digital audio signal), and the video signal. CONSTITUTION:The digital audio signal and video signal are detected and led out of multipliers 1301 and 1302 in orthogonal relation. The video signal has its ghost canceled by a ghost canceller part 1402 and is supplied to a decoder 6000. The audio signal has its DC component removed by a differentiator 1420 and its waveform equalized by waveform equalizer parts 1426 and 1427 and is inputted to an adder 1428. The video signal, on the other hand, has its DC component removed by a differentiator 1403 and its waveform equalized by waveform equalizers 1408 and 1409 to become a cancellation signal for the audio system, which is supplied to the adder 1428.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION This invention is based on the existing method (for example, N
The present invention relates to a television signal processing device for processing a high-definition television signal compatible with the TSC system), and particularly to a device effective for processing a signal in which a digital audio signal or the like is multiplexed with a video signal.

[0002]

2. Description of the Related Art Systems have been developed for transmitting and receiving high definition television signals that are compatible with current systems.
Signals handled by this transmission / reception system include a side panel system and a lator box system.

The side panel system has an aspect ratio of 16:
High-definition television signal of 9: 4: 3 only in the center part
It is cut at the aspect ratio and is used as the main signal according to the standard of the current system signal, and the signals of the left and right side parts are transmitted by being multiplexed with the main signal. Therefore, when it is received by the television receiver of the current system, the main signal of 4: 3 is displayed on the full screen. When received by a receiver with a high definition television signal decoder,
The signal in the side portion is demodulated and connected to the left and right of the main signal to reproduce an image signal with a wide aspect ratio of 16: 9.

On the other hand, in the letterbox system, a television signal having an aspect ratio of 16: 9 is vertically compressed,
It is processed so as to fit on a screen with an aspect ratio of 4: 3 and transmitted as a main signal. In addition, an extra high resolution signal generated due to compression is multiplexed and transmitted to upper and lower mask portions generated above and below the main signal, for example. Therefore, when the television signal of this system is received and reproduced by the receiver of the current system, the mask (black) part appears at the top and bottom of the screen,
The screen becomes a horizontally long video screen. When the signal is received by a receiver with a high-definition television signal decoder, the high-resolution signals of the upper and lower mask parts are reproduced and the main signal is expanded vertically, and the high-resolution signal is added to this. As a result, an image signal having a wide aspect ratio of 16: 9 is obtained.

By the way, in the above side panel system, when the current television receiver is used, the cut side portion cannot be seen, and the program is produced on the assumption that the side portion is also cut on the broadcast side. Must. Also, the cutting of the side part is a problem in terms of copyright on the program production side. On the other hand, the letterbox method can see all wide screens with the current method, but when viewed with current television receivers, the proportion of the upper and lower mask parts is large and it is not complained that the effective use of the entire screen is lacking. is there.

Therefore, recently, an intermediate system has been proposed in which a wide-screen television signal is transmitted with a little side cut in order to reduce the vertical compression ratio and to match the aspect ratio of 4: 3. According to this method, the proportion of the upper and lower mask portions is small and the proportion of the side portions that are cut is small when viewed with the current television receiver, and both the letterbox method and the side panel method are alleviated. It can be said that the method has found a compromise.

[0007]

As described above, various television signals currently exist.

When television signals are diversified in this way, various systems may be introduced to transmit digital data and digital audio signals accompanying them. That is, in the intermediate system, it is conceivable that the audio signal is transmitted in the same way as in the current system and the digital audio signal is transmitted in another route for improving the sound quality, for example, orthogonally multiplexed with the television signal. .. In such a case as well, a function is desired that allows the user to identify the route of the audio signal currently output from the speaker or allows the user to arbitrarily select the route.
In such a case, it is necessary to consider a problem such as crosstalk between the digital audio signal and the video signal.

The present invention has been made in order to cope with the various situations described above, and has improved crosstalk between a digital signal (digital audio signal) orthogonally multiplexed with a video signal and the video signal. An object of the present invention is to provide a television signal processing device capable of obtaining a receiving section and making it easy for a user to understand what kind of digital signal is being transmitted.

[0010]

According to the present invention, a component leaking from the other signal side is added to one signal transmitted in quadrature modulation in order to reduce image quality deterioration and interference due to ghosts and the like. It can be removed accurately. That is, an intermediate frequency signal obtained by receiving a broadcast signal and in which a video signal and a digital signal are quadrature-modulated and multiplexed is introduced, and the video signal and the digital signal are respectively detected by in-phase quadrature detection and then detected. First means for obtaining a video signal and a digital signal, and a differential output of the video signal after the detection
And a first waveform equalizing means for detecting a ghost by using the reference signal of the output of the first difference means in a specific period and equalizing the waveform of the output of the first difference means. Second difference means for obtaining the differential output of the digital signal and a reference signal for a specific period of the output of the second difference means are used to detect a ghost, and the output of the second difference means is waveform equalized. And a means for supplying the output of the first waveform equalizer as a cancel signal to the output of the second waveform equalizer.

[0011]

By the above means, the video signal leaking to the digital signal side is canceled from the output of the second waveform equalizing means, and an accurate digital signal can be obtained.

[0012]

Embodiments of the present invention will be described below with reference to the drawings.

(Overall System) FIG. 1 is an overall block diagram of a receiving section in an embodiment of the present invention. A high frequency (RF) signal from the antenna is introduced into the input terminal 100 and supplied to the RF input processing unit 1000. The audio signal obtained by the RF input processing unit 1000 is output to the selector 20.
00 is supplied. The selector 2000 can also select an audio signal from the outside. Selector 2000
The output audio signal from is amplified by the audio amplifier 3000 and supplied to the speaker 4000. RF input processing unit 1
The video signal obtained from 000 is input to the selector 5000. The selector 5000 can also select a video signal from the outside. The video signal selected by the selector 5000 is input to the RF input processing unit 1000 again to be subjected to reception signal correction (for example, ghost cancellation processing),
It is input to the video decoder 6000 and the synchronization control unit 7000. The video decoder 6000 performs processing according to the system of the input video signal (intermediate system, current system) and control by the user to decode the input video signal. The R, G, B signals, the synchronization signal, the brightness correction signal and the like obtained as a result of the decoding are supplied to the display 8000.

The synchronization control section 7000 uses the control signal included in the video signal to generate a predetermined synchronization signal and an identification signal indicating the system and type of the video signal. The generated synchronization signal is input to the video decoder 6000 and used for mode switching for decoding the video signal.

The user control unit 9000 controls the operation mode of the system according to the user's operation, and can switch the signals selected by the selectors 2000 and 5000. Further, it receives the identification signal indicating the type of the video signal from the synchronization control unit 7000 and the audio identification signal indicating the type of the audio signal from the RF input processing unit 1000, and gives a processing mode switching signal to the video decoder 6000. Video and audio modes are displayed on the indicator 200. When the user performs an operation of selecting an external input other than the RF signal, the user control unit 9000 sends a signal for controlling the video ghost canceller of the RF input processing unit 1000 to the through state.

FIG. 2 shows a specific configuration example of the RF input processing section 1000.

The high frequency signal from the input terminal 100 is input to the tuner 1001 and the channel designated by the user is selected. The output intermediate frequency of the tuner 1001 is input to a video intermediate frequency amplifier (PIF circuit) 1002, amplified, and input to an in-phase / quadrature detection unit 1003. The video signal obtained by the in-phase detection is the selector 50.
00 and an audio intermediate frequency amplifier (SIF
Circuit) 1005. The video signal selected by the selector 5000 is input to the reception signal correction unit 1004, ghost canceled, and input to the video decoder 6000 and the synchronization control unit 7000. However, selector 5000
When the external video signal (for example, VTR output) is selected in, the reception signal correction unit 1004 is controlled to the through state. On the other hand, the audio signal obtained from the SIF circuit 1005 is FM demodulated in the FM detector 1006,
It is input to the audio decoder 1007. Audio decoder 10
In 07, decoding processing of a voice multiplexed signal or the like and selection processing according to a voice selection control signal from the user control unit are performed, and the output thereof is supplied to one of the switches 1010 and also to the logic circuit 1009. . The selection output of the switch 1010 is input to the selector 2000.

In this system, the digital audio signal is orthogonally modulated and transmitted together with the intermediate video signal. This digital audio signal has various types such as stereo, 4-channel, audio multiplex, and monaural. The in-phase / quadrature detection unit 10 outputs the quadrature-modulated digital audio signal.
In 03, the signal is demodulated by quadrature detection and input to the received signal correction unit 1004 to be corrected. The corrected digital audio signal is decoded by the digital decoder 1008, supplied as an audio signal to the other input terminal of the switch 1010, and input to the logic circuit 1009. The logic circuit 1009 is normally a switch 1
Although 010 is set to the digital audio signal side, the decoding state of the digital audio signal is monitored, and if there are many errors, the switch 1010 is set to the analog side selection state.

FIG. 3 shows an example of a concrete configuration of the synchronization control section 7000.

The video signal from the RF input processing unit 1000 includes a color subcarrier reproducing unit 7001, a sync separating unit 7002,
It is input to the control signal reproduction and standard wide determination unit 7005. The horizontal and vertical sync signals H and V separated by the sync separator 7002 are input to the burst gate generator 7003 and are used to create a burst gate signal. The burst gate signal is input to the color subcarrier reproducing unit 7001 and is used as a burst signal sampling timing signal. The color subcarrier reproducing unit 7001 generates a continuous signal 4fsc that is 4 times the frequency fsc of the color subcarrier and a continuous signal 8fsc that is 8 times the frequency fsc. These are used as clocks for the digital processing unit. The 4 fsc signal and the horizontal and vertical sync signals are input to the standard / non-standard determination unit 7004.
The standard / non-standard determination unit 7004 determines whether the video signal is in a standard format conforming to the broadcasting standard or a non-standard format reproduced by a VTR or the like based on the frequency and phase relationship of these input signals. judge. The standard / non-standard determination signal is input to the standard wide determination unit 7005 and the non-standard wide determination unit 7006. Standard wide judgment unit 7
Reference numeral 005 is a part for determining whether the input video signal is an intermediate system signal (wide signal) or a current system signal when a standard signal for broadcasting is input. Further, even if the video signal is for a wide screen, it is possible to determine in what processing mode (for example, only letterbox processing) the video signal is processed. This can be done by adding the identification information to a specific line in the vertical blanking period, as will be described later. The non-standard wide determination unit 7006 determines, when a non-standard signal is input, whether the input video signal is an intermediate system signal, a current system signal, or a wide signal itself. Is. This is because a wide-screen (16: 9) signal can be directly recorded / reproduced also in the VTR. Whether or not it is a wide signal is determined by using, for example, a signal digitally multiplexed as a wide identification signal on a specific line in the vertical blanking period.

There are a plurality of types of wide identification signals. This is because the intermediate method is a method in which two types of processing, letterbox processing and side panel processing, are performed, but it is conceivable that transmission is performed by only one of the processing, for example, side panel processing.

The judgment outputs of the standard wide judgment unit 7005 and the non-standard wide judgment unit 7006 are the indicators 20 respectively.
The value 0 is input to inform the user what kind of signal is currently being received and processed. Although the determination signal is directly input to the indicator 200 in the drawing, it may be supplied via the user control unit 9000.

When the standard wide judging section 7005 obtains the judgment of the standard wide signal, the standard synchronous reproducing section 7007 is reset. The standard sync reproducing unit 7007 uses the 4 fsc signal as a clock to divide the frequency by a frequency dividing counter to create a horizontal sync signal and a vertical sync signal. On the other hand, the non-standard sync reproduction unit 7008 directly uses the horizontal and vertical sync signals from the sync separation unit 7002 to create horizontal and vertical sync signals for non-standard signals. Horizontal sync signals from the standard sync playback unit 7007 and the non-standard sync playback unit 7008 are supplied to one and the other input terminals of the switch 7009, and the sync signal corresponding to the determination content is selected by the standard / non-standard determination signal. , Used as the horizontal sync signal of the system. Similarly, the vertical sync signals from the standard sync playback unit 7007 and the non-standard sync playback unit 7008 are switched by the switch 7
The sync signal is supplied to one and the other input terminals of 010, and the standard / non-standard decision signal selects a sync signal according to the contents of the decision and is used as a vertical sync signal of the system. Furthermore, the standard synchronous reproduction unit 7007 and the non-standard synchronous reproduction unit 70
A signal of 2H (H: horizontal period) is also taken out from 08, and this signal is supplied to one and the other input terminals of the switch 7011, selected by a standard / non-standard determination signal according to the determination content, and used in the system. It

Furthermore, the wide / standard size determination signal representing the wide and standard size from the standard wide determination section 7005 is also supplied to the horizontal compression section and the vertical expansion section 6012 of the video decoder 6000, respectively. This is because, for example, when a signal of the current method is being received and processed, a wide screen has a large area, so when the signal of the current method is widened, the compression and expansion processing in the horizontal and vertical directions is performed by the determination signal. This is for automatically switching.
Also, when an intermediate video signal is received, its horizontal and vertical synchronization can be accurately obtained, so the conventional display has an overscan section, but since the rate of this overscan section is small, the overscan section is small. Used to switch scan rates.

(Wide Screen Recording VTR Signal Identification System) FIG. 4 shows a concrete example of the configuration of the above-mentioned non-standard wide determination unit 7006.

The non-standard wide determination section 7006 is, for example, V
VTR when the signal recorded from TR is reproduced
This is a part for determining whether the reproduction signal from is the current system or the wide screen. When a 16: 9 wide screen is displayed on a 4: 3 screen, the contents of the image are displayed in a portrait orientation.
When I display the signal on the screen, it becomes landscape. Therefore,
It is necessary to determine whether the image signal recorded in the VTR is 16: 9 or 4: 3. VT
Since a control signal is used for R, there is also a method of modulating this control signal to make it an identification signal. In this case, however, a control signal connection cable is provided separately from the video signal connection cable with the decoder. Is required.

Therefore, in this system, the non-standard judgment unit 7006 is provided. Non-standard sync playback unit 7008
The horizontal and vertical sync signals from the gate signal generator 76
01 is input. The gate signal generator 7601 generates a gate pulse at a burst position of a predetermined horizontal line, for example, the 263rd line, based on the horizontal and vertical synchronization signals. The gate circuit 7602 passes the video signal only during this period. The output of the gate circuit 7602 is the multiplier 7
It is input to 605 and is multiplied by the burst signal from the color burst generator 7604. This multiplication output is input to the integrator 7606 and integrated, and the integrated value is input to the determination circuit 7607. The determination circuit 7607 obtains a determination output as a wide signal when the integrated value is equal to or lower than a predetermined level, and outputs a determination signal indicating that the image signal is a normal 4: 3 image signal when the integrated value is equal to or higher than the predetermined level.

Therefore, as a matter of course, when the reproduction output of the VTR is a wide screen signal, the integrated output decreases at the burst signal position of the 263rd line, and when it is a normal 4: 3 screen signal. It is processed so that the integrated output is high. The wide / standard size determination signal thus obtained is used for switching the processing mode of the video decoder.

FIG. 5 shows the structure of a VTR capable of processing the 263 line signal as described above. Video decoder 6
The video signal widened by 000 is recorded by the recording processing unit 30.
It is processed at 0 and recorded on the magnetic tape 301. At this time, the synchronization control unit 7000 obtains a determination signal that the signal is a wide screen signal. Therefore, the recording processing unit 300 modulates the control signal using this determination signal. As a result, the recording of the wide screen signal is multiplexed with the control signal as an identification signal. For the control signal, only the timing of its leading edge is used for synchronization, and its trailing edge is not used. Therefore, by controlling the duty from the leading edge to the trailing edge, digital information can be multiplexed in the control signal. When a normal 4: 3 screen signal is recorded, the above processing is not performed. The reproduction processing unit 302 manages the control signal, determines that the control signal is a wide-screen signal when the control signal is subjected to predetermined modulation, and gives an active control signal to the gate signal generator 303. When the gate signal generator 303 is in the active state, the gate signal generator 303 counts the synchronization signal of the luminance signal Y obtained from the reproduction processing unit 302, and the predetermined line (26
3rd line) predetermined timing (burst signal position)
Then, the switch 304 in the path of the color signal C is turned off. That is, the burst signal is deleted. If the reproduced signal is processed in this way, the integrated output of the integrator 7606 shown in FIG. 4 becomes a predetermined level or less when a wide screen signal is input, and a wide / standard size determination signal can be obtained. .

(Wide screen EDTV signal identification display) The system described above is capable of receiving, processing and displaying a wide screen (16: 9) signal, and also a standard size (4: 9).
The signal on the screen of 3) can also be received, processed (specific means will be described later), and displayed. When displaying a signal of a 4: 3 screen, it is preferable to effectively use the 16: 9 display screen provided. Therefore, it is determined whether a wide screen signal is input or a 4: 3 screen signal is input, and when the 4: 3 screen signal is input, as shown in FIG. The video decoder 6000 is provided with a function of vertically expanding to obtain a full-screen display. This function is used when a signal with upper and lower mask parts is transmitted to display a movie or the like on a 4: 3 screen, or when a signal of a movie material having the upper and lower mask parts is reproduced from a VTR. Is also available.

However, a normal 4: 3 broadcast signal or VTR
When the reproduction signal is input, if it is always expanded, important information may be hidden in the broken line area in FIG. The user may not notice this. Incidentally, in the case of a reproduction signal from a movie material, there is no problem because the broken line area is originally the mask portion.

Therefore, in this system, whether the input video signal is a 4: 3 image signal or a 16: 9 image signal can be automatically displayed by the indicator 200. As the display control, the standard wide determination unit 7005 and the non-standard wide determination unit 70 shown in FIG.
The wide / standard size determination signal and size determination signal from 06 are used. Standard / non-standard decision signals are also used. As the display content of the indicator 200, a wide-screen display, a 4: 3 screen display, a standard signal and a non-standard signal are distinguished from each other by a logic judgment output of the self control circuit or the user control section 900 as shown in FIG. Have.

(Voice Reception Identification Display) The above system is
It is possible to receive and process an analog audio signal by a method similar to the conventional method and a digital audio signal by quadrature modulation.
In the transmission of digital audio signals, simultaneous use of band compression technology enables simultaneous broadcasting of two or more channels, for example, four channels or two channels of stereo.

FIG. 8 shows a configuration example of the digital decoder 1008. The voice packet input from the received signal correction unit 1004 is subjected to error detection and correction processing by the error detection / correction unit 1801 and input to the band compression decoder 1802 to be decoded. Of the decoded audio data, the audio data of the channel or method desired by the user is converted into an analog signal by the D / A converter 1803 and input to the switch 1010.

The decision circuit 1804 is provided by the error detection / correction unit 18
If the error is larger than a predetermined noise at 01, or if the error exceeds the error correction capability, the circuit judges this and gives a command to the logic circuit 1009. Therefore, when there are too many errors, the switch 1010 selects the audio signal from the analog system. However, normally, the switch 1010 selects a digital audio signal. The error-corrected voice data is
It is also input to the content identification unit 1805. Content identification section 1
805, as shown in FIG. 9, reads the mode identification code from the audio data packet and determines what the broadcast content is. The determination signal is the user control unit 900.
It is input to 0 and displayed on the indicator 200.

A voice packet has a format as shown in FIG. 9, and includes a clock synchronization code, a packet synchronization code, a mode identification code, voice data, error correction data, and GCR for orthogonal signals, and one packet is approximately one packet. The data is 1/60 second.
What kind of audio content is being broadcast,
It is represented by a mode identification code. GCR for orthogonal signals
Is used when demodulating a quadrature modulated signal and is a reference signal for detecting and canceling a ghost.

FIG. 10 shows an example of the indicator 200 for displaying the voice mode identified by the content identifying section 1805. The indicator 200 has display portions 221 and 222 that indicate whether a digital audio signal or an analog audio signal is currently output. This display depends on the selected state of the switch 1010.
In the next stage, the currently received audio signal is a monaural broadcast, a stereo broadcast, a 4-channel stereo broadcast, a dual broadcast (a bilingual broadcast, a 2 audio broadcast), and a stereo with 2 channels of stereo broadcast. There is a display of indicators 223, 224, 225, 226, 227 indicating whether or not it is present. Furthermore, a display unit 228 indicating which mode the user has designated among the broadcast contents,
There are 229, 230, 231, and 232. Stereo is 2
When channels are being broadcast, selection can be switched by combining 4-channel stereo selection and main audio, and combining 4-channel stereo and sub audio.

(Wide screen overscan setting) Conventionally, since there is a voltage fluctuation in the high voltage circuit of a television receiver using a cathode ray tube, a part of the upper, lower, left and right of the actually transmitted image signal is omitted and displayed. So-called overscan is performed. However, since the display using liquid crystal is different from the display system using high voltage such as a cathode ray tube, it is not necessary to consider the variation in raster size due to the variation in high voltage. However, in actuality, it is necessary to consider a little overscan because there is a minute error in the reproduction accuracy of the horizontal and vertical synchronization signals. For example, if there is a ghost disturbance, the sync waveform is distorted, and the reproduction accuracy deteriorates. Usually, a fluctuation of ± 2 μs occurs. Therefore, since the effective horizontal period is 52 μs, overscan of about ± 4% must be performed. It is not possible to display all the information sent in this way on the screen.

By the way, in the EDTV signal of the wide screen, it is possible to accurately reproduce the horizontal and vertical synchronizing signals by multiplexing and transmitting the auxiliary synchronizing signal as a digital signal in the vertical blanking period.

In this system, the standard wide determination unit 70
The judgment signal of 05 is used to control the compression in the horizontal direction and the expansion process in the vertical direction inside the video decoder 6000 to realize expansion / compression without overscan only when it is judged as a standard wide signal. . However, in other cases, it is set to perform overscan of about ± 4%. This overshoot can be realized by switching the memory control in the horizontal and vertical companding processing in the video decoder, but when using a liquid crystal display, the driver's video sampling period and clock in the liquid crystal display are switched. This is possible.

(S / N Improvement, DC Offset Improvement Digital Transmission System) FIG. 11 shows an in-phase / quadrature detection section 1003.
Shows a specific configuration example of the above. The video signal from the PIF circuit 1002 is input to the multipliers 1301 and 1302 and the carrier wave reproducing unit 1303. The carrier wave reproducing unit 1303 operates as a narrow band pass filter using a phase locked loop, extracts a carrier wave, and outputs a reproduced carrier in phase with the video carrier wave. The reproduction carrier is input to the multiplier 1302 to perform video detection, and the 90 ° phase shifter 130
By being input to the multiplier 1301 via 4, digital voice detection is performed.

By the way, in the in-phase / quadrature detection section 1003, the noise component near the carrier frequency cannot be removed from the reproduced carrier reproduced by the carrier reproducing section 1303.
Therefore, the S / N ratio of the demodulation output in the low band is somewhat inferior to that in the high band. Further, when the circuit in the reproducing section passes even the DC component, DC offset occurs. DC offset is known to significantly reduce the stability of automatic equalization operations.

Therefore, in this system, the received signal correction unit 1004 is realized so as not to be affected by the above-mentioned inconveniences of the carrier wave reproduction unit 1303 of the in-phase / quadrature detection unit 1003.

FIG. 12 shows a specific example of the configuration of the received signal correction section 1004.

The received signal correction unit 1004 improves the S / N ratio in the low frequency region (DC) and the problem due to the DC offset. First, before describing the received signal correction unit 1004, the in-phase quadrature modulation side of the video signal and the digital audio signal and the spectrum of the audio data will be described with reference to FIGS.

In FIG. 13, the video signal is AM-modulated by the multiplier 101 and the adder 102 by the video carrier from the video carrier generator 103. The digital audio signal is
The voice band compression encoder 105 performs band compression processing, and the DC suppression code conversion unit 106 suppresses the DC component. This code conversion is a technology that has been put to practical use in signal processing of compact discs, and when this code conversion is performed, the spectrum shown by the alternate long and short dash line in FIG. 14 is obtained. The output of the DC suppression code conversion unit 106 is the reference GC.
The GCR0 signal from the R0 signal generator 107 is multiplexed in an appropriate period and precoded by a cyclic filter composed of a modulo-2 adder 109 and a delay device 110. When the clock frequency of the data is fck, the delay unit 110
The delay amount Tck of 2 × Tck = 2 × (1 / fck). This filter output is shaped by the spectrum shaping filter 111 having the characteristic (cosine characteristic) shown by the broken line in FIG. Therefore, this filter output is
The spectrum is as shown by the solid line in FIG. The output of the spectrum shaping filter 111 is quadrature-modulated by the multiplier 112, becomes a carrier-suppressed AM signal, and is input to the adder 104. The modulation carrier used here is obtained by converting the output of the video carrier generator 103 into 9 by the 90 ° phase shifter 113.
The phase is shifted by 0 °. In the adder 104, the AM-modulated audio signal and the AM-modulated video signal are added and supplied to the VSB filter 114, further spectrum-shaped and transmitted.

Returning to FIG. 12, description will be made.

The quadrature multiplexed signal transmitted as described above is subjected to in-phase and quadrature detection, and then the received signal correction section 100.
4 is input. In-phase / quadrature detection section 100 shown in FIG.
The synchronously detected video signal supplied from the multiplier 1302 in 3 is digitized by the A / D converter 1401 and input to the video signal ghost canceling unit 1402 to be ghost-removed. The ghost-removed video signal is input to the video decoder 6000. Further, the DC component of the input video signal after the in-phase detection is removed by the difference unit 1403 including the delay unit 1404 and the subtractor 1405.
The output of the differencer 1403 is a low-pass filter (LP
F) After removing noise outside the required band in 1406, A /
It is digitized by the D converter 1407. This digitized signal is input to the transversal filter 1408 and the control unit 1409. The control unit 1409 includes a reference GCR1 for video ghost cancellation and an adder 14 for audio system.
A signal obtained by subtracting the difference from the output of 28 by the subtractor 1410 is also supplied. The reference GCR1 signal is stored in the memory 1411. As a result, the transversal filter 1 detects the component from the video system leaking into the audio system.
The tap position and coefficient of 408 are controlled to output a ghost cancellation signal from the transversal filter 1408.

On the other hand, the in-phase / quadrature detection section 10 shown in FIG.
The digital audio signal subjected to the quadrature detection, which is supplied from the multiplier 1301 in 03, is delayed by the delay unit 1421 and the subtractor 142.
The DC component is removed by the differentiator 1420 composed of 3 and noise outside the required band is removed by the low pass filter (LPF) 1424, and then the signal is input to the A / D converter 1425 and becomes a waveform-shaped digital signal. . This digital audio signal is transmitted to the transversal filter 1426 and the control unit 142.
Input to 7. The control unit 1427 includes a reference GCR0 signal for ghost cancellation of an audio signal and an adder 1428.
The signal obtained by the subtractor 1429 for the difference from the output of is also input. The reference GCR0 signal is stored in the memory 1430. As a result, the control unit 1427 causes the adder 14
The ghost signal remaining at the output of 28 is detected, and the transversal filter 1426 is controlled to perform waveform equalization. The reference GCR0 signal has exactly the same pattern as the reference GCR0 signal on the transmission side. Then, the transversal filter 14 is set so that the output of the subtractor 1429 becomes the minimum.
26 is controlled. Transversal filter 1426
The digital decoder 1008 removes the video component leaking from the video system by the adder 1428.
Entered in.

According to the above digital processing method, A /
The DC components of the signals input to the D converters 1407 and 1425 are removed by a difference unit at the preceding stages. Therefore, the noise of the frequency component near the direct current (low range) can be removed, and the S / N of the output can be improved. Also,
Since this DC removal is performed, the equalization processing in the transversal filters 1408 and 1426 is realized with extremely stable and accurate operation.

(Two-dimensional waveform equalization system) The video signal is
A band of 4.2 MHz is required, and the reference signal used in the current broadcasting is also defined by sampling of 4fsc (fsc: color subcarrier frequency), and 4fsc is used for digital conversion for video signals. On the other hand, the quadrature detection signal is 1 MH
It is limited to the low frequency band below z, and is digitally processed at the data clock frequency fck. Therefore, in the reception signal correction unit 1004 described above, an A / D converter 1401 for a video signal and an A / D conversion for a quadrature detection signal in order to digitally process the signal at a prescribed rate in each transversal filter unit. Three of the containers 1407 and 1425 are required.

FIG. 15 shows another embodiment of the received signal correction section 1004. This circuit reduces the number of A / D converters used. The same circuit parts as those in FIG. 12 are designated by the same reference numerals as those in FIG. The following description will focus on the part different from the circuit of FIG. The in-phase detected video signal is band-limited by a low pass filter (LPF) 1440 and digitized by an A / D converter 1441. In addition, the quadrature-detected digital audio signal is a low-pass filter (L
PF) 1443 band-limited and A / D converter 1444
Will be digitized in. The output of the A / D converter 1441 is
It is input to the clock reproducing unit 1442. The clock recovery unit 1442 generates a continuous clock 4fsc that is phase-synchronized with the burst signal and supplies it to the A / D converter 1441. Further, this clock 4fsc is divided by the frequency divider 1445 to become a clock fck of (2/5) fsc, and the A / D converter 1
444.

The output of the A / D converter 1441 is the transversal filter 1446 of the video signal processing system and the control unit 1.
It is input to the low-pass filter 1451 of the crosstalk cancellation system as well as being input to 447. A signal obtained by subtracting the reference GCR1 ′ signal from the output of the difference circuit 1448 is sent to the subtractor 14 in the control unit 1447 of the video signal processing system.
It is input from 49. The difference circuit 1448 performs difference calculation of the output of the transversal filter 1446, removes the DC component, and outputs the result. Since the control unit 1447 uses the video signal from which the DC component has been removed, it can stably detect the residual ghost and use the transversal filter 14
It controls the tap position and coefficient of 46. As a result, from the transversal filter 1446, a video signal whose waveform has been equalized and ghosts have been removed is output and input to the video decoder 6000. The reference GCR1 ′ signal is stored in the memory 1450.

The output of the A / D converter 1441 is input to the sample converter 1452 via the low pass filter 1451. The sample converter 1452 converts the sample rate to obtain an output signal having the same rate as the sample rate on the A / D converter 1444 side. Sample converter 1
The DC component of the output of 452 is removed by a difference unit 1453 including a delay unit 1454 and a subtractor 1455. Therefore, it is input to the transversal filter 1408 and the control unit 1409 as a signal in which noise near DC is suppressed. The subsequent processing is as described with reference to FIG.

The output of the A / D converter 1444 is the delay device 1
Difference unit 146 composed of 461 and subtractor 1462
At 0, the DC component is removed. Therefore, this difference device 14
The output of 60 is S as a signal in which noise near DC is suppressed.
/ N is improved, and the transversal filter 142
6 and the control unit 1427. The process after this is shown in FIG.
It is as explained in 2.

As described above, the received signal correction unit 1 of FIG.
According to 004, since the sample converter 1452 is inserted in the crosstalk cancellation signal generation path, the output of the A / D converter 1441 of the video signal processing system can be used. Therefore, two A / D converters are sufficient as compared with the circuit of FIG. Further, since the differencers 1453 and 1460 and the difference circuit 1448 are provided, the S / N in the vicinity of DC can be improved and the ghost removal processing that is not affected by the DC offset can be performed, as in the circuit of FIG. . In addition, since it is all digital processing, extremely stable operation can be obtained.

(Automatic Audio Switching System) In the above system, in the digital orthogonal multiplex transmission system of the audio signal shown in FIG. 13, the AM on the audio side input to the adder 104 in order to eliminate the interference with the current receiver. It is necessary to keep the amplitude level of the signal low. For example, about 1 / compared to video signals
It should be kept below 10. Therefore, in reception in a weak electric field area, digital audio may not be reproduced even if a video signal can be reproduced.

Therefore, in the above system, when the switch 1010 is provided as described in FIG. 8 and the digital voice signal has a high error rate, the switch 1010 can automatically select the analog voice signal. Has become.

(Current system horizontal compression display processing system for signals) Using the system of FIG.
When receiving and displaying a signal (C format) (aspect ratio 4: 3), it is preferable to display the signal on the screen having an aspect ratio of 16: 9 as much as possible. That is, as shown in FIG. 16, the wide screen can be effectively used when the 4: 3 screen is displayed without being cut off at the center of the 16: 9 screen. Therefore, in this system, a circuit as shown in FIG. 17 is provided inside the video decoder 6000.

In FIG. 17, the video signal input to the input terminal 6001 is input to the luminance / color (Y / C) separation unit 6002 and the intermediate system decoder 6010. The luminance signal separated by the Y / C separation unit 6002 is the intermediate system decoder 6
010 and the NTSC progressive scan conversion unit 6004 are input to the horizontal compression unit 6005, and the separated color signals are output to the color demodulation unit 6003. In addition, the color signals separated by the Y / C separation unit 6002 and demodulated by the color demodulation unit 6003 are also transmitted to the intermediate system decoder 6010 and the NTSC.
It is input to the horizontal compression unit 6005 of the progressive scan conversion unit 6004.

When the input video signal is of the intermediate system, the intermediate system decoder 6010 performs a process of converting it into a wide screen signal, and the wide screen signal (luminance Y
And the color difference signals (RY), (BY) or I, Q signals) are selected and derived by the selector 6008 and input to the display correction unit 6009. The output of the display correction unit 6009 is supplied to the display 8000. When the input video signal is of the NTSC system, the selector 6008 selectively outputs the output of the NTSC progressive scan conversion unit 6004. The NTSC progressive scan conversion unit 6004
It is composed of a horizontal compression unit 6005 and a motion adaptive scanning line conversion unit 6007 which converts the output of the horizontal compression unit 6005 into a motion adaptive scanning line so as to have the same number as the number of scanning lines of a high definition television signal. The control of the selector 6008 is executed by a control signal from the synchronization control unit 7000 that identifies the type of the input video signal.

FIG. 18 shows a concrete configuration example of the horizontal compression section 6005. This example shows only the luminance signal system. The luminance signal is input to the sample thinning unit 6502 via a low pass filter 6501 that limits the band in the horizontal direction. Here, samples are thinned out according to the compression ratio and input to the buffer memory 6503. Buffer memory 6
Although writing is performed in 503 by a writing clock synchronized with the input, reading is performed by the reading clock according to the wide screen display in the period in which the horizontal ratio shown in FIG. 16 is 4. FIG. 19 shows an example of thinned samples, and circles are sampling data.

FIG. 20 shows a motion adaptive scanning line conversion unit 6007.
2 is a specific configuration example of

The horizontally compressed luminance signal Y is transferred to the motion detector 6
701 and the intra-field interpolation unit 670.
2. Inter-field interpolation unit 6703, double speed conversion unit 6705
Entered in. The interpolating signals obtained by the intra-field interpolating section 6702 and the inter-field interpolating section 6703 are mixed by the mixing section 6704 according to the motion detection signal from the motion detecting section 6701, and the double speed converting section 6705 is obtained as the motion adaptive interpolation signal.
Entered in. The mixing unit 6704 is a motion detection unit 6701.
The output ratio of the inter-field interpolating unit 6703 is increased when the motion detection signal from indicates a still image, and the output ratio of the intra-field interpolating unit 6702 is increased when indicating a moving image. The double speed conversion unit 6705 converts the interpolated signal created by interpolation and the directly input signal into a double speed in the horizontal direction,
Alternately select and derive. As a result, a luminance signal converted into progressive scanning is obtained and can be displayed on a wide screen display. On the color signal side as well, an interpolation signal is created by similar mixing. The horizontally compressed color signals I and Q are input to the motion detection unit 6701, and also input to the intra-field interpolation unit 6706, the inter-field interpolation unit 6707, and the double speed conversion unit 6709. The interpolated signals obtained by the intra-field interpolator 6706 and the inter-field interpolator 6707 are mixed by the mixing unit 6 according to the motion detection signal from the motion detector 6701.
The signals are mixed in 708 and input to the double speed conversion unit 6709 as a motion adaptive interpolation signal.

21 and 22 are explanatory diagrams of the principle of the inter-field interpolation processing and the inter-field interpolation processing. In the intra-field processing, the interpolation scan line X is generated by using the scan lines A and B above and below the same field. In the inter-field processing, the interpolation scan line X is interpolated using the scan line C of the previous field.

FIG. 23 shows a motion detector 6701 shown in FIG.
2 is a specific configuration example of

The luminance signal is input to the frame delay unit 6720 and the subtractor 6721. The subtractor 6721 performs subtraction processing on the signals on the input side and the output side of the frame delay unit 6720 to obtain a difference signal for one frame. The differential signal is input to the low pass filter 6722 to extract the horizontal low frequency component, and input to the absolute value circuit 6723 to take the absolute value,
The absolute value is input to the maximum value circuit 6724. on the other hand,
The color signal is output to 2 by the frame delay units 6725 and 6726.
The frame is delayed and input to the subtractor 6728. The subtractor 6728 takes the difference between the two-frame delay signal and the direct input signal, and the two-frame difference signal is input to the absolute value circuit 6730 via the low pass filter 6729 to take the absolute value. This absolute value is the maximum value circuit 672 described above.
4 is input. Therefore, the maximum value circuit 6724 is supplied with a signal indicating the movement of the luminance signal and a signal indicating the movement of the color signal. By obtaining the maximum value of this motion signal, a determination signal as a moving image can be obtained when there is a motion in either the luminance signal or the color signal. The spatiotemporal expansion unit 6731 is a circuit that spreads the motion signal in the time direction and the space direction to prevent the motion detection omission. An example of the spatiotemporal expansion is to spread the motion signal X into a to f as shown in FIG. That is, FIG. 24 shows fields in the vertical direction and time directions in the horizontal direction, and the circles are scanning lines. In addition, during the period from a to f between the circles, the motion signal X indicating a moving image is expanded and output.

FIG. 25 shows a double speed conversion unit 6705 shown in FIG.
2 is a specific configuration example of

The direct luminance signal and the interpolated luminance signal are distributed to the line memories 6742 and 6743 for each line which are input to the switching circuit 6741. Line memory 6
The data of 742 and 6743 are read at a clock rate twice as high as that at the time of writing, and are alternately selected by the switching circuit 6744 and derived.

According to the embodiment of the video decoder described above,
The display aspect ratio can be switched and displayed according to the received signal. The signals of the current NTSC system can also be displayed in a large size in the central part of the wide screen without breaking the top and bottom. Further, since the horizontal scanning frequency of the current system is converted so that the number of scanning lines is the same as that of the wide screen signal, the horizontal frequency is the same as when displaying the intermediate system signal, and the horizontal drive circuit can be commonly used. .

(Current System Signal Vertical Expansion Display Processing System) Using the system of FIG.
When receiving and displaying a signal (C format) (aspect ratio 4: 3), it is preferable to display the signal on the screen having an aspect ratio of 16: 9 as much as possible. Therefore, as shown in FIG. 26, it is possible to effectively use the wide screen by displaying the 16: 9 screen by cutting the upper and lower parts of the 4: 3 screen. In this case, since the 4: 3 screen is vertically extended, the upper and lower parts cannot be seen. So in this system,
A circuit as shown in FIG. 27 is provided inside the image decoder 6000.

The difference of this embodiment from the embodiment of FIG. 17 is the configuration of the NTSC progressive scan conversion unit 6004. Therefore, the configuration of the NTSC progressive scan conversion unit 6004 will be described. The NTSC progressive scan conversion unit 6004 starts with Y /
The luminance signal and the color signal from the C separation unit 6002 and the color demodulation unit 6003 are input to the motion adaptive scanning line conversion unit 6007,
The signal subjected to the motion adaptive scanning line conversion is input to the vertical expansion unit 6012. Motion adaptive scanning line conversion unit 6
007 is the same as the configuration described in FIG.

FIG. 28 shows the principle of vertical extension.
To display a 4: 3 aspect ratio screen signal on a 16: 9 aspect ratio screen, discard unnecessary unnecessary lines above and below the 4: 3 aspect ratio signal (see the shaded area in FIG. 28). ), 525 scanning lines are generated from the remaining 525 × (3/4) scanning lines. Therefore, it is necessary to generate three to four scanning lines. In FIG. 28, A1 to A4 are original scanning lines, B1 to B5 are new scanning lines, and the values attached to the arrows are magnifications. For example, when the scanning line of B2 is made, the scanning line A1 is multiplied by (1/4) and the scanning line A2 is multiplied by (3/4) and added.

FIG. 29 shows a vertical extension section 601 shown in FIG.
2 is a specific configuration example of 2, and the video signal is input to the field memory 6013. The memory control unit 6014 controls the writing / reading operation of the field memory 6013 by a clock synchronized with the horizontal synchronizing signal and the vertical synchronizing signal, and a signal excluding the hatched portion shown in FIG. 28 is written in the field memory 6013. Control so that The output of the field memory 6013 is the line memory 601.
It is input to the coefficient unit 6016 via 5 and is directly input to the coefficient unit 6017. Coefficient multipliers 6016 and 601
In FIG. 7, the coefficient generator 6019 supplies the coefficient as shown in FIG. 28 to each output scan line. Coefficient unit 60
The outputs of 16 and 6017 are input to the adder 6018 and added to obtain the converted scan line B. Figure 3
0 is an operation timing chart of the vertical expansion unit 6012. The reading of the field memory 6013 is an operation of reading three scanning lines and then stopping the output of one scanning line. At this time, the coefficient generator 6019 stops the writing of the line memory 6015, Is a control such as reading out again. In synchronization with this reading, the coefficients of the coefficient units 6016 and 6017 are switched by the coefficient generator 6019. This vertical extension 6012
In FIG. 27, it is provided in the latter stage of the motion adaptive scanning line conversion unit 6007, but there is no problem even if this order is reversed.

As described above, according to this embodiment, the width of the wide screen can be effectively utilized when the signal of the current system is received and processed. Further, since the horizontal scanning frequency of the current system is converted so that the number of scanning lines is the same as that of the wide screen signal, the horizontal frequency is the same as when displaying the intermediate system signal, and the horizontal drive circuit can be commonly used. . Further, in the case where the input video signal is a signal recording a film movie and unnecessary black mask portions are generated above and below from the beginning, in the above embodiment, the video can be displayed on the full screen. .

(POP display system 1 for wide screen display) When the signal of the current method (NTSC method) (aspect ratio 4: 3) is received and displayed using the system of FIG. It is better to fill the screen with the aspect ratio of. However, when a screen having a signal with an aspect ratio of 4: 3 is displayed on a screen with an aspect ratio of 16: 9, the original information at the top and bottom of the screen is lost, or blank areas are generated at the left and right of the wide screen. That is, a signal having an aspect ratio of 4: 3 is transmitted to a wide screen (1
If the conversion is performed according to the vertical height of 6: 9), a blank portion having no image information is generated on the left and right of the wide screen. Also, if an attempt is made to display in accordance with the horizontal length of the wide screen, the upper and lower information of the original signal will be lost.

Therefore, in this embodiment, the display area of the wide screen display can be effectively utilized.

FIG. 31 shows still another embodiment of the video decoder. A sub-screen signal is supplied to the input terminal 61001, and a main-screen signal is supplied to the input terminal 62001.
The main screen signal processing unit will be described. The main screen signal processor is
It has the same configuration as the decoder described in FIG.
Separation unit 62002, color demodulation unit 62003, intermediate system decoder 62010, horizontal compression unit 62005, progressive scan conversion unit 62007, selector 62008, synchronization control unit 703.
It is composed of 1 and the like. The synchronization control unit 7031 has N
When a TSC system signal is input, a signal that has been horizontally compressed and converted into progressive scanning is selected by the selector 62008, and when an intermediate system signal is input, the wide screen of the output of the intermediate system decoder 62010 is displayed. The signal is selected by the selector 62008. This selector 6200
The output of No. 8 is input to the combining unit 62020.

The sub-screen signal processing unit is the Y / C separation unit 610.
02, color demodulation unit 61003, intermediate system decoder 6101
0, selector 61008, horizontal and vertical compression unit 61011,
The synchronization control unit 7021 and the like are included. In the sub-screen signal processing unit, the outputs from the Y / C separation unit 61002 and the color demodulation unit 61003 are directly input to the selector 61008 as compared with the main screen signal processing unit. Also selector 6
The output of 1008 is subjected to horizontal / vertical compression processing by the horizontal / vertical compression unit 61011 and input to the synthesis unit 62020. Although only one sub-screen signal processing unit is shown in the drawing, a plurality of sub-screen processing units are provided in parallel, and the sub-screen signals processed by the respective processing units are input to the combining unit 62020.
The output of the combining unit 62020 is the display correction unit 600.
9 is input.

Now, the input terminal 6200 of the main screen signal processing section
It is assumed that the signal of the intermediate system is input to 1. In this case, the selector 62008 selects the wide-screen signal obtained from the intermediate system decoder 62010.
At this time, since the video of the 16: 9 aspect ratio obtained by decoding the original intermediate format signal is displayed on the screen of the display, the signal on the sub-screen side is not selected. This control is performed by the determination signal from the synchronization control unit 7031.

Next, it is assumed that an NTSC signal is input as the main screen signal. Then, the Y / C separation unit 62002
And the output of the color demodulation unit 62003 is the horizontal compression unit 62005.
Is horizontally compressed by the scanning line conversion unit 62007.
The scanning line conversion is performed at and the signal is taken out from the selector 62008. If the signal at this time is displayed as it is, 16:
The wide screen of 9 has a blank part. Here, it is assumed that an NTSC system signal is input as the sub-screen signal. Then, this is determined by the synchronization control unit 7021,
The selector 61008 selectively derives signals from the Y / C separation unit 61002 and the color demodulation unit 61003. The derived signal is subjected to horizontal and vertical compression processing in the horizontal / vertical compression unit 61011 and becomes a signal for a screen that fits in a blank portion of the wide screen and is input to the synthesis unit 62020. The wide screen with the main screen and the sub screen displayed is shown in FIG.
2 (a) or (b). Figure 32
(A) shows the case of horizontally and vertically compressing a sub-screen signal,
This is an example of compression so as to have an aspect ratio of 9:16, and is an example of displaying signals of four sub-screen processing units. Further, FIG. 9B shows an example in which the signals of the sub-screens are compressed in the horizontal and vertical directions so as to have an aspect ratio of 4: 3. In this case, the signals of the three sub-screen processing units can be displayed. . Whether to set the aspect ratio of the sub-screen to 16: 9 or 4: 3 is realized by switching the horizontal and vertical compression rates according to an instruction from the user control unit. Also,
Even when an intermediate-system signal is input to the sub-screen signal processing unit, the wide-screen signal decoded by the intermediate-system decoder 61010 is compressed by the horizontal / vertical compression unit 61011, and a display as shown in FIG. 32 is obtained. be able to.

When an intermediate system signal and an NTSC system signal are processed as a sub-screen signal, the compression ratio in the horizontal direction is the same, but the compression ratio in the vertical direction is different in both systems. Although the compression ratio in the horizontal direction is 1/4, it is compressed to 1/4 in the vertical direction in the case of the intermediate system signal, but it is compressed to 1/3 in the case of the NTSC system signal. However, since the number of scanning lines per field is doubled by the sequential scanning line conversion, the conversion ratio of the number of scanning lines is 1/2 for the intermediate system signal and NT.
It is 2/3 for SC system signals.

FIG. 33 shows the horizontal and vertical compression section 6 shown in FIG.
1011 is a specific example.

The signal from the selector 61008 is input to the horizontal compression circuit 61012. This horizontal compression circuit 61
012 is the same as that described in FIGS. 18 and 19. The input signal is band-limited by a low-pass filter, and then the sample decimating circuit decimates the horizontal sampling points. When the signal of the intermediate system is displayed as shown in FIG. 32 (a), the sample points in the horizontal direction are set to 1/4 and compressed to 1/4 times. Therefore, the sampling frequency becomes 1/4 of the original signal
The components above the 1/4 frequency band are aliasing components. In order to suppress the distortion due to this aliasing component, band limitation is performed in advance by a low-pass filter before thinning.
This sample thinning circuit reduces the number of samples to 1/4 by taking in every four sample points.

The signal subjected to the horizontal compression processing is input to the vertical compression circuit 61013. FIG. 34 shows the vertical compression circuit 6
10 is a specific configuration example of 1013. The signal that has been subjected to the horizontal compression processing is input to the line memory 6 via the input terminal 61031.
1032, coefficient unit 61034, and selector 61036 are input. The output of the line memory 61032 is the coefficient unit 6
It is multiplied by 1/2 at 1033 and input to the adder 61035,
It is added with the output of the coefficient multiplier 61034 which is 1/2 times. The output of the adder 61035 is input to the selector 61036.
The selector 61036 alternately selects and derives the outputs of the input terminal 61031 and the adder 61035 by the switching signal from the line counter 61037 synchronized with the horizontal and vertical synchronization signals.

FIG. 35A shows the principle of vertical compression when an NTSC system signal is processed as a sub-screen signal. Vertical compression reduces the number of horizontal scanning lines according to the compression ratio in the vertical direction. The principle is the same as horizontal compression, but vertical filtering requires a lie memory. Therefore, the circuit scale becomes large and a simple method is preferable. In the case of sub-screen signal processing, since the screen size is small, there is no problem even with a simple method. When an NTSC signal is processed, conversion from three to two is performed. Fig. 35
In the example of (a), the scanning line a'is generated by multiplying each of the scanning lines a and b by 1/2 coefficient, the scanning line c is output as it is, and the conversion to the scanning line b'is repeated. When vertically compressing the intermediate system signal, as shown in FIG. 35 (b), each scanning line is multiplied by a 1/2 coefficient to generate a scanning line a'from scanning lines a and b, and scanning line c, The scanning line b'is generated from d. Line counter 61037 of FIG.
Switches the counting operation according to the identification signal from the synchronization control unit. The selection of the selector 61036 is switched by this count value.

Returning to FIG. 33, description will be made. Vertical compression circuit 6
The output of 1013 is input to the selector 61014.
The selector 61014 receives the input signal based on the control of the timing control unit 61018 and outputs the input signal to the field memories 61015 and 61.
1016. Field memories 61015 and 6
1016 and the selector 61017 for selecting the output thereof are also controlled by the timing signal from the timing control unit 61018. The writing process is performed in synchronism with the sub-screen signal, and the reading process is performed in synchronism with the main-screen signal so as to be combined with the main screen for display.

FIG. 36 shows the field memory 61015.
And 61016 write and read timings are shown.
W is a write timing chart, and R is a read timing chart. The selector 61014 introduces the input signal into the memory in the written state, and the selector 610
17 derives the output of the memory in the read state.

The compression operation of the horizontal / vertical compression unit 61011 shown in FIG. 31 is the same operation for displaying either the intermediate system signal or the NTSC system signal as a sub-screen as shown in FIG. The vertical compression circuit 61013 of FIG. 34 always performs the conversion operation shown in FIG. At this time, since it is not necessary to switch the counting operation of the line counter 61037 by the identification signal of the intermediate system and the NTSC system, the configuration of the line counter becomes simple.

FIG. 37 shows another embodiment of the horizontal / vertical compression unit in the case where the sub-screen is displayed at 4: 3 as shown in FIG. 32 (b). The same parts as those in the circuit of FIG. 33 are designated by the same reference numerals as those of FIG. 33 is different from the circuit of FIG. 33 in that an area cutout circuit 61041 is provided in the preceding stage of the horizontal compression circuit 61012, and a display area generation circuit 61042 for controlling the area cutout circuit 61041 is provided. The display area generating circuit 61042 receives a sync signal synchronized with the sub-screen, and when a screen signal with a 16: 9 aspect ratio is input, it becomes a screen signal with a 4: 3 aspect ratio. As described above, the conduction period of the area cutout circuit 61041 is controlled. When a 4: 3 screen signal (NTSC system) is input, the area cutout circuit 61041 may be used as it is. In this embodiment, the horizontal compression circuit 6101
2. The vertical compression circuit 61013 may always perform the same compression process regardless of which type of signal is input, and the configuration of the vertical compression circuit 61013 is simple. Further, when the signal of the intermediate system is converted into the sub-screen, it is not visually advantageous because it does not become a horizontally elongated vertically elongated image.

As described above, according to this video decoder, when displaying an image by the signal of the current system on the image receiving system of the intermediate system, the signal of the intermediate system or the current system is displayed as a sub-screen in the margin of the display screen. The wide screen can be effectively used. In addition, FIG.
When the sub-screen display form as shown in FIG.
As described in FIG. 37, the configuration of the vertical compression circuit 61013 can be easily realized. Further, in particular, the circuit configuration of FIG. 37 has an advantage that the configuration of the vertical compression circuit 61013 can be made common to each system and the display screen does not become vertically long.

(POP display system 2 for wide screen display) As described above, a signal having an aspect ratio of 4: 3 of the current system is horizontally compressed and displayed on a wide screen compatible display, and a margin is left over. In the case of displaying the sub screen, in the above-described embodiment, the intermediate system decoder is provided in each of the main screen signal processing unit and the sub screen signal processing unit. If a plurality of intermediate system decoders are prepared, an expensive circuit will result.

Focusing on the image on the sub-screen, the sub-screen is 1/12 the size of the display surface of the wide-screen compatible display in the display shown in FIG. 32 (b). Therefore, even when the intermediate system signal is displayed as a sub-screen, even if the left and right or upper and lower information is lost, it does not matter so much in practice.

Therefore, in the next embodiment, when the wide screen is effectively used, the number of the intermediate system decoders used can be minimized.

FIG. 38 shows a video decoder which has a minimum number of intermediate system decoders and is provided with a main screen signal processing unit and a sub screen signal processing unit. Since the main screen signal processing unit of this embodiment is the same as that of the embodiment shown in FIG. 31, the same symbols as those in FIG. 31 are attached to the respective units. In this embodiment, the sub-screen signal processing unit is different from that of the previous embodiments, so this part will be described.
A sub-screen signal (NTSC system signal or intermediate system signal) is input to the input terminal 63001. This sub-screen signal is input to the Y / C separation unit 63002 and the synchronization control unit 63012. The color signal separated by the Y / C separation unit 63002 is input to the color demodulation unit 63003, and the luminance signal is input to the horizontal / vertical compression unit 63011. The demodulated color signal is also input to the horizontal / vertical compression unit 63011 from the Y / C separation unit 63002. Horizontal vertical compression unit 63
The 011 compressed (4: 3 aspect ratio) signal is
It is input to the synthesis unit 62020. Specific examples of each block of this circuit are as described above. The horizontal compression unit 62005 of the main screen signal processing unit is described in FIG. 18, and the motion adaptive scanning line conversion unit 62007 is described in FIG. In this embodiment, the circuit described in FIG. 37 is adopted as the configuration of the horizontal / vertical compression unit 63011 of the sub-screen signal processing unit. Although one sub-screen signal processing unit is shown in the drawing, a plurality of sub-screen signal processing units are actually provided in parallel. The horizontal / vertical compression unit 6301 shown in FIG.
The first feature is that the display area generation unit 61042 and the area cutout circuit 61041 are provided, and the horizontal and vertical compression areas are extracted in advance.

If the display form shown in FIG. 32 (b) is taken by using this circuit, the horizontal / vertical compression unit 63011 is used.
The horizontal compression ratio at 1 may be 1/4. The compression ratio in the vertical direction is a compression for converting the number of scanning lines from three to two, and the compression as shown in FIG. 35 (a) is performed.

According to this embodiment, the sub-screen is displayed in the margin portion generated when the signal of the screen according to the current method is displayed on the wide screen. The screen can be displayed as a sub screen. In this case, the sub-screen processing unit does not have to include the intermediate method decoder, and the cost of the system can be reduced.

(Display of Character / Graphic Information in Margins Generated on Wide Screen) As described above, when a signal having an aspect ratio of 4: 3 of the current method is horizontally compressed and displayed on a wide screen compatible display, The wide screen has a blank area. In the above-described embodiment, the example in which the sub-screen is displayed in this margin is shown. However, various usage forms are possible for the method of using the blank space.

Therefore, in the next embodiment, information such as a character graphic is displayed in the margin.

FIG. 39 shows still another embodiment.
In the figure, the same parts as those of the circuit of FIG. Since the main screen processing unit remains unchanged, FIG.
The main screen processing unit of is shown by one block. Therefore, a portion added to the circuit configuration of FIG. 31 will be described. The main screen signal input terminal 62001 is connected to the character multiplex decoder 64001. The character multiplex decoder 64001 decodes the character multiplex signal multiplexed on the main screen signal and inputs the decoded R, G, B signals to the selector 64002. This selector 64002
Further, it is also possible to input R, G, B signals such as character graphics from a personal computer or the like via an external connection terminal. The selector 64002 selects an input according to a command signal from the user control unit, and the matrix circuit 6
Input to 4003. The matrix circuit 64003 is
The input R, G, B signals are matrix-calculated to generate a luminance signal Y and color signals I, Q and input to the selector 61008. The output of the intermediate system decoder 61010, the outputs of the Y / C separation unit 61002 and the color demodulation unit 61003 are also input to the selector 61008. Selector 61
The synchronization control unit 7021 switches between the output of the intermediate system decoder and the output of the Y / C separation unit 61002 and the color demodulation unit 61003 depending on whether the sub-screen signal is the intermediate system signal or the current NTSC system signal. However, the output selection state of the matrix circuit 64003 can be switched by a command from the user control unit. Selector 6100
The output of No. 8 is input to the horizontal / vertical compression unit 61011 as shown in FIG. 33 or 37, converted into a 4: 3 sub-screen signal, and input to the synthesis unit 62020. The synthesizing unit 62020 further includes a character / graphic generating unit 6400.
The signal from 4 is also input. This character / figure generating unit 6
4004 generates channel number display data in response to a channel selection operation, for example. The channel number includes the selection status of the main screen and the selection status of the sub screen, and the sub screen further includes channel number displays such as the first sub screen and the second sub screen. Further, in response to the information from the user control unit, the graphic information includes contrast, brightness,
There is information indicating video circuit or audio circuit settings such as color density, tint, sharpness, volume, greenhouse, balance, etc., and video terminal numbers may be displayed.

According to the above-described embodiment, it is possible to project characters and graphic information in the blank area generated on the wide screen and use them effectively. In addition, the display of character and graphic information makes it easier to operate and handle the system. This is because when the user is in trouble with the operation, the character / graphics generating unit can be used to display the operation procedure and the like. Furthermore, even when the history of the operation is checked, the contents can be easily checked by storing the past operation content as character code data by the control microcomputer of the system and reading it when performing the tick. . As a display form of the sub-screen, there is a form as shown in FIG.

(Volume Display System on Margin of Wide Screen) As described above, a wide-screen compatible display is provided by horizontally compressing a signal having an aspect ratio of 4: 3 and adjusting the aspect ratio in the vertical direction. When displayed in
A wide screen has a horizontal blank area. In the above-described embodiment, the example in which the sub-screen is displayed in this margin is shown. However, various usage forms are possible for the method of using the blank space.

In this embodiment, the volume is displayed by using the blank area.

FIG. 40 shows an embodiment of a video decoder for realizing volume display. Since the main screen processing unit is the same, the main screen processing unit in FIG. 31 is shown by one block. The selector 2000 selectively derives an audio signal input from the outside or a received audio signal input from the RF input processing unit 1000 according to the user's selection, and the audio amplifier 30.
00 (see FIG. 1). Voice amplifier 3000
Output is supplied to the speaker 4000. By the way, the output of the selector 2000 is further output to the volume display generation unit 640.
It is designed to be input to 10. Here, the volume display generation unit 64010 generates a video signal (Y, I, Q signals) corresponding to the volume of the input audio signal and synthesizes it with the synthesis unit 6202.
0 can be supplied. Volume display generation unit 64010
Receives a timing signal from the synchronization control unit of the main screen processing unit. This is when the main screen processing unit processes an NTSC system signal (aspect ratio 4: 3), for example, performs horizontal compression processing, and performs processing such that a blank portion is generated on a wide screen. This is to obtain the timing for displaying the volume in the margin.

FIG. 41 shows a concrete configuration example of the volume display generating unit 64010. Input terminal 64011 has selector 2
The audio signal from 000 is input. This audio signal is
The sample and hold circuit 64012 samples at a constant cycle and holds until the next cycle. In accordance with this hold level, the vertical address generator 6401 of the next stage
3, the vertical address value changes. Vertical address generator 6
The vertical address output by 4013 is input to the character generation unit 64016. Character generator 640
Reference numeral 16 stores in advance data capable of changing the color saturation and color tone of the character in accordance with the vertical address. For example, the data is stored in advance in the ROM. On the other hand, a horizontal timing signal indicating the horizontal display position of the main screen is supplied from the main screen processing unit to the input terminal 64014.
Therefore, based on this horizontal timing signal, the horizontal address generation unit 64015 outputs the address indicating the horizontal display position of the blank space. This horizontal address is supplied to the horizontal address input section of the character generation section 64016,
The output timing of the character is determined. The luminance signal and the color signal output from the character generation unit 64016 are converted into analog signals by the D / A converters 64017 and 64018, respectively, and input to the above-described synthesis unit 62020. As a display form of the volume, for example, FIG.
As shown in (a), (b), and (c), it is possible to display in the right margin portion, the left margin portion, or any one of the left and right margin portions.

According to the above-mentioned embodiment, the volume display can be obtained in the margin portion generated on the wide screen by the relatively simple means, and the wide screen can be effectively utilized. Further, by displaying the volume, the effect of the display device can be enhanced.

(Automatic vertical expansion setting process when receiving the current NTSC system) A signal having an aspect ratio of 4: 3 of the current system is compressed in the horizontal direction to match the aspect ratio in the vertical direction and displayed on a display compatible with a wide screen. In this case, a wide screen has a blank portion in the horizontal direction. In addition, when the 4: 3 aspect ratio signal of the current system is vertically expanded to match the horizontal aspect ratio and displayed on a wide screen compatible display, the image displayed on the wide screen is vertically up and down. Information will be missing. Both cases have advantages and disadvantages. When conversion is performed based on the size in the vertical direction, blank areas are generated on the left and right, and the wide screen is not effectively used. Further, when the conversion is performed based on the horizontal size, the upper and lower parts of the sent information are truncated. In the latter case, it is inconvenient for the viewer if the portion to be cut off contains important information depending on the broadcast content. In the former case, when a horizontally long image like a cinema scope is transmitted according to the current television system, the display screen becomes smaller.

Therefore, in this embodiment, when the current standard signal is displayed on the display screen, there are provided means for vertically extending the horizontal direction and means for controlling the display position of the vertically extended signal. By providing a means for detecting the nature of the received signal and a means for switching the vertical expansion ratio, display area, or conversion processing to an appropriate one according to the broadcast content, problems caused by effective use of the wide screen It is a solution.

In FIG. 43, a signal detector 64020 is added to the embodiment shown in FIG. Y
/ C separation unit 6002, intermediate system decoder 6010, color demodulation unit 6003, motion adaptive scanning line conversion unit 6007, vertical expansion unit 6012, selector 6008, synchronization control unit 7000.
The basic configuration and operation of are similar to those described with reference to FIG. 27, and the display form is essentially as shown in FIG.
However, in this embodiment, the luminance signal separated by the Y / C separation unit 6002 is guided to the signal detection unit 64020, and the content of the television signal is determined here. Further, the signal detection unit 64020 is provided with the synchronization control unit 7000,
A determination signal indicating whether the input signal is of the intermediate system or the current system is input. Here, when the current NTSC system signal is input, the signal detection unit 64020 detects the signal content. The signal content is a video such as a cinemascope in which the upper and lower sides of the video signal are masked with black levels, a video including a telop, and the like. When a telop is included, the vertical expansion rate is lowered so that the telop appears on the screen, and in the case of an image like a cinemascope, the vertical expansion rate is increased to effectively utilize the screen.

FIG. 44 shows a concrete example of the configuration of the signal detector 64020. The luminance signal is transmitted through the input terminal 64021 to the telop detector 64022 and the upper and lower mask detector 640.
23 is input. The telop detector 64022 detects whether or not the video signal includes a telop, and when the telop is included, gives the display signal to the indicator via the output terminal 64024. Further, a telop detection signal (for example, high level) is also supplied to the logical sum circuit 64025.
give. When the output of the OR circuit 64025 becomes high level, the vertical expansion unit 6012 is set to reduce the vertical expansion rate. The upper and lower mask detector 64023 determines whether the upper and lower parts of the screen of the video signal are masked with a black level. When the mask portion is detected, a low-level mask detection signal is output and the gate circuit 640 is output.
26 to the OR circuit 64025. The gate circuit 64026 operates from the synchronization control unit 7000 to the terminal 640.
It is a circuit for making the mask detection signal conductive only when the gate signal given to 27 is a discrimination signal indicating the current system processing mode. This is to prevent the mask detection signal from being erroneously guided to the logical sum circuit 64025 when the intermediate system signal (before decoding) is input to the upper and lower mask detectors 64023. The mask detection signal and the telop detection signal are given to the logical sum circuit 64025 in order to give priority to the telop detection result over the mask detection result, and the logic output is appropriately switched depending on the positive / negative logic of each detection signal.
When both are detected at the same time, the telop detection has priority and the vertical expansion rate decreases.

FIG. 45 shows a concrete example of the structure of the telop detector 64022. The luminance signal is passed through the input terminal 64030 and the horizontal high pass filter (H-HPF) 64031.
Is input to the vertical high-pass filter (V-HPF) 64032. The outputs of the horizontal high pass filter 64031 and the vertical high pass filter 64032 are input to the slice circuits 64033 and 64034, respectively. Slice circuits 64033 and 64034 each give a counted signal to counting circuit 64035 when the brightness level exceeds a preset level. Since the character signal and the like are expressed at high and low luminance levels and are high frequency components, the presence or absence of the character signal can be detected by slicing this component. The counting circuit 64035 counts the counted signals in a predetermined image area, and outputs a telop detection signal when the count value exceeds a predetermined value. The counting area of the counting circuit 64035 is designated by the counting area generator 64036. The counting area generator 64036 specifies the counting area based on the horizontal synchronizing signal H and the vertical synchronizing signal V of the input video signal.

As the counting area, for example, as shown in FIG. 46A, the screen is divided into a plurality of blocks and it is determined whether or not there is a character signal in each block, or
In the telop, the upper or lower area is divided into a plurality of areas to detect the character signal of each block. When detecting at the upper and lower parts, the counting circuit 64035 is provided at the center of the screen.
Is stopped.

When the telop is detected as described above, the vertical expansion rate is lowered so that the telop is not masked, and in the case of an image such as a cinemascope, the vertical expansion rate is increased and the wide screen is effective. Can be used. The motion adaptive scanning line conversion unit 6007 is as shown in FIG. 20, and the vertical expansion unit 6012 is shown in FIGS.
As shown in. When the expansion rate is switchable, some vertical expansion sections as shown in FIG. 29 are prepared in advance and are switched according to the output of the logical sum circuit 64025. Then, the memory control unit 6 shown in FIG.
The vertical expansion rate can be easily changed by changing the control timing 04 and the coefficient switching timing of the coefficient generator 6019. As an example of this, FIG. 47 shows a timing chart for converting four input scanning lines into five.
A1, A2, ... Represent scanning lines, and when four scanning lines are output from the field memory, there is an output stop period of one horizontal period, and such reading is repeated. And the output of the line memory is 4 once every 5 lines.
The scan line input second is read twice. As the coefficient of the coefficient unit, as shown in FIG. 47, a coefficient of 1, 1/5, 4/5, 2/5, 3/5, etc. is given to each readout scanning line to realize vertical expansion. . By the conversion from these four lines to the five lines, 5/4 times expansion in the vertical direction can be obtained. Similarly 5 to 6
Even when expanding to a book, the vertical expansion rate can be set by changing the memory control and the timing of generation of the coefficient.

The display position of the image display may be controlled according to the telop detection result.

For example, when there is a telop at the bottom of the screen, as shown in FIG. 48 (a), the vertically expanded screen is truncated and displayed, and when there is a telop at the top of the screen, FIG. The lower part of the screen may be truncated and displayed as shown in (b). To change the vertical display position, the write timing to the field memory 6013 shown in FIG. 29 may be controlled. In this case, the initial value of the output address of the memory control unit 6014 is switched and controlled according to the telop detection. It Whether the telop is at the upper part or the lower part of the screen may be monitored by monitoring which block of the blocks shown in FIG. 46 has the telop detected.

In this embodiment, the arrangement of the motion adaptive scanning line conversion unit 6007 and the vertical expansion unit 6012 shown in FIG. 43 may be reversed. There is no problem even if the interpolation scanning line is created and the number of scanning lines is converted after performing the vertical expansion control.

As described above, according to this embodiment, the display aspect ratio can be switched according to the received signal, and the original aspect ratio can be displayed for the intermediate system signal and the current system signal. The conversion method or the area to be displayed can be changed depending on the broadcast content, and the landscape wide screen can be effectively used. Then, the inconvenience of the lack of a part of the screen can be remedied by switching the conversion method. (Letter Box Processing in Intermediate System Signal Processing) (Auxiliary Signal Multiple Processing System) In the above system, the video decoder 6000 has a built-in sequential scanning line conversion unit and an intermediate system decoder (FIGS. 1 and 2). 1
7).

By the way, in the case of transmitting a wide image having an aspect ratio of 16: 9 while being compatible with the current method by the intermediate method, it is necessary to perform compression in the vertical direction by letterbox processing. When this vertical compression processing is performed, the vertical resolution is reduced, and since the side panel processing is performed, the resolution of the side panel is reduced.

In the conventional dedicated system only for the letterbox system, it is possible to secure a sufficient multiplex transmission area in the upper and lower mask portions, and it is possible to multiplex and transmit the vertical high frequency components in this area. However, in the intermediate method, the area of the upper and lower mask portions is remarkably narrower than the upper and lower mask portions in the conventional letterbox processing, although the late box processing is performed. In the conventional dedicated side panel processing, a part of the center panel is removed and the high frequency components of the side panel are transmitted by a method such as frequency multiplexing. If some of the components are removed, the image quality deteriorates when projected on the current receiver.

As described above, when a wide screen signal is transmitted by the conventionally proposed intermediate system, the vertical resolution of the image at the time of decoding and the resolution of the side panel are reduced.

Therefore, in this embodiment, it is possible to prevent the vertical resolution from being lowered due to the vertical compression due to the intermediate method letterbox processing, and to prevent the resolution of the side panel from being lowered due to the intermediate method side panel processing. A method decoding processing device is provided.

In this embodiment, 20 scanning lines of the upper and lower mask portions are used as auxiliary signal multiplex regions of the vertical high frequency component by letterbox processing, and 20 scanning lines of the upper and lower mask portions are used as side signals. It is used as a side panel high frequency component multiple region by panel processing. As a result, it is possible to reproduce a high quality wide screen signal (16: 9) without lowering the vertical resolution of the decoded image.

FIG. 49 shows a specific configuration example of the intermediate system encoder, and FIG. 50 shows a specific configuration example of the intermediate system decoder 62010.

In the encoder of FIG. 49, 5001
Is a letterbox processing unit, and 5002 is a side panel processing unit. The letterbox processor 5001
The wide panel signal is compressed in the vertical direction, and the side panel processing unit 5002 is a unit that divides the side panel and the center panel and multiplexes the side panel signal to the upper and lower mask units. Input terminal 50 of letterbox processing unit 5001
A luminance signal Y having an aspect ratio of 16: 9 is input to 03 with 525 lines and a 1: 1 progressive scanning signal. Further, color signals (I, Q) having an aspect ratio of 16: 9 are input to the input terminal 5004 by 525 lines and a 1: 1 sequential scanning signal.
The luminance signal Y is input to the vertical direction compression unit 5005 and compressed in the vertical direction by a factor of 5/6. The luminance signal compressed in the vertical direction is subjected to the motion adaptive center signal encoder 5006.
Is input to the upper and lower mask portion Vh / VT encoder 5007. The upper and lower mask parts Vh / VT encoder 500
The output of 7 is the VT reproducing unit 5008 and the non-linear converting unit 500.
9 is input. Motion adaptive center signal encoder 50
In the case of converting the scanning line into the interlaced scanning signal, 06 is adaptively converted according to the motion detection signal from the motion detection unit 5010. The upper and lower mask parts Vh / VT encoder 5
In 007, a signal to be multiplexed on the upper and lower mask portions is created by using each of the 40 scanning lines above and below the center signal. In the letterbox processing, 20 upper and 20 lower scanning lines are used from the 40 upper and lower scanning lines, and the remaining 20 upper and lower scanning lines are used by the side panel processing unit. V
h signal is 400 to 480 [TV /
[Vertical high frequency component] of the [book], and the VT signal refers to a component of 200 to 400 [TV / book] in a moving image. The upper and lower mask parts Vh / VT encoder 5007 are
A motion detection signal from the motion detection unit 5010 is also supplied, and a VT signal is generated for a moving image and a Vh signal is generated for a still image. The VT reproducing unit 5008 performs timing and signal conversion for multiplexing the VT signal in the moving image on the upper and lower mask portions of the signal obtained by the motion adaptive center signal encoder 5006. The non-linear conversion unit 5009 is for controlling the levels of the signals multiplexed in the upper and lower mask units, and when the intermediate system signal is reproduced by the receiver of the current system, the multiplexed signal is conspicuous in the upper and lower mask units. It is for suppressing. Motion adaptive center signal encoder 50
The output of 06 is input to the normalization encoder 5011.
In addition, the normalization encoder 5011 includes a nonlinear conversion unit 500.
The output from 9 is also provided. The letterbox-processed luminance signal is input to the side panel high-frequency / low-frequency dividing unit 5013 of the side panel processing unit 5002. The side panel high-frequency low-frequency division unit 5013 includes a color signal processing unit 5
In 012, the color signal subjected to the same processing as the luminance signal is also supplied.

The low-frequency components of the luminance and chrominance signals divided by the side panel high-frequency / low-frequency dividing unit 5013 are input to the center panel processing unit 5014 and subjected to horizontal companding processing. Then, it is input to the emphasis circuit 5015, emphasized, and input to the combining unit 5016. On the other hand, the high frequency component of the side panel is input to the rearrangement unit 5017, arranged at a position where it can be multiplexed on each scanning line of the upper and lower mask units, and input to the upper and lower mask unit pre-processing unit 5018 to be spectrally shaped. This is to prevent the signal in the mask section from becoming conspicuous when it is received and reproduced by the current receiver. The output of the upper / lower mask unit pre-processing unit 5018 is also the combining unit 5.
The luminance signal and the chrominance signal input to 016 and output from the combining unit 5016 are input to the NTSC encoder 5019 and output to the output terminal 5020 as an intermediate television signal compatible with the current method.

The above is the encoder for generating the intermediate signal, and the signal processing thereof will be further described.

FIG. 51 shows the progress of the encoding process. In the same figure, (a) is a 16: 9 wide screen signal, which is a signal of 525 lines / 1: 1. When this signal image is displayed on the current receiver as it is, it becomes a vertically long image as shown in FIG. Therefore, letterbox processing section 5
In 001, the image is compressed by a factor of 5/6 in the vertical direction and 480 scanning lines are converted into an image of 400 scanning lines to obtain an image as shown in FIG. Next, in the side panel processing unit 5002, the center panel is expanded 10/9 times to match the horizontal length of the current system, and the side panel is compressed 1/5 times. A part of the compressed high frequency signal of the side panel is multiplexed and transmitted to each of the 40 scanning lines existing as upper and lower mask portions.

FIG. 52 shows a signal format encoded in this way. The high range component of the side panel is 22-
31st scan line, 252-261st scan line, 28
The 5th to 294th scanning lines and the 515th to 524th scanning lines are multiplexed. The auxiliary signals Vh and VT used in the letterbox processing are 32 to 4
First scan line, scan lines 242 to 251 surface, 295
To the 304th scan line and the 505th to 514th scan lines. Therefore, the side panel processing and the letterbox processing are used to perform multiplex transmission by using the upper and lower 20 scanning lines as additional signal areas. The low-frequency components of the side panel are compressed so that they do not appear on the effective screen of the current method, and the center panel is expanded horizontally.

FIG. 53 shows a horizontal companding format. FIG. 16A shows the horizontal period of a 16: 9 wide screen signal and the division position of each panel. The effective scanning period of the original image is 747 with the sampling clock of 4 fsc.
The samples are used as a center panel and the left and right 41 samples are used as side panels. In the vicinity of the boundary between the side panel portion and the center panel portion, for example, for 17 clocks, companding is not performed. 63 of the center panel
One clock is expanded to 70 as shown in FIG.
1 clock (10/9 times). Also, 41 clocks of the side panel is compressed to 9 clocks (1/5
Times). This processing is performed by the center panel processing unit 5014.

Next, the high frequency components of the side panel are divided and taken out so that the center panel and the side panel cross each other, as shown in FIG. Then, only the extracted high frequency components of the side panel are collected, and the high frequency components extracted from 20 scanning lines are time-multiplexed with one scanning line as shown in FIG. This processing is performed by the rearrangement unit 5017. The scanning lines on which the high frequency components of the side panel are multiplexed are the scanning lines on which the above-mentioned upper and lower mask portions are located. Since the information of 20 side panels is multiplexed on one scanning line, for example, the high frequency components of the left panel can be multiplexed on the 20 scanning lines of the upper mask portion, and the lower mask portion can be multiplexed. The high frequency components of the right panel can be multiplexed on these 20 scanning lines (see FIG. 52).

FIG. 50 shows a concrete example of the structure of a decoder for decoding the intermediate system signal transmitted as described above. This decoder is a side panel processing unit 65001.
And letterbox processing 65002.

The luminance signal Y and the color signals I and Q generated by the NTSC decoding process are input to the de-emphasis circuit 65 via the input terminals 65003 and 65004, respectively.
005 is input. In addition, the signals of the upper and lower mask portions are input to the upper and lower mask portion Y / C separation portion 6 through the input terminal 6500 8.
5009 is input. De-emphasis circuit 6500
The output of No. 5 is input to the center panel processing unit 65006, and is horizontally expanded. That is, the side panel is expanded by 5 times and the center panel is compressed by 9/10 by the center panel processing unit 65006. The output of the center panel processing unit 65006 is input to the combining unit 65007. The luminance signal and the chrominance signal, which are the high-frequency components of the side panel separated by the upper / lower mask unit Y / C separation unit 65509, are input to the rearrangement unit 65010. Sorting unit 6
In 5010, the side panel high frequency components described in FIG. 53D are divided into the original scanning line positions, rearranged, and input to the combining unit 65007.

In this state, the signal has returned from the reception of FIG. 51 (d) to the screen of the state of FIG. 51 (c). Next, the inverse conversion of letterbox processing is performed. The path of the luminance signal will be described. The luminance signal is a normalization decoder 6
5011 and the display switching unit 65017. The output of the normalization decoder 65011 is input to the motion adaptive center signal decoder 65012 and the non-linear conversion unit 65013. In the motion adaptive center signal decoder 65012,
A process of adaptively converting the interlaced scanning signal into a sequential scanning signal according to the motion detection signal from the motion detection unit 65014 is performed. The non-linear conversion unit 65013 level-controls and outputs the auxiliary signals (Vh signal, VT signal) multiplexed in the upper and lower mask units, and supplies the auxiliary signals to the upper and lower mask units Vh / VT decoder 65015. The upper / lower mask unit Vh / VT decoder 65015 reproduces the Vh signal and the VT signal multiplexed in the upper / lower mask unit according to the motion detection signal from the motion detection unit 65014, and the motion adaptive center signal decoder 65012 and the vertical expansion unit. 65016. The output from the motion adaptive center signal decoder 65012 is also supplied to the vertical expansion unit 65016.
As a result, when the vertical expansion unit 65016 performs vertical expansion (6/5 times), an image signal having an aspect ratio of 16: 9 is obtained. The output of the vertical expansion unit 65016 is input to the display switching unit 65017. The display switching unit 65017 is a circuit used when the output of the side panel processing unit 65001 is directly output to the output terminal 65018. This is used when a signal is transmitted by performing only side panel processing on the broadcast side. Alternatively, it is used when the display itself has a vertical stretching function.

The color signal output from the combining unit 65007 is the color signal processing unit 65019 and the display switching unit 6502.
It is input to 0. The color signal processing unit 65019 also performs conversion processing to progressive scanning, and the output thereof is input to the display switching unit 65020. As a result, a color signal having an aspect ratio compatible with a wide screen can be obtained at the output terminal 65021.

According to the above-described embodiment, when transmitting an intermediate system signal, the delay time is 480 in the late box processing.
When [TV / book] is a signal of 400 [TV / book] and upper and lower mask parts are made, 20 pieces each of the upper and lower mask parts are used as auxiliary signal (Vh, VT signal) areas of vertical high frequency components,
When further side panel processing is performed, 2 of the upper and lower mask parts
Zero lines are used as high-frequency component multiple regions of the side panel. As a result, the vertical resolution of the decoded image does not decrease, and the resolution of the side panel does not decrease. Therefore, high-quality 16: 9 wide-screen image reproduction becomes possible.

(Scanning line number conversion vertical expansion processing system) When a television signal is subjected to letterbox processing and transmitted, a signal of 480 scanning lines is compressed by 5/6 times in the vertical direction and 400 scanning lines are transmitted. It is a signal to the book. If a signal with 480 scanning lines is converted from 6 to 5 as it is, aliasing distortion occurs. Therefore, even if the original 480 signals are converted from 5 to 6 with a decoder, good image reproduction is possible. Can't get Therefore, first, a signal of 480 scanning lines is applied to the vertical frequency 400 by a vertical low pass filter.
[TV / book] The following signals and 400-480 [TV / book
Signals of 400 [TV / book] or less and convert signals of 400 [TV / book] or less to a ratio of 6 to 5 to obtain signals of 400 scanning lines. It is multiplexed with the mask and transmitted.

By doing so, it is possible to prevent the occurrence of aliasing distortion when converting from a ratio of 6 lines to a ratio of 5 lines to obtain a signal having 400 scanning lines. Therefore, in the decoder,
The number of scanning lines is 48 by converting the signal of the book from 5 to 6
The original 480 signal is restored by returning the signal to 0, obtaining a correct 400 [TV / book] signal, and adding the 400 to 480 [TV / book] signals multiplexed and transmitted to the upper and lower mask parts. Images on [TV / book] can be played correctly.

However, in reality, 400 [TV /
A vertical low-pass filter that band-limits to [book] does not always have ideal characteristics. Therefore, the signal of 400 [TV / book] band-limited by the vertical low-pass filter is reduced to 5/6
Even if the signal is converted into double scanning lines and converted into 400 signals, aliasing distortion occurs, and good reproduction cannot be obtained in the decoder. In order to prevent this aliasing distortion, the cutoff frequency of the vertical low-pass filter may be lowered, but if this is done, the band that must be transmitted by the upper and lower mask parts will increase. Since the band that can be transmitted by the upper and lower mask parts is fixed, the information of the upper and lower mask parts cannot be completely transmitted, and as a result, there is a problem that the original image cannot be reproduced well in the decoder.

Therefore, in this embodiment, the aliasing cancel signal capable of canceling aliasing distortion generated when compressed in the vertical direction is separately transmitted, and the aliasing signal separately transmitted when it is expanded in the vertical direction on the decoder side. By adding the cancellation signal to the expansion signal, correct image reproduction can be obtained.

FIG. 54 shows the vertical compression unit 5 shown in FIG.
005 shows a specific example of the configuration.

The signal of 480 scanning lines input from the input terminal 55001 is supplied to the vertical low pass filter 55002 and the subtractor 55003. In the vertical low-pass filter 55002, the signal of the vertical frequency 480 [TV / book] is band-limited to the signal of 400 [TV / book], and the output thereof is input to the subtractor 55003 and the scanning line converter 55004. The scanning line conversion unit 55004 converts the number of scanning lines into a ratio of 6 to 5, and outputs a scanning line signal of 400 lines. The 400 signals are input to the output terminal 55008 and the scanning line conversion unit 55005. Scan line conversion unit 5
Reference numeral 5005 is for performing inverse conversion, which converts from 5 to 6 scanning lines. The returned signal is the subtractor 55
006 and is subtracted from the output of the vertical low pass filter 55002. As a result, the subtractor 55006 can obtain a component corresponding to an error caused by the conversion of the number of scanning lines (vertical compression, vertical expansion).

On the other hand, from the subtracter 55003, 400-4
A signal of 80 [TV / book] is obtained, and this signal is input to the adder 55007. In the adder 55007, the vertical high frequency components 400 to 480 [TV / book] signals and the error component at the time of decoding (hereinafter referred to as a cancel signal) obtained from the subtractor 55006 are added and added to the output terminal 55.
It is output to 009.

The signal at the output terminal 55008 is input to the motion adaptive center signal encoder 5006 and transmitted as a center signal, and the signal at the output terminal 55509 is input to the upper and lower mask portion Vh / VT encoder 5007 and multiplexed and transmitted to the upper and lower mask portions. Will be done.

Scan line conversion unit 55005 and subtractor 5500
The significance of obtaining the error signal by using 6 will be further described with reference to FIG. That is, in this embodiment,
When a signal of 480 [TV / book] (Fig. 56 (a)) is passed through a vertical low-pass filter to be converted to 400 [TV / book] and vertically compressed by 5/6 times, a folding component occurs. (FIG. 56 (b)). Therefore, when this signal is vertically expanded to 6/5 times in the same way as on the decoder side, a folding component remains as shown in FIG. Therefore, in order to cancel this, a cancel signal as shown in FIG. 7D is created using the signals in FIGS. 8A and 8C, and this is added to the Vh signal in the upper and lower mask portions and transmitted. To do.

FIG. 55 shows a concrete example of the structure of the vertical extension section 65016. The input terminal 65031 has 400 scanning lines transmitted as a center signal and a vertical band of 4
A 00 [TV / book] signal is input. This signal is converted by the scanning line conversion unit 65032 at a ratio of 5 to 6 and vertically expanded by a factor of 6/5, and becomes a signal of 480 scanning lines and a vertical band of 400 [TV / line]. This signal is input to the adder 65033. On the other hand, the input terminal 650
34 is a top / bottom mask part Vh / VT decoder 65015.
The Vh signal decoded by is input. Vh signal is 4
This is a signal of 00 to 480 [TV / book] and includes the return cancellation signal described in FIG. Therefore, the folding component (hatched portion in FIG. 56 (c)) included in the output signal of the scanning line conversion unit 65032 is removed by the cancel signal, and the folding component is removed at the output terminal 65035 480 [TV / book ] Signal is obtained.

Here, the compression processing of 5/6 times will be described.

FIG. 57 (a) shows the relationship of forming 5 scanning lines from 6 scanning lines. FIG. 6B shows an example of an arithmetic expression for obtaining five scanning lines. x is the value of the pixel of the scanning line used for calculation, and y is the value of the pixel of the created scanning line. And h is a coefficient. Also in FIG.
In FIG. 59, c1 to c4 indicate frequency characteristics in the process of undergoing compression processing, and d1 to d5 in FIG. 59 indicate impulse responses.

FIG. 60A shows a concrete example of the structure of the scanning line conversion unit 55004 shown in FIG. Input terminal 5501
Signals input from 0 are line memories 55011 and 55
It is input to the series circuit of 012 and 55013. The signal of the input terminal and the output signal of each line memory are set by the coefficient unit group 55.
014 and input to the coefficient unit groups 55015, 55
The same is input to 016 and 55017. The output of the coefficient unit group 55014 is added by the adder 55018 and input to the selector 55022, and the output of the coefficient unit group 55015 is added by the adder 55019 and selected by the selector 55022.
To the adder 550.
20 is added and input to the selector 55022, and the output of the coefficient unit group 55017 is added by the adder 55021 and input to the selector 55022. As a result,
The calculation shown in 7 (b) is performed. Selector 55022
Selects an appropriate operation output under the control of the timing generator 55023 and introduces it into the field memory 55024. In this case, the address generation timing of the address generator 55025 is also controlled by the timing signal of the timing generator 55023. Field memory 5
When it is read from 5024, the time axis is compressed and output to the output terminal 55026.

FIG. 60B shows the line memory 55011.
~ 55013 output and the input signal x of the line memory 55011 and the newly generated signal y, the selector 55022 selects the outputs of the adders 55018 to 55021 from y0 to y4 sequentially, and selects one time. It is controlled to stop and select the output of the adder 55018 again as y5.

According to the above-described embodiment, the canceling signal which can cancel the aliasing component generated because the characteristic of the vertical low-pass filter cannot be made to be the ideal characteristic on the decoder side is separately added to the upper and lower sides. It is transmitted together with the mask signal. Then, on the decoder side, the cancel signal is extracted and added to the signal of the center panel, so that the aliasing component remaining when scanning line conversion is performed can be canceled and a good reproduced image can be obtained.

(Motion adaptive three-dimensional band limiting processing system)
In the conventional encoder side, when converting a sequential scanning signal into an interlaced scanning signal, an inter-frame process is performed in the still image unit and an intra-frame process is performed in the moving image unit. Therefore,
In principle, an S / N improvement effect can be obtained with a still image, but an S / N improvement effect cannot be obtained with a moving image. Therefore, in an image transmitted by performing the motion adaptive processing, a clear image can be obtained in the still image portion, but in the moving image portion, the image quality deterioration in the portion where noise is noticeable becomes more conspicuous and unnatural.

Therefore, in the next embodiment, in the motion adaptive center signal encoder 5006 and the motion adaptive center signal decoder 65012, the image quality is deteriorated by performing the three-dimensional processing particularly for improving the S / N of the moving image portion in accordance with the visual characteristics. To obtain an intermediate encoder and a decoder that do not cause

FIG. 61 shows a concrete configuration example of the motion adaptive center signal encoder 5006. FIG. 62 shows a three-dimensional spectrum of a transmission signal created by this encoder section, and FIG. 63 shows a Vh / VT encoder 5007 and a VT reproducing section 5 for processing auxiliary signals, that is, Vh and VT signals.
The concrete structural example of 008 is shown.

First, this embodiment utilizes that the image quality is not so different from the original image quality even when the three-dimensional band limitation is performed to some extent even during the moving image. Therefore, noise is reduced in the transmission system during moving images by performing three-dimensional band limiting during moving images and the same three-dimensional band limiting on the receiving side. Also, since three-dimensional band limiting is performed on the transmitting side, the source In addition to the S / N improvement, the S / N improvement is obtained by the inter-frame processing even during a still image, and there is no visual deterioration in image quality.

First, the three-dimensional spectrum of the transmission signal is shown in FIG.
2 and its advantages will be described. The figure (a) is a spectrum in a moving image mode, and the figure (b) is a spectrum in a still image mode. In the still image mode, the high frequency range (15 Hz or higher) is cut, so random noise can be significantly reduced. On the other hand, in the moving image mode, the temporal component is 30 Hz as shown in FIG.
The above exists, but this component is in the vertical low range and is 200
Up to [TV / book]. The vertical high-frequency component (VT signal) of 200 to 400 [TV / book] has a temporal component of up to 15 Hz. Since the impulse noise component is considered to be a three-dimensional high frequency component, limiting the high frequency component in this way provides a considerable visual S / N countermeasure. Further, it has been confirmed by an experiment that the motion image is not unnatural due to such a limitation. In this way, even if the current system receiver is used, S /
N improvement can be obtained and good image quality can be obtained.

An encoder realized based on the above idea is the circuit shown in FIG. The input progressive scan signal is vertically compressed by the vertical compression unit 5005 and is introduced into the still image processing system and the moving image processing system.

The still image processing system delays the input signal by 1/60 second.
It is input to the 1/60 delay device 55031 and the adder 55032. The adder 55032 obtains the sum signal between the preceding and following frames. This signal is input to a switch 55034 which is multiplied by ½ by a ½ coefficient multiplier 55033 and turned on / off in a vertical cycle, and one field is taken out. This results in a signal whose temporal direction is limited to 15 Hz. The output signal of the switch 55034 has a field frequency of 30.
It becomes Hz, and switch 5 which distributes the input signal in the horizontal cycle
Input to 5035. The signal of one of the divided scanning lines is input to the time extension unit 55036, the time in the horizontal direction is doubled in time, and the signal is supplied to one input terminal of the switch 55039. The signal of the other scanning line that has been distributed is delayed by the 1/60 delay device 55037 and is expanded by the time expansion unit 5.
It is input to 5038 and the horizontal direction is expanded to double the time.
It is supplied to the other input terminal of the switch 55039. The switch 55039 obtains an interlaced scanning signal by selectively deriving signals from one and the other input terminals alternately in a vertical cycle, and inputs this to the mixing section 55040.
The signal input to this mixing unit 55040 is as shown in FIG.
It is a still image component of 400 [TV / book] or less shown in (b).

The moving image processing system supplies the input signal to the vertical low-pass filter 55041 and the vertical high-pass filter 55042, and the vertical low-pass filter 55041 outputs the input signal as shown in FIG.
The vertical low-frequency components below 200 [TV / book] shown in 2 are derived. The output of the vertical low-pass filter 55041 is delayed by a 1/60 delay unit 55043, thinned by a switch 55045 which is turned on / off in a vertical cycle by a control signal from a timing generator 55048, and input to a time expansion unit 55046. Here, time extension in the horizontal direction is performed and the result is input to the adder 55047. Adder 55
At 047, the VT signals to be multiplexed in the upper and lower mask parts are added to form the spectrum of FIG.
Input to 0. In the mixing unit 55040, the motion detecting unit 5
A mixing ratio of a signal suitable for a moving image and a signal suitable for a still image is controlled according to the motion detection signal from 010, and the output is input to the normalization encoder 5011. Each switch 5503
4, 55035, 55039, and 55045 are given from the timing generator 55048 which outputs the timing signal in synchronization with the clock from the synchronization control unit 55049.

FIG. 63 shows the vertical high-pass filter 55 described above.
042 and V from the vertical compression unit 5005
A concrete configuration example of the Vh / VT encoder 5007 to which the h signal is supplied is shown.

The VT signal is supplied to the input terminal 55051, and the Vh signal is input to the input terminal 55052. V
The h signal is a signal of 400 to 480 [TV / book] as shown in FIG. It also includes a cancel signal for removing the aliasing component. The VT signal is limited to a horizontal frequency component of 0.8 MHz or less by the horizontal low-pass filter 55053, and the band limiting unit composed of the 1/60 delay unit 55054, the adder 55055, and the 1/2 coefficient unit 55056 is used. Switch 5 limited to the area shown in (a)
Input to the 5056A. That is, the temporal high frequency component is deleted by the three-dimensional processing. Switch 55056
A performs field thinning with a timing signal of 1 / fV cycle, and inputs the output to the switch 55057.
This switch 55057 thins the lines with a timing signal of a 1/2 fH cycle and outputs the output from the mixing section 55058.
Input to VT via output terminal 55059
Input to the reproduction unit 5008. The VT reproducing unit 5008 converts the input signal into the interlaced scanning signal, and adds it to the adder 55.
Enter 047. As a result, the signal having the spectrum shown in FIG. 62A is obtained from the adder 55047.

On the other hand, the Vh signal is input to the horizontal low-pass filter 55060 via the input terminal 55052 and is also band-limited to 0.8 MHz or less. The output of the low-pass filter 55060 is input to the vertical shift unit 55061 and the signals of 400 to 480 [TV / book] are 0 to 0.
It is shifted to the vertical frequency domain of 80 [TV / book].
The output signal of the vertical shift unit 55061 is input to the scanning line conversion unit 55062, the number of scanning lines is converted into a ratio of 6 to 5, and the image signal of 400 lines is compressed in the vertical direction. This signal is subjected to temporal band limitation in a band limiting section composed of a 1/60 delay unit 55063, an adder 55064, and a 1/2 coefficient unit 55065, input to a switch 55066, field thinned, and further switched. The data is input to 55067, thinned out, and input to the mixing unit 55058.

In the mixing unit 55058, the motion detecting unit 501
The mixing ratio of both input signals is adjusted based on the motion detection signal from 0, and the output is input to the 1/5 time compression unit 55068. In this time compression unit 55068, the mixing unit 5505
8 output signals are horizontally compressed to 1/5 and converted to 1/5 image signals. This image signal is multiplexed on the scanning lines of the upper and lower mask portions, but is input to the rearrangement portion 55069 and processed so that it can be multiplexed as a Vh / VT signal for 5 lines per one scanning line to be transmitted. , To the terminal 55070. Therefore, the upper and lower 20
With a book, 20 × 5 × 2 = 200 auxiliary signals can be transmitted. The timing generator 55071 outputs the timing signals of the respective parts and switches 55056.
The control timing signals A, 55057, 55066, and 55067 are output.

According to the above-mentioned embodiment, the processing of the path following the vertical low pass filter 55041 and the processing of the path following the vertical high pass filter 55042 are performed on the signal in the moving image mode, and the adder 55047 , FIG. 62
The spectrum components as shown in (a) are transmitted. As a result, the S / N improvement of a moving image, which could not be realized in the past, is realized by the three-dimensional processing adapted to the visual characteristics, and the image can be reproduced by the current receiver without causing the image quality deterioration.

(Motion Picture Mode Sequential Scanning Signal Transmission Processing System) Conventionally, in the case of creating a sequential scanning signal from an interlaced scanning signal, a vertical interpolation scanning line is created by performing in-field processing during a moving picture. Therefore, in principle 200
Only vertical resolution up to [TV / book] can be obtained, and the aliasing component due to interlaced scanning cannot be removed. In order to eliminate the aliasing component of the interlaced scanning signal, it is necessary in the encoder in advance to limit the vertical band to the high frequency component and the low frequency component in the temporal direction so that aliasing does not occur. However, when an intermediate system signal with such band limitation is received and reproduced by a current system receiver, a problem arises in that a sufficient vertical resolution cannot be obtained this time.

Therefore, in this embodiment, the vertical direction high-frequency component is not band-limited, and good vertical resolution can be obtained even when received by the current type receiver, and progressive scanning is performed for reproduction by the intermediate type decoder. (EN) An intermediate encoder and a decoder which can be reproduced without leaving a folding component even when conversion is performed. Therefore, in this system, the moving image processing section is provided with features.

FIG. 64 shows the three-dimensional spectrum in the moving image mode transmitted by this system, in which the VT signal is multiplexed in the vertical high band and transmitted. That is,
For the temporal low frequency component VL, the horizontal direction 0.
Bandwidth is limited to 400 [TV / line] up to 8 MHz and 200 [TV / line] above 0.8 MHz, and the high frequency component in the temporal direction is band limited to 200 [TV / line] and transmitted. With a signal having such a spectrum, it is possible to obtain a moving image without deterioration of vertical resolution even when it is reproduced by a receiver of the current system. In addition, the horizontal direction of the low frequency range of 0.8 MHz or less, the vertical direction of 200 to 400 [TV /
The component VT of [book] is transmitted by being multiplexed with the upper and lower mask portions via a route different from the center signal processing. As a result, using the VT signal reproduced from the upper and lower mask parts, the temporal high frequency component (corresponding to the VT signal) included in the center signal
Is canceled, the aliasing component generated in this area (generated during interlaced scanning conversion) is removed, and the good quality VT signal reproduced from the upper and lower mask portions is added again to the center signal, thereby sequentially performing no aliasing. It is for obtaining a scanned image.

FIG. 65 shows a VT reproducing section 500 shown in FIG.
8 shows a specific configuration example of No. 8. The VT signal (400 [TV / book]) extracted from the Vh / VT encoder is
It is input to the vertical interpolation circuit 55082 via the input terminal 55081 and vertically interpolated into components of 0 to 200 [television / book]. The output of the vertical interpolation circuit 55082 is input to the line inverter 55083 and converted into a vertical high frequency signal of 200 to 400 [television / book]. Line invertor 5
Reference numeral 5083 includes an inverter 55084 for inverting the input, and a switch 55085 for alternately selecting the output and the direct input. The output of the line inverter 55083 is distributed to each line by the switch 55086. The odd-numbered lines are input to the time extension unit 55087 to be doubled in time in the horizontal direction, and the even-numbered lines are delayed by 1/60 seconds by the 1/60 delay unit 55088 and then expanded in the time extension unit 5.
It is input to 5089 and the horizontal direction is doubled in time.
The outputs of the time extension units 55087 and 55089 are supplied to one input terminal and the other input terminal of the switch 55090 which is switched for each field. As a result, an interlaced scanning VT signal (200 to 400 [television / book]) is obtained at the output of the switch 55090. This signal is the compensation filter 550.
Depressed by 91, 200 [TV / book] / 3
The 0 Hz component is increased in gain and input to the adder 55047 as described with reference to FIG.

As described above, the input VT signal supplied to the input terminal 55081 is multiplexed on the upper and lower mask portions and transmitted on another path for the intermediate method decoding. This is because the VT signal processed and transmitted by the VT reproducing unit 5008 does not reduce the vertical resolution of the moving image of the current receiver. Further, the timing signal of the circuit of each part is output from the timing generator 55092.

FIG. 66 is a concrete example of the configuration on the decoder side which handles the above-mentioned VT signal, and shows the motion adaptive center panel signal decoder 65012 in more detail. The signal output from the normalization decoder 65011 is input to the double speed conversion unit 65041 and the non-linear conversion unit 65013.
The interlaced scanning signal whose horizontal speed has been doubled by the double speed conversion unit 65041 is input to the still image processing unit and the moving image processing unit.

From the still image processing section, the double speed conversion section 6 will be described.
The signal output from the 5041 is a 1/60 delay device 65042.
And is directly supplied to the other input terminal of the switch 65043. The switch 65043 alternately selects the signal of the input terminal to one side and the other side at a cycle of 1/2 fH to select S /
Derivation of N improved signal and field switch 650
44. The field switch 65044 is 1
ON / OFF at the cycle of / fV, and the output is 1/60 delay device 65
The voltage is supplied to one input terminal of the switch 65046 via 045 and directly to the other input terminal of the switch 65046. The switch 65046 alternately selects and derives signals from one input terminal and the other input terminal at a cycle of 1 / fV, obtains a sequential scanning signal adapted to a still image, and supplies it to the mixing unit 65047.

The moving image processing unit outputs the 400 [TV / book] 60 Hz sequential signal output from the double speed conversion unit 65041 as follows.
Field-delayed by 1/60 delay device 65048 and subtractor 65
049 is input. This subtractor 65049 has Vh reproduced by the upper / lower mask portion Vh / VT decoder 65015.
T signal is switch 65050, compensation filter 65051
Is being supplied through. Therefore, the subtracter 65049 obtains a signal from which the VT signal in which the folding components are overlapped is removed. The output signal of the subtractor 65049 is input to the vertical interpolation circuit 65052 and vertically interpolated, and the adder 6
5053 and the motion detection unit 65014 are input. The adder 65053 includes a Vh / VT decoder 6 for the upper and lower mask portions.
The VT signal reproduced by 5015 is time-adjusted and supplied by the delay device 65054. Therefore, the adder 6505
A signal in the moving image mode to which the VT signal has been added is again obtained from 3, and this signal is input to the mixing unit 65047. The mixing unit 65047 controls and outputs the mixing ratio of the signals in the still image mode and the moving image mode in accordance with the motion detection signal from the motion detection unit 65014, and outputs this.
Supply to. Other circuits are as described in the letterbox processing unit 65002 of FIG.

According to the above-described embodiment, since the signal on the center side can be transmitted without limiting the band of the vertical high frequency component on the encoder side, the vertical resolution does not deteriorate even when reproduced by the current receiver. . On the decoder side, the VT signal on the center side is once removed by using the VT signal multiplexed on the upper and lower mask portions, so that the output of the subtractor 65049 is a 200 [TV /
[Book] is returned to the following components, and then the adder 65053 adds VT signals of 200 to 400 [television / book] and 0.8 MHz. Therefore, on the wide screen side, there is no deterioration in vertical resolution and there is no interference with crosstalk. Therefore, the difference between the image quality in the still image mode and the image quality in the moving image mode is small, and the unnaturalness of the image due to the motion adaptive operation is improved.

(Subband transmission system of vertical high frequency component) When a signal subjected to letterbox processing is transmitted by interlace, vertical resolution is insufficient. For example 480
Compressing the [TV / book] image by 5/6 will produce 400 images. However, in order to transmit by interlace so that aliasing does not occur in the video mode, 40
Only 200 [TV / book], which is half of 0, can be transmitted. This is because in-field processing is performed.

This embodiment is characterized in the transmission and reception processing method of the vertical high frequency components in the moving image mode. Even if the progressive scan signal on the sending side is converted into an intermediate system signal during transmission, it is still on the receiving side. This is an improvement so that the same progressive scanning signal as on the sending side can be reproduced by decoding the signal of the intermediate system. In this embodiment, the encoder side divides the progressive scanning signal in the moving image mode into a low frequency band and a high frequency band by a filter of −3 dB at 200 [TV / book], and the low frequency component is multiplexed with the center signal and transmitted. , The high-frequency component is transmitted as an interlaced signal in the upper and lower mask parts, and the receiving side interpolates the signal multiplexed in the center signal and the high-frequency component multiplexed in the upper and lower mask parts with an interpolation filter having the same characteristics as the transmitting side. It is a thing.

FIG. 67 shows an encoder section in this embodiment, particularly a motion adaptive center signal encoder and a V
The structure of the T reproducing unit 5008 is shown in detail. The respective parts in this figure are the same as those shown in FIGS. 61 and 65. That is, the input progressive scan signal is input to the vertical compression unit 500.
It is vertically compressed at 5, and is introduced into the still image processing system and the moving image processing system.

The still image processing system is collectively shown as a still image processing unit 55100. The still image processing unit 55100 obtains the interlaced scanning signal and inputs it to the mixing unit 55040. The moving image processing system supplies the input signal to the vertical low-pass filter 55041 and the vertical high-pass filter 55042, and the vertical low-pass filter 55041 causes the vertical low-pass of 200 [TV / book] or less shown in FIG. The components are derived. The output of the vertical low-pass filter 55041 is delayed by a 1/60 delay device 55043, line thinned by a switch 55045 which is turned on / off in a vertical cycle, and input to a time extension unit 55046. Here, time extension in the horizontal direction is performed and the result is input to the adder 55047. Adder 55
At 047, the VT signals to be multiplexed in the upper and lower mask parts are added to form the spectrum of FIG.
Input to 0. In the mixing unit 55040, the motion detecting unit 5
A mixing ratio of a signal suitable for a moving image and a signal suitable for a still image is controlled according to the motion detection signal from 010, and the output is input to the normalization encoder 5011.

Upper and lower mask portion Vh / VT encoder 500
VT signal output from 7 (400 [TV / book])
Is input to the vertical interpolation circuit 55082 and vertically interpolated into components of 0 to 200 [television / book]. The output of the vertical interpolation circuit 55082 is the inverter 55084 and the switch 5
2 is input to the line inverter composed of 5085.
It is converted to a vertical high frequency signal of 00 to 400 [television / book]. The output of the line inverter is distributed to each line by the switch 55086. The odd lines are input to the time extension unit 55087 and the horizontal direction is doubled in time,
The even-numbered lines are delayed by 1/60 second by a 1/60 delay device 55088 and then input to a time expansion unit 55089 to double the time in the horizontal direction. Time extenders 55087 and 550
The output of 89 is a switch 550 that is switched for each field.
90 to one and the other input terminals. As a result, an interlaced scanning VT signal (200 to 400 [television / book]) is obtained at the output of the switch 55090. This signal is dropped by the compensating filter 55091 2
The component of 00 [TV / book] / 30 Hz is increased in gain and input to the adder 55047 as described with reference to FIG.

FIG. 68 shows a decoder for correspondingly processing the signal from the encoder, and shows in detail the motion adaptive center signal decoder 65012 and the upper and lower mask parts Vh / VT decoder 65015.

Motion adaptive center signal decoder 65012
66 is the same as that shown in FIG. 66,
The still image processing system is collectively shown by one block 65060. In the moving image processing system, for the vertical low-frequency component, the subtractor 65049 cancels the VT signal multiplexed on the center signal once by the VT signal multiplexed on the upper and lower mask portions, then vertically interpolates, and then adds again. VT that has been multiplexed on the upper and lower mask parts in the container 65053
Signals are added.

Next, the upper and lower mask portions Vh / VT decoder 6
The reordering unit 65061 first reorders signals from the non-linear conversion unit 65013. this is,
This is a process that is completely opposite to the rearrangement of the rearrangement unit 55069 described with reference to FIG. 63, and the high frequency components of five scanning lines are multiplexed in each scanning line of the upper and lower mask units, respectively. (Vertical direction). The signal multiplexed on the upper and lower 20 scanning lines is 20 ×
5 × 2 = 200 lines / 1/60 seconds. This gives 200
An image signal of a book is generated, input to the 5 × time expansion unit 65062, and horizontally expanded by 5 times. The decompressed signal is input to the double speed conversion unit 65063 and is sequentially converted into a scanning signal. At this point, 200/1 /
Since it is a signal of 30 seconds, it is converted into a signal of 400 lines / 1/30 second in the vertical interpolation circuit 65064. Then 1/60
The delay device 65065 and the switch 65066 are used to perform twice swing scanning to change the signal to 400 lines / 1/60 second. The switch 65066 switches every 1/60 seconds, and its timing is controlled by the timing signal from the timing generator 65070. Timing generator 65
Reference numeral 070 creates a timing signal using the vertical synchronization signal from the synchronization control unit 7000. Switch 6506
The output signal of 6 is used for compensation of the center signal, as shown in FIG. Also switch 65066
Output is passed through the coefficient unit 650 which is passed only in the still image mode.
67, and the output of the coefficient unit 65067 is converted into a signal of 480 scanning lines / 1/60 second by the scanning line conversion unit of the vertical direction expansion unit 65016, and then input to the vertical shift circuit to 400 ~ 480 [TV / book] vertical frequency range is shifted.

The operation of the VT decoding described above is further shown in FIG.
This will be described with reference to FIG. FIG. 69A shows an image of Vh / VT signals multiplexed in the upper and lower mask portions. This Vh / VT signal is rearranged in the rearrangement unit 65061 as shown in FIG. 7B, and then time-extended to 5 times, and becomes a signal corresponding to the center panel as shown in FIG. To be converted. Next, by double speed conversion, it becomes a signal of 200 lines / 1/30 second of sequential scanning ((d) in the same figure), and 400 lines /
1/30 second signal. Next, by scanning twice, a signal of 400 lines / 30 seconds is obtained as shown in FIG.

Returning to FIG. 68, the description will be continued.

On the other hand, the center signal of the center panel is double-speed converted by the double-speed converter 65041, and the still image processor 650
60 and the 1/60 delay device 65048 which is the moving image processing unit. The output signal of the delay device 65048 is the subtractor 6504.
In FIG. 9, the VT signal area in which the aliasing component exists is temporarily canceled to become a signal of 200 lines / 1/30 second in which the aliasing component is removed, and a signal of 400 lines / 1/60 seconds is added in the vertical interpolation circuit 65052, and the addition is performed. Input to the device 65053. Then, the adder 65053 reproduces the vertical high-frequency component and inputs it to the mixing unit 65047.

FIG. 70A shows a vertical low pass filter 55041 and a vertical high pass filter 550 on the encoder side.
42 and vertical interpolation circuits 65052 and 6506 on the decoder side
4, the relationship of the adder 65053 is extracted and shown.
Further, FIG. 3B shows a signal image in each signal processing process.

The input progressive scan signal is band-limited by the vertical low-pass filter 55041, interlaced, and sub-sampled for transmission. The output of the vertical high-pass filter 55042 is also subsampled, multiplexed with the upper and lower mask parts, and transmitted. In the vertical interpolation circuits 65052 and 65064, the sub-sampled signals are filled in by interpolation and reproduced again as a sequential scanning signal, and the low frequency component and the high frequency component are added by the adder 65053. When the vertical direction is taken on the horizontal axis as shown in FIG. 7C, the sub-sample by the interlaced scanning is f (t) = (1/2) (1 + cos2π (2fs) t) (1) Modulation and equalization. However, fs / 2 is 4
00 [TV / book]. Subsampling the signal of equation (1) with fs, f (n) = Σ {(tn (1 / fS)) ・ (1/2) (1 + cos2π (2fs) t)} = (1/2) {1 + (-1) ⁿ } (2) Further, when offset sub-sampling is performed at a position shifted by π, f ′ (n) = (1/2) {1-(-1) ⁿ } ... (3). Therefore, when the transmission at the center panel and the transmission at the upper and lower mask portions are sampled and transmitted by the above equations (2) and (3), the signal y (n) obtained at the receiving side is y (n) = [hl ( n) * x (n) × (1/2) {1 + (-1) n}] * gl (n) + [hh (n) * x (n) × (1/2) {1-(- 1) n}] * gh (n) (4) where hl (n) and hh (n) are vertical low pass filters 5504
1. In the impulse response of the vertical high-pass filter 55042, gl (n) and gh (n) are vertical interpolation circuits 65052 and 650.
64 shows the impulse response of 64. When Z-transforming equation (4), Y (z) = (1/2) [Hl (z) X (z) + Hl (-z) X (-z)] Gl (z) + (1/2) [ Hl (z) X (z) -Hh (-z) X (-z)] Gh (z) (5) where X (z) = Σx (n) Z ⁿ (n = 0 ~ ∞) is ^{- (Z) -n = X (} -z) Σ (-1) n x (n) Z -n = Σx (n). Here, if Gl (z) = Hl (z) = H (z) Gh (z) = Hh (z) = H (-z), then Y (z) = (1/2) [H (z) X (z) + H (-z) X (-z)] H (z) + (1/2) [H (-z) X (z) -H (z) X (-z)] H (- z) = (H (z) ² + H (-z) ² ) X (z) (6).

Therefore, in order for the signal y (n) output from the adder 65053 to match the original signal X (n) on the transmission side,
H (z) ² + H (-z) ² = 1 (7). H (z) ² is H (z) (fs / 2) = 24
Since it is 0 [TV / book] shifted, each filter characteristic must be set so as to be attenuated by -3 dB near 200 [TV / book] as shown in FIG.

As described above, this embodiment is characterized in the transmission and reception processing method of the vertical high frequency component in the moving image mode, and even if the progressive scanning signal on the sending side is converted into the intermediate system signal during transmission. The receiving side is improved so that the same progressive scanning signal as the transmitting side can be reproduced by decoding the intermediate system signal. On the encoder side, the progressive scan signal in the movie mode is 200 [TV / book]-
It is divided into a low band and a high band by a filter of 3 dB, the low band component is multiplexed and transmitted to the center signal, the high band component is transmitted as an interlaced signal in the upper and lower mask parts, and is multiplexed to the center signal on the receiving side. The interpolated signal and the high frequency components multiplexed in the upper and lower mask parts are respectively interpolated by the interpolation filters having the same characteristics as the transmitting side.

(Motion Detection System Limited to Vertical Low-Frequency Component) As described above, the encoder section and the decoder section of this system process the signals of the respective sections by the motion adaptive processing. Here, in the decoder of this system, the signal used for motion detection is limited to the vertical low-frequency component. This is because it is very difficult to detect the movement of all components from the high frequency range to the low frequency range, which causes image quality deterioration due to error detection, and because the transmitted signal is interlaced, it is caused by aliasing components due to interlacing. This is because false detection of motion occurs.

FIG. 72 shows an intermediate system decoder in this embodiment, and particularly shows in detail the motion detecting unit 65014 and its related portions. The parts common to FIGS. 66 and 68 are designated by the same reference numerals. The vertical low-frequency component in the moving image mode is once canceled in the subtractor 65049 by the VT signal multiplexed in the center signal by the VT signal multiplexed in the upper and lower mask portions, and then vertically interpolated by the vertical interpolation circuit 65052. Adder 650 again
At 53, the VT signals multiplexed in the upper and lower mask portions are added. The output of the vertical interpolation circuit 65052 is the 1/30 delay unit 65081 and the subtractor 650 of the motion detection unit 65014.
82 is input. The subtractor 65082 is a 1/30 delay device 6
Difference between input and output signals of 5081 (difference between frames)
And supplies the output to the absolute value circuit (ABS) 65083. The output of the absolute value circuit 65083 is input to a non-linear circuit 65084 that performs non-linear conversion, subjected to non-linear processing and directly input to the maximum value circuit 65086, and at the same time, the maximum value circuit 6508 is passed through a 1/60 delay unit 65085.
6 is input. The output of the maximum value circuit 65086 is used as a motion detection signal. The figure shows an example in which the mixing unit 65047 is supplied.

FIG. 73 shows the three-dimensional spectrum of the signal input to the double speed conversion unit 65041. In the case of a moving image, only components of 200 [television / book] or less have components up to 30 Hz in the time direction. In the case of still images, all are limited to 15 Hz or less in the time direction.

In the case of a moving image, VT signals (components of 200 [television / book] or more) are multiplexed on the upper and lower mask parts.
Therefore, the output signal of the upper / lower mask portion Vh / VT decoder 65015 is the above-mentioned VT signal. Where the VT signal is
It is turned on / off for each line by a switch 65050, and is input to a subtractor 65049 via a compensation filter 65051. Therefore, the output of the subtractor 65049 is a signal in which the VT signal is canceled. Therefore, the signal from which the VT signal has been deleted in the moving image mode spectrum shown in FIG. 73 is input to the vertical interpolation circuit 65052. Here, if the cutoff characteristic is set to 200 [television / book] in advance as the filter characteristic of the vertical interpolation circuit 65052, the output becomes a spectrum having no aliasing component.

Therefore, by performing motion detection using this component, motion detection using a signal with no aliasing distortion is obtained, and error detection is eliminated.

(Masking Section Multiplex Transmission System) In letterbox processing, it is difficult to transmit vertical high frequency components, since normally time compression is performed in the vertical direction to reduce the number of scanning lines. Therefore, as described above, the vertical high frequency components are multiplexed and transmitted in the upper and lower mask portions.

On the other hand, with regard to progressive scanning conversion, the transmitting side converts it to interlace and transmits it, so that a perfect progressive scanning image cannot be obtained on the receiving side, and image quality is deteriorated. Therefore, the auxiliary signals for sequential scanning are also multiplexed and transmitted to the upper and lower mask portions.

However, when the above two signals are simultaneously multiplexed in the upper and lower mask portions, the characteristics of the respective signals are different and the upper and lower mask portions have a small area, so that a sufficient transmission amount cannot be secured.

Therefore, in this embodiment, paying attention to the signal of the moving image mode and the signal of the still image mode, vertical high frequency signals of 400 [television / book] or more are compressed in the vertical direction and VT which is an auxiliary signal of the progressive scanning signal. After matching the phase with the signal, motion adaptive processing is introduced, and vertical high-frequency signals are transmitted for still images and used for high-resolution image reproduction of up to 480 lines, and for moving images auxiliary for progressive scanning. The VT signal, which is a signal, is transmitted to generate sequential moving images with image quality deterioration.

FIG. 74 shows a vertical high frequency component (Vh signal),
Upper and lower mask portions Vh / VT for simultaneously multiplexing auxiliary signals (Vt signals) necessary for progressive scan conversion on the upper and lower mask portions.
The details of the encoder 5007 are shown. This figure is the same as the content shown in FIG. The Vh signal, which is a vertical high frequency component, is a signal of 400 [television / book] to 480 [television / book] generated at the time of vertical compression. VT
The signal is a signal having a band of 200 to 400 [television / book]. Therefore, the VT signal is 400 images, but the Vh signal is 480 images. The VT signal is band-limited to, for example, 0.8 MHz by the horizontal low-pass filter 55053. 1/60 delay device 55054 and adder 55
055 and the coefficient unit 55056 apply band limitation in the time direction.

On the other hand, the Vh signal is band-limited to, for example, 0.8 MHz by the horizontal bandpass filter 55060.
Further, the vertical shift unit 55061 allows 400 to 480.
The vertical frequency range of [TV / book] is shifted to the range of 0 to 80 [TV / book]. This vertical shift unit 550
The output signal of 61 is multiplied by 5/6 in the vertical direction by the next scanning line conversion unit 55062 to form an image composed of 400 lines. Next, 1/60 delay device 66063, adder 55064,
Bandwidth is limited in the time direction by the bandwidth limiting unit configured by the coefficient unit 55065.

Here, the outputs of the coefficient multipliers 55056 and 55065 are subsampled by the timing signals output from the timing generator 55071, respectively. In other words, switches 55056A and 55 that are opened and closed every 1/60 second
066 is subsampled in the time direction. Further, switches 55057 and 55067 receive vertical sub-samples. However, the opening and closing at this time is 1 of sequential scanning.
It is a scanning cycle period. Each of the above subsamples has a signal of 200 lines / 1/30 second. These signals are input to the mixing unit 55058 and mixed according to the motion detection signal from the motion detection unit 5010, and the VT signal is derived in the case of a moving image and the Vh signal is derived in the case of a still image. The output signal of the switch 55057 is output to the output terminal 5
It is input to the VT reproducing section of the next stage via 5059.

The output signal of the mixing unit 55058 is input to the 1/5 time compression unit 55068 and time-compressed, and
The rearranging unit 55069 is time-phase-matched so as to be multiplexed to the upper and lower mask units, and is output to the output terminal 55070. Since the compressed signal has a horizontal period of 1/5, 200 signals can be multiplexed on 20 lines of the upper and lower mask portions.

FIG. 75 is an explanatory diagram conceptually showing the above encoding process. Since the Vh signal is an image composed of 480 scanning lines as shown in FIG. 9A, it is 4 times as shown in FIG.
The image consists of 00 lines. On the other hand, the VT signal is an image composed of 400 lines as shown in FIG.
After each signal is sub-sampled, coefficient units 55101 and 55102 in the mixing unit 55058 of FIG.
And adder 55103 mixes and performs horizontal compression
It is input to the 1/5 compression unit 55068. As a result, the image becomes 1/5 as shown in FIG. This image has 1 for the upper and lower mask parts of the center signal as shown in FIG.
Five lines are multiplexed in the horizontal scanning period. Therefore, it is possible to obtain 20 × 5 × 2 = 200 multiplexed signals for each of the upper and lower masks.

FIG. 76 shows V transmitted as described above.
A portion for decoding the h / VT signal is shown. This decoding unit is also shown in FIG. The signals of the upper and lower mask portions are subjected to processing in the rearranging portion 65061 which is completely opposite to that on the encoder side, and are arranged in the upper and lower mask portions.
Line signals are arranged vertically. Therefore, up and down 20
The signal multiplexed for 5 lines in one scanning period for each line is a signal of 20 × 5 × 2 = 200 lines / 1/30 second.
Generate 00 images. This signal is input to the 5 times time expansion unit 65062 and horizontally expanded by 5 times,
The data is input to the double speed conversion unit 65056 and converted into progressive scanning. At this point, the signal is 200 lines / 1/30 second,
A vertical interpolation circuit 65064 converts the signal into 400 lines / 1/30 second, and a 1/60 delay device 65065 and a switch 6506.
6 is input. The switch 65066 scans twice and selectively derives the direct signal and the signal from the 1/60 delay device 65065 to obtain a signal of 400 lines / 1/60 second. Switch 6
The 5066 alternately selects and derives every 1/60 seconds by the timing signal from the timing generator 65070. The timing signal from the timing generator 65070 is generated based on the vertical synchronization signal from the synchronization control unit 7000.

The output signal from the switch 65066 is input to the coefficient unit 65067 and is also supplied to the delay unit 65054 shown in FIG. Coefficient unit 65067
Is controlled by a motion detection signal from the motion detection unit 65014, and an output is obtained only in the case of a still image. Coefficient unit 65067
68 is input to the scanning line conversion unit (6/5 times) 65091 in the vertical expansion unit 65016 shown in FIG.
Vertical shift circuit 6 converted to 480 lines / 1/60 second signal
In 5092, the signal is shifted to the vertical frequency range of 400 to 48 [television / book] and added to the low frequency side signal.

FIG. 77 conceptually shows the signal processing process in the above decoder. FIG. 77 (a) shows an image of the Vh / VT signals multiplexed in the upper and lower mask portions. This Vh / VT signal is sent to the rearrangement unit 65.
061 is rearranged as shown in FIG.
Next, the signal is time-expanded to 5 times and converted into a signal corresponding to the center panel as shown in FIG. Next, by double speed conversion, it becomes a signal of 200 lines / 1/30 seconds of progressive scanning ((d) in the figure), and becomes a signal of 400 lines / 1/30 seconds as shown in (e) of the figure by vertical interpolation. . Next, by scanning twice, a signal of 400 lines / 30 seconds is obtained as shown in FIG.

As described above, in this embodiment, the vertical high-frequency signal (400, which is necessary when compressing and expanding in the vertical direction by letterbox processing and is particularly important for still images, is used.
.About.480 [TV / book]) and an auxiliary signal (200 [TV / book]) for progressive scan conversion can be multiplexed by performing motion adaptation processing required for a moving image. This is realized by phase-matching the vertical high-frequency signals VH and VT signals by sub-sampling so as to have a similar form, and by multiplexing the upper and lower mask parts by motion adaptation processing. The signals having different properties can be multiplexed on the upper and lower mask portions having a small capacity in this way because they are sub-sampled to have the same form and are mixed by the motion adaptive processing.

(Wide-screen EDTV / NTSC signal processing switching system) In the above-mentioned system, it is usually assumed that the transmitting side transmits a progressive scanning signal having an aspect ratio of 16: 9, 525 as a signal source. However, considering the compatibility with the current broadcasting equipment, when using the interlaced scanning signals with aspect ratio 4: 3, 525 lines / 2: 1 with side panel processing (processing for wide decoder) as the signal source. Also needs to be dealt with. This can be relatively easily realized on the transmission side by adjusting an optical system such as a cylindrical lens or a vertical deflection unit. However, at this time, since the Vh / VT signals are not multiplexed in the vertical upper and lower mask portions, if the Vh / VT signal decoding process is performed on the receiving side, the image cannot be reproduced correctly.

Therefore, in this embodiment, it is determined whether or not the Vh / VT signals are multiplexed, and if the Vh / VT signals are multiplexed, the above-mentioned intermediate method letterbox processing is performed and the signals are multiplexed. If not, the letterbox processing section is set to the through state.

FIG. 78 shows this embodiment, which shows a letterbox processing unit 65002 inside the intermediate system decoder, and particularly shows the configuration of the display switching unit 65017 in detail. The overall configuration of the letterbox processing unit 65002 is shown in FIG.
As shown in 0. Display switching unit 65017
Is supplied with the letterbox-decoded signal from the vertical expansion unit 65016 and the signal (direct signal) on the input side of the normalization decoder 65011. The direct signal is input to one of the selectors 65102 via the delay device 65101, and the decoded signal is input to the other of the selectors 65102. The control terminal of the selector 65102 is supplied from the synchronization control section 7000 with a wide / standard size determination signal which is an identification signal indicating the presence or absence of the Vh / VT signal. The selector 65012 selectively derives the decoded signal when the Vh / VT signal is multiplexed, and selectively derives the direct signal when the Vh / VT signal is not multiplexed. The synchronization control unit 7000
Standard / non-standard determination unit 7004 and standard wide determination unit (standard wide determination unit 7005 and non-standard wide determination unit 700
Since there is 6), the output of this determination unit can be used. When a 4: 3 signal is input, it becomes an identification signal indicating standard determination. When a 4: 3 signal of this kind is input, the synchronization control unit 7000 can obtain an identification signal indicating that the standard and wide standard has been applied and only the side panel processing has been performed. This identification signal is multiplexed and transmitted as a digital signal on a specific line in the vertical blanking period.

As described above, in this embodiment, the signal which has been subjected to the side panel processing is output through without being subjected to the letterbox processing. However, since this signal was originally processed by only the side panel processing so that a normal screen can be obtained with the current type receiver, the signal processed by the intermediate side panel encoder is compensated and returned to the original. Therefore, it is necessary to perform the drawing process. In addition, it is necessary to convert the signals into progressive scanning signals.

Therefore, in this embodiment, the display switching unit 65
NTSC progressive scan conversion processing is applied to the signal that has passed through 017 to convert it to progressive scan, and vertical expansion (6/5 times) is possible by changing the drive frequency in the liquid crystal display. I am trying.

FIG. 79 shows the above letterbox processing section 6
5 shows a block of a receiver with an intermediate scheme decoder 6010 including 5002. Intermediate method decoder 6010
Output (luminance signal and chrominance signal) is input to the NTSC progressive scan conversion unit 65105. The NTSC progressive scan conversion unit 65105 performs NTSC progressive scan conversion when a signal that has passed through the above letterbox processing unit is input, and inputs the output to the display correction unit 6009. However, when a signal subjected to letterbox processing is input, this NTSC progressive scan conversion unit 65105
Becomes through, and the output of the intermediate method decoder 6010 is directly input to the display correction unit 6009. The display correction unit 6009 can display the input signal by performing time compression / expansion by controlling the drive frequency. Therefore, the identification signal is also supplied to the NTSC progressive scan conversion unit 65105 and the display correction unit 6009. The display correction unit 6009 includes a display drive circuit using liquid crystal, and controls display position.
It is a circuit that performs time companding processing of an image signal, control of response speed, and the like.

As described above, according to this embodiment, Vh
Whether or not to process the upper and lower mask portions can be selected according to the presence / absence of the / VT signal, and the image can be correctly reproduced corresponding to the signal source on the transmitting side. It can also maintain compatibility with existing broadcasting equipment. Furthermore, by utilizing the display correction unit, it is possible to reduce hardware such as time companding processing.

(Multiple signal adaptive level conversion system) In the letterbox processing, when additional signals are multiplexed and transmitted to the upper and lower panel portions, the upper and lower mask portions appear as black bands on the upper and lower portions of the screen when projected on the current receiver. . However, since the upper and lower mask parts are multiplexed with high-frequency components highly correlated with the signal of the center part, in the case of a moving image, the motion component appears and moves slightly like a shadow in addition to the main image. Sometimes. This movement makes viewers feel uncomfortable. Therefore, if the level of the additional signal is reduced and then transmitted in order to improve such a problem, the high-frequency component of small amplitude is cut off as much as possible. Originally, the additional signals of the upper and lower mask portions are for multiplexing and transmitting high frequency components to compensate for the deterioration of resolution, but the original purpose cannot be achieved if the level of the additional signal is lowered. In addition, if the additional signal is greatly amplified when the additional signal is extracted on the receiving side in relation to the low level of the additional signal, the noise component is also amplified this time, and the S / N is deteriorated, resulting in an overall image quality. Leads to deterioration.

Therefore, in this embodiment, the method of transmitting and reproducing the additional signals multiplexed in the upper and lower mask portions is characterized to reduce the incomprehensible shadow appearing in the upper and lower mask portions, and the reproduction of the additional signal can be accurately obtained. I am trying.

FIG. 80 shows the construction of the letterbox processing section 5001 (FIG. 49) of the intermediate encoder in this embodiment, and particularly shows the normalized encoder 5011 in detail. Further, FIG. 81 shows the configuration of the letterbox processing unit 65002 (FIG. 50) of the intermediate system decoder, and particularly shows the normalization decoder 65011 in detail. Also, FIG.
2 shows a normalization characteristic in the encoder, and FIG. 83 shows a normalization characteristic in the decoder.

In this embodiment, attention is paid to the correlation between the Vh / VT signal and the center signal component of 0.8 MHz or less. Vh / VT depending on the level of the component below 0.8MHz
The adaptive processing that controls the signal level is performed.
When the level of the component below MHz is low, the level of the Vh / VT signal is not lowered so much. On the contrary, when the level of the component below 0.8 MHz is high, the level of the Vh / VT signal is lowered and the signal is transmitted. This is because when the level of the components below 0.8MHz is low, the details are visually noticeable, and on the contrary, when the level of the components below 0.8MHz is high, it is easy to see even if an error occurs after demodulation. is there.

FIG. 82 shows Vh / V in the encoder section.
Shows the normalized characteristics of the T signal. The horizontal axis represents the input level of the Vh / VT signal, and the vertical axis represents the level of the normalized Vh / VT signal. YL represents the component below 0.8MHz. OUT is an example of a formula representing a coefficient. here,
The coefficient is calculated based on the value obtained by accumulating three samples before and after the component of 0.8 MHz or less and totaling seven samples in total. When the level of YL is small, the coefficient approaches "1", and when the level of YL is high, the coefficient approaches "0".

FIG. 83 shows the normalization characteristics of the Vh / VT signal in the decoder section. It is set to obtain the original level Vh / VT signal by multiplying the coefficient opposite to that on the encoder side.

Referring to FIG. 80, normalization encoder 50
11 will be described. Motion adaptive center signal encoder 50
A part of the center signal from 06 is input to the horizontal low-pass filter 55110, components of 0.8 MHz or less are extracted, and input to the absolute value circuit 55111 to be converted into an absolute value signal. The output of the absolute value circuit 55111 is the adder 55.
It is input to 112 and is added by several samples, and this output is input to the offset generation unit 55113, and the coefficient is calculated here. Here, V to be multiplexed on the upper and lower mask portions
Since the h / VT signal uses only 40 lines above and below the 400 signals in the center part, the offset generation unit 55
The coefficient calculated in 113 is time-matched in the time matching circuit 55114 to have the same signal format as that of the upper and lower mask portions, and is input to the divider 55116. To the divider 55116, the Vh / VT signal which has been subjected to the motion adaptive processing by the upper / lower masking section Vh / VT encoder 5007 is input via the non-linear conversion section 5009. This makes V
The h / VT signal is decoded according to the normalization characteristics shown in FIG. 82, input to the combining unit 55115, combined with the signal of the center unit, and output. This gives 0.8 MH
When the level of the z component or less is large, the level of the Vh / VT signal added to the upper and lower mask portions can be lowered and the visual interference can be considerably reduced.

FIG. 81 shows a decoder corresponding to the above encoder. The brightness signal from the side panel processing unit is a separation unit 65 that separates the upper and lower mask units from the center unit.
The signal of the upper and lower mask portions is input to the multiplier 111
17 is input. On the other hand, the signal of the center portion is input to the motion adaptive center signal decoder 65012 and also to the horizontal low pass filter 65112. The 0.8 MHz or lower component extracted by the horizontal low-pass filter 65112 is converted into an absolute value signal by the absolute value circuit 65113 and input to the adder 65114. Adder 65114
Then, the addition is performed for every several samples, and the output thereof is calculated by the offset generation unit 65115 as a coefficient having a characteristic opposite to that of the encoder unit. The coefficient calculated here is input to the time matching circuit 65116 in order to make it into a format corresponding to the time of the upper and lower mask portions, and this time-matched coefficient is input to the multiplier 65117. As a result, the multiplier 65
The Vh / VT signal is obtained from 117 with the original amplitude. This signal is input to the upper / lower mask unit Vh / VT decoder 65015 via the non-linear conversion unit 65013.

By using the above system, the level of the Vh / VT signal can be made considerably low during transmission, and unnecessary shadows and the like do not appear in the upper and lower mask portions appearing in the current type receiver. For dark images, Vh /
Since the level of the VT signal is not limited so much, the S / N does not deteriorate in the decoder section.

(Nonlinear level conversion system for multiple signals)
The signal format used in the above-mentioned intermediate type encoding / decoding system is set as shown in FIG. This is the same as that shown in FIG.
Reinforcement signals by Vh / VT signals are multiplexed on the upper and lower mask portions, and high frequency components of the horizontal frequency of 0.8 MHz or more on the side panel portion are also multiplexed.

Therefore, when the levels of these multiplex signals are high, when the upper and lower mask portions are displayed by the current type receiver, they become conspicuous as interference. Therefore, when the multiplex signal level is high, the transmission side suppresses the level for transmission, and conversely, the reception side expands, and this interference can be reduced.

However, in the conventional non-linear processing, since the multiplication coefficient is determined according to the magnitude of the input signal level on the receiving side, when there is a gain change in the transmission system, the combined characteristics of both the transmitting and receiving sides. However, there is a problem that the original waveform cannot be reproduced because it is not flat.

Therefore, in this embodiment, the reference signal of the non-linear processing is multiplexed and transmitted on the empty line of the signal of the transmission format, so that it is correct on the receiving side without being affected by the gen change of the signal in the transmission system. A reproduction (a flat composite characteristic of both transmission and reception) signal can be obtained.

FIG. 84 is a diagram showing the configuration of this embodiment, showing in detail the nonlinear conversion section 5009 on the encoder side, and FIG. 85 is a nonlinear conversion section 65013 on the decoder side.
Is shown in detail. First, the principle of this system will be described.

FIG. 87 shows an example of non-linear characteristics for both transmission and reception. FIG. 87 (a1) shows the transmission side characteristic and FIG. 87 (b1) shows the reception side characteristic. The x-axis represents the amplitude of the input signal and the y-axis represents the amplitude of the output signal. On the transmitting side, as shown in the table of FIG. 2A, -x1≤x≤x1, x1 <x <x2, x≥x2, -x2 <x <-x1, depending on the magnitude of the input signal x. Five sections of x ≦ −x2 are set, and the input / output relationship is linear within each section. As the absolute value x of the input amplitude increases, the output is suppressed to 1/2 and 1/4. At this time, the non-linear characteristic is determined by x1, x2, y1, y2 and the multiplication coefficient, 1/2, 1/4.

On the contrary, on the receiving side, if the relationship shown in the table of FIG. 13B2 is satisfied, both the transmitting and receiving sides can have a generally flat characteristic. However, at this time, x1 '= y1 and x2' = y2 must be satisfied. Therefore, in the conventional non-linear processing, the multiplication coefficient is determined on the receiving side in accordance with the amplitude x'of the input signal on the premise of the table of FIG. Therefore, when the gain of the signal changes in the transmission system,
The above equation is no longer satisfied, the overall characteristics of both transmission and reception are not flat, and the original waveform cannot be reproduced.

Therefore, a reference signal as shown in (c1) of FIG.
62 lines and 525 lines) are multiplexed and transmitted. That is, x1 ', x2', and the absolute value y1'-2x used to determine the magnitude of the input signal amplitude on the receiving side.
If the absolute value y2'-4x 'is transmitted together with the signal and the input signal is determined based on this, it is possible to eliminate the influence of the gain change of the transmission system in the determination.

FIG. 84 shows the non-linear conversion section 5 on the encoder side.
009 is a concrete example of the configuration. The Vh / VT signal is input to the non-linear table 55120, and the Vh / VT signal shown in FIG.
As shown in 2), conversion processing is performed according to the input signal level, and the output is input to the selection circuit 55121.
The selection circuit 55121 is controlled by the timing signal from the control circuit 55130, outputs the Vh / VT signal in the period corresponding to the upper and lower mask portions, and selects and derives the reference signal from the reference signal generator 55129 in a specific line. To do. The reference signal is created as follows. From the level generator 55122, x1
The respective level signals of ‘x, x2’, y1 ’, y2’, and 50IRE are output, and x1 ′ and x2 ′ are delay devices 5512.
5, 55126 and the intercept generator 551
23, 55124. Section generator 5512
Y1 ′ and y2 ′ are also input to 3, 55124, and the intercept generators 55123 and 55124 are y1′−
2x ', y2'-4x2' are created and input to the delay devices 55127 and 55128, respectively. Delay device 551
The outputs of 25, 55126, 55127, 55128 and 50IRE are input to the reference signal generator 55129 and output in the form shown in FIG. 87 (c1). In this case, the level of 50 IRE is used as a reference level for offsetting, and the signals are output so as to swing with positive and negative 1/2 amplitude. In addition,
x1 ', x2', absolute values y1'-2x ', y2'-4x
The order of 2'is arbitrary.

FIG. 88 (a) shows a concrete example of the configuration of the reference signal generator 55129. x1 ', x2
The level signals of ', y1', and y2 'are calculated by the coefficient unit 5513.
1, 55132, 55133, 55134, and then input to the selection circuit 55139 and input to the selection circuit 55139 via the inverters 55135, 55136, 55137, 55138. Selection circuit 5
The 5139 selects an input by the control data of the control circuit 55130 according to the timing chart shown in FIG. The output of the selection circuit 55139 and 50IRE are added by an adder 551.
40 is added and output. 3 control circuit 55130
Are controlled based on the timing signal from the synchronization control unit 55049. The reference signal is selectively derived on the 262th and 525th lines, and the Vh / VT signal is
It is output on the 32nd to 41st lines and the 295th to 304th lines.

FIG. 85 shows a non-linear conversion section 65013 on the decoder side corresponding to the above non-linear conversion section 5009.

The Vh / VT signal output from the normalization decoder 65011 is supplied to the coefficient determining circuit 65120 and the comparator 6.
5121, coefficient units 65122 and 65123, selection circuit 6
It is input to 5127. In the coefficient determination circuit 65120,
The reference signals multiplexed on the 262nd and 525th lines are detected, and x1 ′, x2 ′ and absolute value y1′-2 are detected.
Each level signal of x ', y2'-4x2' is detected, and among them, x1 'and x2' are input to the comparator 65121 which compares the magnitude with the input signal. The output of the comparator 65121 is
It is supplied to the control terminal of the selection circuit 65127 and used as a selection control signal. Signals of five systems are input to the selection circuit 65127. x ', x2' ± (y1'-2x1
′), 4x ′ ± (y2′-4x2 ′). x2 '±
(Y1'-2x1 ') is the adder 65123 and the subtractor 651 of the signal whose amplitude has been doubled by the coefficient unit 65122.
24, y1′-2 × 1 from the coefficient determination circuit 65120
It is created by adding and subtracting ´. 4x '± (y2'-4
Similarly, x2 ′) is created by the adder 65125 and the subtractor 65126. Selection circuit 651
In 27, based on the output from the comparator 65121, one of the input signals is selectively derived according to the level magnitude of the input signal x ′.

FIG. 89 shows a concrete example of the configuration of the coefficient determining circuit 65120. Figure 8 shows the timing of the reference signal.
8 (b), the signal x ′ input to the input terminal is directly input to the synchronous adder 65131 and is also transmitted via the delay unit 65130 to the synchronous adder 6131.
Enter in 5132. Delay device 65130 has a delay time τ. The synchronous adders 65131 and 65132 add n clocks respectively, and the subtractor 65133 takes the difference between them. This output is the coefficient unit 65134.
Is multiplied by 1 / n, output to the output terminal 65138, and input to the delay device 65135. Delay device 651
35, 65136, 65137 are connected in series, and the output of each delay device is output terminal 65139, 65140, 651.
41. As a result, each output terminal 6513
8 to 65141 include x1 ′, x2 ′, and y1 ′, respectively.
Each level signal of -2x1 ', y2'-4x2' can be obtained.

According to the above-described embodiment, the reference signal for level optimization of the reinforcement signal is multiplexed and transmitted on the empty line of the signal transmission format, so that it is not affected by the gain change in the transmission system. The correct reinforcement signal can be reproduced on the receiving side, and a flat characteristic can be realized on both the transmitting and receiving sides.

[Side Panel Processing] (S / N Improvement System) In the format of this system, low-frequency components of 0.8 [MHz] or less in the horizontal side panel section are time-compressed and transmitted to the horizontal overscan section,
Playback is achieved by extending the time on the receiving side.

However, due to the time companding process, the transmission noise is shifted to the low frequency range, so that the visual S / N of the side panel is deteriorated as compared with the center panel. As a result, the joint between the center and the side panel becomes noticeable.

As a countermeasure against this, application of a motion adaptive noise reducer can be considered. However, there are problems that the image quality is deteriorated in the moving part and that it cannot be used for low S / N signals. Also,
A small amplitude level signal near the black level is also destroyed by the transmission noise.

Therefore, in this embodiment, when the side panel signal is time-compressed and transmitted, the side signal is subjected to three-dimensional emphasis processing in order to prevent visual S / N deterioration during decoding. There is. Further, by performing emphasis processing on a signal of a small amplitude level near the black level, it is possible to maintain a fine feeling in a dark image without being crushed by transmission noise.

90 and 91 show configuration examples of the emphasis circuit on the transmitting side and the receiving side.

The visual S / N deterioration of the side panel portion is improved by applying emphasis circuits in three directions of time, vertical and horizontal.

FIG. 92 shows the basic structure of the emphasis circuit.

FIG. 16A shows a pre-emphasis circuit on the transmission side, which has a cyclic structure. The signal introduced to the input terminal 55141 is transferred to the coefficient unit 55 via the subtractor 55142.
It is multiplied by k in 143 and input to the delay circuit 55144. The delay circuit 55144 delays one frame, two lines in the vertical direction, and two clocks in the horizontal direction, and delays by two clocks and supplies the delayed signals to the subtractor 55142.

The subtractor 55142 obtains the difference signal between the input signal and the delay signal, and this difference signal is multiplied by (1 + k) times by the coefficient unit 55146 and output.

As a result, the transfer function on the transmission side is He (z) = (Hk) / (Hkz ⁻² ) ... (8). However, k is a coefficient that determines the pre-emphasis amount.

FIG. 93 (a) shows this frequency characteristic.

FIG. 92 (b) shows a de-emphasis circuit having a non-recursive configuration on the receiving side. Input terminal 6515
The signal introduced to 1 is input to the adder 65154 and the coefficient multiplier 65152. Coefficient unit 65152
The signal multiplied by k is delayed by the delay circuit 65153 by the same delay amount as the delay circuit 55144 of the pre-emphasis circuit, added by the adder 65154 with the previous input signal, and multiplied by 1 / (1 + k) by the coefficient unit 65155. Is output.

As a result, the transfer function on the receiving side becomes Hd (z) = (1 + kz ⁻² ) / (1 + k) (9).

FIG. 93 (b) shows this frequency characteristic.

From the expressions (8) and (9), He (z) Hd (z) = 1 and the flatness is obtained in the total characteristics of both transmission and reception.

FIG. 90 shows a configuration example of an emphasis circuit on the transmission side to which the pre-emphasis circuit of FIG. 92 (a) is applied. The luminance signal Y and the color signal C (I, Q) signals from the center panel processing unit 5014 of FIG. 49 are input to the input terminals.

First, the luminance signal Y will be described.

The signal input to the input terminal is subjected to the above-described three-dimensional pre-emphasis processing through the time direction pre-emphasis circuit 55152, the vertical direction pre-emphasis circuit 55153, and the horizontal direction pre-emphasis circuit 55154 in series. Be seen. This output is directly input to the subtractor 55156 and band-limited by the horizontal low-pass filter (horizontal LPF) 55155, and the subtractor 551
56 is input. The subtractor 55156 takes the difference between the two signals and inputs the horizontal high frequency component to the adder 55160. Further, the output signal x of the horizontal LPF 55155 is the subtractor 551.
57 input to DC input signal P (pedestal level)
Is subtracted and input to the coefficient unit 55158.

The coefficient unit 55158 has an up / down (UP)
/ DOWN) counter 55161, for example, FIG.
As shown in (a), k = k so that signals near the black level in the time compression period of both side panel parts are pre-emphasized.
The coefficient controlled by (t) is output to the multiplier / adder 55159. The adder 55159 outputs an addition signal of this signal and the DC input signal P to the adder 55160, and the adder 55160 adds the horizontal low-frequency signal from the subtractor 55156 to this addition signal and synthesizes it by the combining unit 5016. Output to.

As a result, the emphasis output y becomes y = k (t) (x-p) + p.

The color signals (I, Q) input to the input terminal 55171 are also subjected to the same emphasis processing as the luminance signal Y and output. That is, the color signal emphasis unit includes the time direction pre-emphasis circuit 55172, the vertical direction pre-emphasis circuit 55173, the horizontal direction pre-emphasis circuit 55174, the horizontal LPF 55175, the subtractors 55176 and 55177, the coefficient unit 55178, the adders 55179, 55180, and UP / DOWN counter 55
181.

FIG. 91 shows a de-emphasis circuit on the receiving side.

The luminance signal Y introduced to the input terminal 65161 is input to the subtractor 65163 and also in the horizontal direction L.
It is input to the PF6512, the horizontal low frequency band is extracted, and the subtracter 6
It is input to 5163. The subtractor 65163 takes the difference between both signals and outputs it to the adder 65167. Horizontal LP
The horizontal low-frequency output of F65162 is further subtracted by subtractor 65164.
Is input to the coefficient unit 65165 and the DC input signal P ′ (pedestal level) is subtracted.

FIG. 95 shows a DC input signal P'generation circuit.

In the encoding format of this system, only the pedestal signal is added to the 525th line, which is an empty area, before transmission.

On the receiving side, the transmission signal introduced to the input terminal 65201 is input to one end of the AND circuit 65203. The gate pulse from the gate generation circuit 65202 is input to the other end of the AND circuit 65203, and the AND circuit 65203 selects the pedestal signal addition area of the 525th line. The output of the AND circuit 65203 is input to the selection circuit 65205 via the adder 65204. The output of the selection circuit 65205 is controlled by using the value of the counter 65207, and the input is input N times (in this case, N =
The output to the 1-clock delay circuit 65206 is continued until it becomes 256). The output of the 1-clock delay circuit 65206 is input to the adder 65204 and synchronously added with the output of the AND circuit 65203.

When this operation is repeated N times, the output of the selection circuit 65205 is input to the coefficient unit 65208, and 1 /
It is multiplied by K to obtain the DC input signal P '.

The coefficient unit 65165 shown in FIG.
Using the WN counter 65168, 1 / k = 1 / k so that signals near the black level in the time compression period of both side panel sections are de-emphasized as shown in FIG.
The coefficient controlled by (t) is output to the multiplier / adder 65166. The adder 65166 outputs an addition signal of this input signal and the DC input signal P ′ to the adder 65167,
The adder 65167 adds a subtracter 65163 to the addition signal.
The horizontal low-frequency signals from are added and output to the horizontal direction de-emphasis circuit 65169.

As a result, the emphasis output y becomes y = 1 / k (t)  (x-p ') + p'.

Hereinafter, the horizontal direction de-emphasis circuit 65 will be described.
169, the vertical direction de-emphasis circuit 65170 and the time direction de-emphasis circuit 65171 are shown in FIG.
The de-emphasis circuit in (b) is applied, and the output from the time-direction de-emphasis 65171 is shown in FIG.
Is supplied to the center-panel processing unit 65006 indicated by.

Color signal C introduced to input terminal 65181
Similar de-emphasis processing is performed on (I, Q) and output to the center panel processing unit 65006 in FIG. Color signal de-emphasis system is horizontal LPF6
5182, subtractors 65183 and 65184, coefficient unit 65
185, adders 65186, 65187, UP / DOW
N counter 65188, horizontal de-emphasis circuit 65189, vertical de-emphasis circuit 6519
0, a time direction de-emphasis circuit 65191.

As described above, in this embodiment, in the side panel processing, the three-dimensional emphasis processing is applied to the visual S / N deterioration of the side panel portion due to the time compression processing of the side signal. An improvement can be obtained, and by performing emphasis processing on a small amplitude level signal near the black level, it is possible to maintain the fineness in a dark image without being crushed by transmission noise.

(Masking section color multiplexing / separation system) When the luminance signal Y and the color signal C of the side panel section are simultaneously multiplexed and transmitted to the upper and lower mask sections, for example, if the multiplexing is performed by time division, a sufficient transmission capacity is obtained. Cannot be ensured, the signal band must be limited, and the side panel portion becomes more blurred. Further, when frequency multiplexing is performed as in the case of normal NTSC, when crosstalk occurs in the upper and lower mask portions, the crosstalk component is expanded by the side panel due to processing such as rearrangement and becomes conspicuous, resulting in remarkable image quality deterioration.

Therefore, in this embodiment, when the high frequency component of the side signal is transmitted in the side panel processing section, the band limitation is devised to improve the image quality when the side panel section is reproduced, and at the same time, the current image receiver is used. It is intended to realize a system capable of suppressing the signal of the side panel portion from being conspicuous when the intermediate signal is reproduced.

FIG. 96 shows an embodiment of the encoder side, and the rearrangement section 5017, upper and lower mask section pre-processing section 5018, combining section 5016, NTSC encoder 50 shown in FIG.
The configuration of 19 is shown in detail.

A luminance signal and a color signal are input to the input terminals 5013a and 5013b.

Each signal is input to the side panel high band / low band splitting unit 5013 which splits the high band and the low band of the side panel. The low-frequency component of each signal is further processed by the center panel processing circuit 5
Selection circuits 55191 and 5519 which are processed by the emphasis circuit 5015 via 014 and constitute the combining unit 5016.
2 is input to each one end.

The high frequency components (Y,
C) is the field memory 551 of the rearrangement unit 5017.
93 and 55194, respectively. The field memories 55193 and 55194 are used by the timing generator 55.
The signals are rearranged and output using the control signal from 195. The luminance signal output of the field memory 55193 is
It is input to the low pass filter (LPF) 55196 and the delay device 55197 whose cutoff frequency is set to 3 MHz. The selection circuit 55198 selects the signal of the LPF 55196 and the signal that has passed through the delay unit 55197, and the combining unit 5
It is supplied to the other end of the selection circuit 55191 of 016.

The output color signal of the field memory 55194 is the LPF 55 whose cutoff frequency is set to 0.5 MHz.
It is input to 199. The selection circuit 55200 is the LPF5.
The signal of 5199 and the 0 level signal are selected and input to the other end of the selection circuit 55192.

[0275] Selection circuit 551 which constitutes synthesis section 5016
9, 55192 switches between the center signal of the emphasis circuit 5015 and the signals of the upper and lower panel parts of the selection circuits 55198 and 55200 and outputs them. Selection circuit 55192
The output color signal of F is the color carrier wave in the multiplier 55201.
It is modulated by sc and input to the adder 55202. The adder 55202 is used for the modulated color signal and the selection circuit 55191.
The frequency-division-multiplexed signal with the luminance signal from the signal is output to the output terminal 5020 as a composite video signal.

The above encoding process will be further described in an image manner with reference to FIGS. 98 (a) and 99.

Luminance signal and color signal side panel SPY
1, SPC1 rearranged respectively, SPY2, SPC2
Arrange as shown in. The side panel of the luminance signal has its band limited by using the LPF whose cutoff frequency is set to 3 MHz for each line which is the same as the luminance signal of the rearranged array. The side panel of the color signal has a band limited for each line of the rearranged array by using an LPF having a cutoff frequency set to 0.5 MHz, and the other lines have 0 bands.
To be The band-limited chrominance signal is modulated by fsc and then frequency-multiplexed with the band-limited luminance signal. That is, as shown in SPYC, a line having only the luminance signal and a line having the luminance signal and the color signal multiplexed are obtained for each line.

Here, the band of the luminance signal only (10 lines out of 20 lines) is not band-limited, so that FIG.
As shown in (b), the line is transmitted up to 4.2 MHz, while the line in which the luminance signal and the color signal are multiplexed (the remaining 10 lines)
Has the spectrum shown in FIG. 99 (a).

Therefore, the luminance signal component of 3 MHz or less is
All lines are transmitted, but the luminance signal component of 3 MHz or more is transmitted only on half of the lines, so that FIG.
It becomes the band shown in. Therefore, half of the lines lack the diagonal component. In addition, since the color signal transmits only half of the normal line, it has a band shown in FIG. 99 (d).

FIG. 97 shows an embodiment of the side panel processing section 65001 on the decoder side. Input terminal 65
The signals of the upper and lower mask portions introduced into 008 are supplied to the selection circuit 6
5211 at one end, LPF 65212 and subtractor 652
13 is input. The LPF 65212 extracts the luminance signal from the line in which the luminance signal and the color signal are multiplexed and supplies the luminance signal to the other end of the selection circuit 6521 1 and the subtractor 65213. The subtractor 65213 subtracts the luminance signal from the signals of the upper and lower mask portions to obtain a color signal.

The selecting circuit 65211 inputs the input terminal 6500 when the input upper / lower mask portion signal is a line containing only luminance signals.
8 is selected, and in the case of a line in which a luminance signal and a chrominance signal are multiplexed, the output of LPF65212 is selected.

The luminance signal output of the selection circuit 65211 is rearranged in the field memory 65215 using the control signal of the timing generation circuit 65216, and is arranged at the position of the original side signal.

The output of the field memory 65215 is input to the adder 65219 and the line memory (1
H) 65217 and 65218 are added in series to adder 65
219 is input.

The adder 65219 is connected to the field memory 6
The output of 5215 and the delayed signal of 2H are added, and the coefficient unit 6
5220. The coefficient unit 65220 is an adder 65
The average value between lines is calculated by multiplying the output of 219 by a coefficient of 1/2, and the high pass filter (H
PF) 65221.

The HPF 65221 extracts a high frequency component of 3 MHz or higher and supplies it to the adder 65222. Adder 6
The 5222 adds the high frequency component from the HPF 65221 and the 1H delay signal from the line memory 65217 and outputs the result to the one end of the selection circuit 65223. Selection circuit 65223
The 1H delay signal of the line memory 65217 is input to the other end of the. The selection circuit 65223 receives the line memory 65217 when a signal in which only the luminance signal is multiplexed is input.
When a signal in which the signal in which the luminance signal and the chrominance signal are multiplexed is band-limited by the LPF 65212 is input, the output of the adder 6522 to which the high frequency components are added is selected.

On the other hand, the color signal output of the subtractor 65213 is
Field memory 6522 demodulated by multiplier 65214
After being sorted by 5, the line memories 65226, 65
227, the adder 65228 and the coefficient unit 65229 are used to obtain an inter-line average signal.

The coefficient unit 6 is provided at one end of the selection circuit 65230.
The output of 5229 is input to the other end of the line memory 6
The output of 5226 is input. The output of the line memory 65226 is selected when the color signal is transmitted, and the output of the coefficient unit 65229 is selected when the color signal is not transmitted.

The luminance signal and the color signal output from the selection circuit 65223 for obtaining the luminance signal and the selection circuit 65230 for obtaining the color signal are added to the low frequency components of the side panel by the adders 65231 and 65232, respectively, and the side panel is reproduced. .

The above decoding process will be further described with reference to FIG. 98 (b).

The line in which the luminance signal and the chrominance signal are multiplexed is separated into the luminance signal and the chrominance signal by using an LPF having a cutoff frequency of 3 MHz. The separated luminance signals SPY2 'and SPC2' are rearranged as shown by SPY1 'and SPC1'.

In the luminance signal, the cutoff frequency is 3 MHz
The high-frequency components of the line that is not band-limited are extracted from the upper and lower lines and added to the line whose band is limited by the LPF.
This addition is performed in the adder 65222.

Since only half the line is originally transmitted in the color signal, it is reproduced by interpolating from the upper and lower lines. The direct signal is obtained from the 1H line memory 65226, the interpolation signal is obtained from the coefficient unit 65229, and these signals are alternately selected and derived by the selection circuit 65230. As a result, a side panel signal that is almost unchanged from the original signal is reproduced.

Furthermore, in particular, when the encode signal is multiplexed in the upper and lower mask portions, if the line in which the luminance signal and the chrominance signal are multiplexed is arranged in the vicinity of the vertical synchronizing signal with time adjustment, the current receiver can be seen. Since it is hidden by the vertical overscan portion, it can be made more difficult to see, and is not conspicuous when crosstalk occurs.

As described above, in this embodiment, a part of the oblique component of the luminance signal is limited, and the luminance signal and the color signal are frequency-multiplexed and transmitted by the upper and lower mask portions. Since the luminance signal and the chrominance signal are band-limited beforehand so that they can be completely separated, crosstalk does not occur. Further, since the oblique component of the luminance signal has a low visual contribution, the deterioration of resolution does not occur.

(Multiple-Signal Adaptive Level Conversion System) The high frequency components of the side panel section are multiplexed on the vertical upper and lower mask sections, and therefore become conspicuous as interference when the amplitude level is large.

On the other hand, a method is conceivable in which a signal is divided by a constant value to suppress the entire amplitude level for transmission, and the receiving side multiplies the number to restore the signal level. However, with this method, if the signal level is significantly lower than the divisor on the transmitting side, the signal level will be destroyed by transmission noise, etc., and restoration cannot be performed on the receiving side. On the contrary, if the signal level is extremely high, the disturbance becomes more noticeable and it is difficult to set the value.

Therefore, in this embodiment, by normalizing the high frequency components of the side panels multiplexed in the upper and lower mask portions, the amplitude level is controlled and the interference is suppressed. Further, in the normalization, a signal obtained by offsetting the high frequency signal of the center panel portion is used to prevent the noise of the minute signal component of the side panel signal from being destroyed. As means for realizing this, FIG.
Also, the combining sections 5016 and 65007 in FIG. 50 are characterized.

FIG. 100 and FIG. 101 show a configuration example of a circuit for normalizing the side panel high frequency signal.

FIG. 100 shows a combining section 5061 on the encoder side.
Is shown.

Signals from the luminance signal center panel portion and the luminance signal upper and lower mask portions are input to the input terminals 55211 and 55212. The signal from the center panel is sent to the selection circuit 552.
It is input to one end of the input terminal 22 and is input to the de-emphasis circuit 55213. De-emphasis circuit 552
13 has the characteristics of the de-emphasis circuit 6500 shown in FIG.
5 has the same characteristic as that of the emphasis circuit 501 of FIG.
The signal level change by 5 is undone.

The output of the de-emphasis circuit 55213 is band-limited to a horizontal frequency of 0.8 [MHz] or more by the HPF 55214, and time-expanded to 5 times by the 5-times expansion circuit 55215. This is the reverse operation of the 1/5 hour compression in the center panel processing unit 5014 of FIG.

The output of the 5 × expansion circuit 55215 is converted into an absolute value by the absolute value circuit 55216, and the summation circuit 55217 obtains the sum of n signal values.

The output of the summing circuit 55217 is multiplied by the offset value C _y in the offset circuit 55218 to obtain Σ | x _i | + C _y (x _i is the signal level).

The output of the offset circuit 55218 is input to the dividing circuit 55221 after the sorting circuit 55219 performs the same operation as that of the sorting unit 5017 of FIG.

The signals of the upper and lower mask parts are the coefficient unit 55220.
Is multiplied by the coefficient of the offset value C _y , and the division circuit 552
After being divided by the output of the rearrangement circuit 55219 at 21 and normalized, it is input to the other end of the selection circuit 55222.
The selection circuit 55222 is controlled by the control circuit 55223, and when the 42nd to 241st lines and the 305th to 504th lines are input, a signal of the center panel portion (input end 552) is input.
11), and when the 22nd to 31st lines and the 515th to 524th lines are input, the normalized signals of the upper and lower panel portions (signals from the division circuit 55221) are selected. The output of the selection circuit 55222 is NT of FIG.
It is input to the SC encoder 5019.

The color signal center panel portion and the color signal upper and lower mask portion signals introduced to the input terminals 55311, 55312 are subjected to the same processing as the luminance signal, and the signals of the center panel portion and the upper and lower mask portions normalized. The signal is selectively output from the selection circuit 55322. Therefore, the color signal processing system includes the de-emphasis circuit 55313 and the HPF5531.
4, 5 times expansion circuit 55315, absolute value circuit 55316,
Sum circuit 55317, offset circuit 55318, rearrangement circuit 55319, division circuit 55321, coefficient unit 55
320, a selection circuit 55322, and the like.

However, it is assumed that the HPF 55314 is band-limited to a horizontal frequency of 0.1 [MHz] or higher.

FIG. 101 shows a normalization processing circuit in the synthesis section 65007 on the decoder side shown in FIG.

Signals from the luminance signal center panel portion and the luminance signal upper and lower mask portions are input to the input terminals 65241 and 65242. The signal from the center panel is added by the adder 65.
249 and the horizontal HPF 65243.

The signal of the center panel section is the horizontal HPF6.
The band is limited to a horizontal frequency of 0.8 [MHz] or more at 5243, converted to an absolute value at the absolute value circuit 65244, and the sum of the n signal values is taken at the summing circuit 65245.

The output of the summing circuit 65245 is multiplied by the offset value C _y in the offset circuit 65246 and becomes Σ│x _i │ + C _y (x _i is the signal level).

The output of the offset circuit 65246 is multiplied by the signals of the upper and lower mask parts in the multiplication circuit 65247, multiplied by the coefficient of 1 / C _y in the coefficient unit 65248, and added by the adder 652.
It is input to 49. The adder 65249 is a coefficient unit 652.
The output of 48 and the center panel signal are added to obtain ((Σ | x _i | + C _y ) / C _y ) · Y _M (Y _M is a luminance signal upper and lower mask portion), and the original upper and lower mask portion signals are obtained. Can be played.

Similar processing is applied to the color signal center panel portion signal and the color signal upper and lower mask portion signals introduced to the input terminals 65251 and 65252. Therefore, the color signal processing system includes an HPF 65253, an absolute value circuit 65254,
Sum circuit 65255, offset circuit 65256, multiplication circuit 65257, coefficient unit 65258, adder 65259
Etc.

However, the horizontal HPF 65253 is band-limited to a horizontal frequency of 0.1 [MHz] or higher.

According to the above-described embodiment, by normalizing the side panel high frequency signals multiplexed and transmitted to the vertical upper and lower mask portions, the amplitude level is suppressed and the interference becomes inconspicuous.

In the normalization, by using the signal obtained by multiplying the center panel high frequency signal by the offset value, it is possible to prevent noise collapse of the minute signal component of the side panel.

(Multiple Signal Difference Processing System) As described above, in this system, the high frequency components of the side panel signals are multiplexed and transmitted to the upper and lower mask portions. The upper and lower mask portions appear on the screen when received by the current receiver.
Therefore, when the level of the signal multiplexed in the upper and lower mask portions becomes large, the signal multiplexed in the upper and lower mask portions becomes conspicuous, which is very disturbing to the current user.

Therefore, in this embodiment, the level of the signal multiplexed in the upper and lower mask portions can be made extremely small, and the multiplexed signal in the upper and lower mask portions is conspicuous when the intermediate system signal is reproduced by the current receiver. I try to suppress it.
Therefore, in this embodiment, the rearrangement units 5017 and 650 in the side panel processing unit shown in FIGS. 49 and 50 are arranged.
It is characterized by 10 processing methods and configurations.

FIG. 102 is a block diagram of the rearrangement processing unit 5017 (on the encoder side).

The high frequency component of the side panel luminance signal introduced to the input terminal 55321 is delayed by one line in the line memory 55322 and input to one end of the addition / subtraction processor 55323 and directly to the other end of the addition / subtraction processor 55323. To be done.

Therefore, the signals of adjacent two lines are simultaneously input to the adder / subtractor 55323. The adder / subtractor 55323, which will be described in detail later, outputs signals for two lines at the same time. One output of the addition / subtraction processor 55323 is directly input to one end of the selection circuit 55325, and the other output is the line memory 5532.
It is delayed by one line at 4 and input to the other end of the selection circuit 55325.

The selection circuit 55325 switches both inputs for each line and outputs. Therefore, the addition / subtraction processor 553
Two lines of signals simultaneously output from 23 are alternately output one line at a time. The output of the selection circuit 55325 is
It is input to the field memory 55326.

The field memory 55326 rearranges the side panel luminance signals in the upper and lower mask portions. This operation is performed by controlling the read / write address of the field memory 55326 using the address control circuit 55327.

The output of the field memory 55326 is a signal obtained by rearranging the side panel luminance signal in the upper and lower mask portions and is led to the output terminal.

The high frequency component of the side panel color signal introduced to the input terminal 55328 is input to the field memory 55330 via the delay device 55329. Delay device 553
29 is delayed by the time required to process the side panel luminance signal. This is the side panel luminance signal input to the field memory 55326 and the field memory 55.
This is to make the timing the same as that of the side panel color signal input to 330. By doing so, the address control of the field memory 55326 and the address control of the field memory 55330 can be made exactly the same, so that the address control circuit 55327 can be shared.

The field memory 55330 rearranges the side panel color signal to the upper and lower mask portions and outputs it to the output terminal.

FIG. 104 (a) shows the addition / subtraction processor 55323 shown in FIG. The output of the line memory 55322 in FIG. 102 is input to the input terminal 55331, and the signal input to the input terminal 55321 is directly input to the input terminal 55332. Below, input terminal 5533
The signal input to 1 is a, the signal input to the input terminal 55332 is b, and a ₁ and b ₁ indicated by the subscript l represent components of 3 MHz or less of the signals a and b and indicated by the subscript h. a _h, b _h represents an 3MHz or more components. That is, the signal (a ₁ + a _h ) is input to the input terminal 55331, and the signal (b ₁ + b _h ) is input to the input terminal 55332.

The signal (a ₁ + a _h ) is the LPF55333.
And the horizontal frequency is band-limited to 3 MHz or less. Signal a of 3 MHz or less from LPF55333
₁ is input to the adder 55334 and the subtractor 55340.

The signal (b ₁ + b _h ) is the LPF55336.
Is input to the subtractor 55337. The LPF 55336 band-limits the horizontal frequency to 3 MHz or less and supplies the signal b ₁ to the adders 55339 and 55334 and the subtractor 55337. The adder 55334 adds the output signal a ₁ of the LPF 55333 and the output signal b _{1 of the} LPF 55336,
The signal (a ₁ + b _h ) is supplied to the coefficient unit 55335. The coefficient unit 55335 multiplies the signal (a ₁ + b ₁ ) by 1/2 and outputs it as a signal ((a ₁ + b ₁ ) / 2) (hereinafter referred to as signal A) to the output terminal 55342.

The subtractor 55337 receives the signal (b ₁ + b _h )
And the signal b ₁ is subtracted from this to supply the signal b _h to the coefficient unit 55338. The signal b _h is doubled by the coefficient multiplier 55338, added with the signal b ₁ by the adder 55339, and the signal (b ₁ +2
b _h ). The signal (b ₁ + 2b _h ) is supplied to the subtractor 553.
40 is subtracted from the signal a ₁ to obtain the signal (a ₁ -b ₁ -2b
_h ), multiplied by 1/2 in the coefficient unit 55341, and led out to the output terminal 55343 as a signal ((a ₁ −b ₁ ) / 2−b _h )) (hereinafter referred to as B).

The band of signal B is up to 4.2 MHz,
The band of signal A is only up to 3 MHz. This is because the color signal is multiplexed in the region of 3 MHz or more of the signal A when the signal is multiplexed in the upper and lower mask portions.

As for the components of 3 MHz or less, in the case of the signal A, the sum is between the upper and lower lines, but in the case of the signal B, the difference is between the upper and lower lines. By taking the difference between the upper and lower lines, it becomes a high frequency component in the vertical direction,
The energy of the signal is small. Therefore, it is more difficult to see the original signal on the upper and lower mask portions when it is displayed on the current receiver, as compared with the case where the original signal is directly multiplexed on the upper and lower mask portions.

The signal A is the selection circuit 553 shown in FIG.
25 is input to one end of the line 25, and the signal B is input to the line memory 553.
The data is input to the other end via 24 and is alternately input to the field memory 55326 for each line, and rearrangement to the upper and lower mask portions is performed.

FIG. 105 shows the arrangement of signals in the upper and lower mask portions.

The signal A is arranged at both upper and lower ends of the video signal, that is, at a portion close to the synchronizing signal. Then, the signal B is arranged inside thereof, that is, in a portion close to the center signal. Signal A
The area of the upper and lower mask portions in which is arranged does not appear on the screen because it becomes a vertical overscan portion when received by the current receiver. Only the portion where the signal B is arranged appears on the screen in the upper and lower mask portions. Since the signal B is a line difference signal, the energy is small and it is difficult to see.

Therefore, even if a signal multiplexed in the upper and lower mask portions is reproduced by the current receiver, it hardly disturbs.

FIG. 103 shows the rearrangement processing unit 65010 on the decoder side shown in FIG. Input terminal 652
A luminance (Y) signal multiplexed in the upper and lower mask portions is introduced into 61 and is supplied to the field memory 65262. Color signals multiplexed in the upper and lower mask portions are introduced to the input terminal 65272 and supplied to the field memory 65273.

The luminance signal supplied to the field memory 65262 is rearranged to the original side panel portion.
This rearrangement is performed by the address controller 65274 for controlling the write and read addresses of the field memory 65262.
It is realized by. The field memory 65273 also performs rearrangement by similar processing. As a result, the luminance signals rearranged in the side panel portion are obtained from the field memory 65262, and the field memory 652
Color signals rearranged in the side panel portion are obtained from 73. The output of the field memory 65262 is input to the line memory 65263 and the addition / subtraction processor 65264. The line memory 65263 delays by one line, and the output thereof is input to the addition / subtraction processor 65264. Signals for two lines are simultaneously input to the adder / subtractor 65264. That is, the signals A and B output from the adder / subtractor processor 55323 of the encoder are input.

FIG. 104 (b) shows an addition / subtraction processor 65264.
Is specifically shown. The signal A input from the terminal 65281 and the signal B input from the terminal 65282 are both input to the adder 65283. Therefore, the adder 652
From 83, A + B = (1/2) (a ₁ + b ₁ ) + {(1/2) (a ₁ -b ₁ )-
b _h} = a ₁ -b _h is output. A ₁ − output from the adder 65283
b _h are input to the adder 65284. On the other hand, the subtractor 6
At 5286, signal B is subtracted from signal A. Thus A-B = (1/2) ( a 1 + b 1) - {(1/2) (a 1 -b 1) -
b _h } = b ₁ + b _h is obtained. The output of the subtractor 65286 is supplied to the HPF 65287 and the terminal 65
289. The terminal 65289 is an output terminal of the addition / subtraction processor 65264 and can obtain b ₁ + b _h .

Since the HPF 65287 limits the band to 3 MHz or more, the component b _{h of} 3 MHz or more of the signal of b ₁ + b _h is input to the adder 65284. As a result, the adder 65284 cancels b _{h and} derives only the signal a ₁ . The signal a ₁ is output to the output terminal 65288 as the output of the adder / subtractor processor 65264.

Therefore, the signal a ₁ (a component of the signal a of 3 MHz or less) is output from one terminal 65288 of the addition / subtraction processor 65264, and the signal b ₁ + b _h (the entire band of the signal b is output from the other terminal 65289. ) Will be output.

Returning to FIG. 103, the signal al is obtained by the adder 6
5270, the signal B is input to the line memory 65265.
Is input to the adder 65267. Line memory 652
The signal delayed by one line at 65 is input to the line memory 65266 and the selector 65271. The line memory 65266 delays by one line and the output thereof is input to the adder 65267. Therefore, the adder 65267 obtains the sum of the signals B separated by two lines. The output of the adder 65267 is input to the coefficient multiplier 65268 and is multiplied by 1/2. Therefore, the output of the coefficient unit 65268 is the average value of the signal B separated by two lines. The output of the coefficient multiplier 65268 is input to the HPF 65269. The HPF65269 outputs only a signal of 3 MHz or higher, and the output is input to the adder 65270. Therefore, the output signal from the HPF65269 the average value of a 3MHz or more components of the two lines apart signal B b _h b
_h ′, which is input to the adder 65270 and is added to the signal al output from the addition / subtraction processor 65264. Signal al from addition / subtraction processor 65264
The signal b _h ′ from the HPF 65269 is output at the same time, but the signal a 1 is one line before the signal b _h ′. Therefore, in the adder 65270, the signal b _h ′, which is the average value of 3 MHz or more of the signals b on the upper and lower lines, is added to the signal al having the band of 3 MHz or less. The output of the adder 65270 is a signal a having a component in the band up to 4.2 MHz, which is the selector 652.
71 is input.

The selector 65271 outputs the signal a and the signal B delayed by one line by the line memory 65265.
Has been entered. These are alternately selected and derived for each line, and a luminance signal of a wide panel is obtained. The output of the selector 65271 is led to the terminal 65276, which becomes the output of the rearrangement processing unit 65010.

The color signal of the side panel section output from the field memory 65273 is delayed by the delay unit 65275 and delayed by the time required for decoding the luminance signal of the side panel for time adjustment. Then, the color signal output terminal of the rearrangement processing unit 65010 is 6527.
7 is output.

According to the above-described embodiment, when the current image receiver receives and projects a signal of the intermediate system, the level of the signal multiplexed on the upper and lower mask portions appearing on the face can be made extremely small. . There is no noticeable effect on the screen of the current receiver, and it does not interfere with other signals.

(Side Panel Joint Processing System (Seam Vertical Correlation Reduction Processing)) In the side panel system, the side panel portion and the center panel portion are separately processed, transmitted, and re-combined on the receiving side. At this time, the side panel and the center panel are processed differently from each other and transmitted, so that the joints become conspicuous. In particular, at the dividing points of the center panel and the side panels, there are vertical streak-like distortions due to the influence of linking that occurs in the transmission system and the difference in the resolutions of the respective panels, and the joints are noticeable.

Therefore, in this embodiment, the position of the joint between the center panel and the side panel is shifted for each line to reduce the vertical correlation of the distortion generated at the joint,
It is designed to make the joints less noticeable.

FIG. 106 shows an embodiment of the center panel processing unit 5014 in the side panel processing unit 5002 on the encoder side shown in FIG. Input terminal 5535
The luminance signal introduced in 1 is delayed by delay circuits 55352, 10
/ 9 times expansion circuit 55353 and 1/5 times compression circuit 553
54, and each output is input to the selection circuit 55355.

The color signal introduced into the input terminal 55361 is delayed by the delay circuit 55356 and the 10/9 times expansion circuit 5535.
7 and 1/5 times compression circuit 55358, respectively, and each output is input to selection circuit 55359.

The selection circuits 55355 and 55359 are controlled by the timing generation circuit 55360 to select the outputs of the 1/5 times compression circuits 55354 and 55358 in the side panel section and the 10/9 times expansion circuit 5 in the center panel section.
5353 and 55357 outputs are selected, and delay circuits 55352 and 55 are provided between the side panel and the center panel.
Select the output of 356 and output terminals 55362, 5536
3 is derived. In this case, the timing generation circuit 5536
The control signal of 0 is switched for each line.

FIG. 107 shows an embodiment of the center panel processing section 65006 in the side panel processing section 65001 on the decoder side shown in FIG.

The encoded luminance signal is input to the input terminal 65291. The input luminance signal is delayed by the delay circuit 65.
292, 9/10 times compression circuit 65293 and 5 times expansion circuit 65294, respectively, and each output is the selection circuit 6
5295 is input.

An encoded color signal is input to the input terminal 65296. The input color signal is the delay circuit 6529.
7, 9/10 times compression circuit 65298 and 5 times expansion circuit 6
5299 and the outputs are input to the selection circuit 653.
00 is input.

The selection circuits 65295 and 65300 are controlled by using the timing generation circuit 65301 to select the outputs of the 5x expansion circuits 65294 and 65299 in the side panel section and the 9 / 10x compression circuit 65 in the center panel section.
6293 and 65298 outputs are selected, and delay circuits 65292 and 65 are provided in a portion between the side panel and the center panel.
297 output is selected and output terminals 65302 and 6530 are selected.
3 is derived. In this case, the timing generation circuit 6530
The control signal 1 is switched for each line.

The compression / decompression format will be described with reference to FIG.

When sampling at 4 fsc, one horizontal scanning period has 910 samples. Of these, 747 samples excluding the horizontal synchronization period are treated as image signals.

For example, the left and right 41 samples are used as side panel parts, the inner 17 samples are used as parts not to be compressed, and the inner 631 samples are used as center panels for expansion. 7 after encoding
With 53 samples, the left and right side panel parts are 9 samples.

As shown in FIG. 109, the left and right 42 samples are the side panel portions, and the inner 16 samples are the portions not subjected to compression processing, and the center portion is the same as in FIG.
As a result, the total becomes 747 samples, and FIG.
Is similar to. After encoding, the total is 753 samples, which is 10 samples on the left and right side panel portions.

In the formats of FIGS. 108 and 109, the total number of samples and the center position are the same except that the number of samples on the side panel is different by one sample.

Timing generating circuit 553 on the encoder side
A line 60 switches between the format shown in FIG. 108 and the format shown in FIG. 109 for each line.

By switching the format for each line as described above, the position of the joint between the side panel and the center panel can be shifted for each line as shown in FIG. Therefore, the vertical correlation of the joint distortion can be suppressed low and can be made inconspicuous.

Although the format is switched line by line in the present invention, the format may be switched field by field or frame by frame.

As described above, in this embodiment, by shifting the position of the joint between the side panel and the center panel on a line-by-line basis, the vertical correlation of the distortion generated at the joint can be lowered to make it less visible. The side panel and center panel can be smoothly combined.

(Side panel joint processing (resolution smoothing processing) system) The signals of the side panel portion are multiplexed by transmitting the low frequency component to the horizontal overscan portion, and the high frequency component is time division multiplexed to the upper and lower mask portions. And then transmit. However, since the amount of signals that can be transmitted by the upper and lower mask portions is fixed, it is not possible to transmit all the high frequency components of the side panel portion. Therefore, the signal of the side panel portion is transmitted after the oblique high-frequency components that are visually inconspicuous are deleted. Therefore, since there is a difference in signal band between the center panel part and the side panel part, when the side panel part is reproduced by the decoder, the joint between the center panel part and the side panel part becomes noticeable due to the band difference.

Therefore, in this embodiment, the bands on the left and right ends of the center panel section are set so that the signals near the joint between the center panel section and the side panel sections do not have an extremely band difference and have a smooth band difference. I am trying to transmit with some restrictions.

FIG. 111 is a block diagram of the side panel high-frequency / low-frequency dividing unit 5013 shown in FIG.

Input terminal 553 from the letterbox processing side
The luminance signal introduced to 71 is input to one end of the selection circuit 55373, the diagonal component is deleted by the pre-filter 55372, and the other end of the selection circuit 55373 is input.

The selection circuit 55373 is controlled by the timing generation circuit 55390, and the output of the pre-filter 55372 is selected in the portion in contact with the side panel portion of the center panel portion and the side panel portion, and is output to the side panel portion of the center panel portion. The input luminance signal from the input terminal 55371 is selected in most of the center panel portion except the contact portion. Therefore, the output of the selection circuit 55373 is one in which the diagonal high frequency component is removed by the pre-filter 55372 at a portion outside the boundary between the center panel portion and the side panel portion with the boundary being slightly inside. Has become.

The output of the selection circuit 55373 is the LPF 55.
374 and the subtractor 55375. LPF553
74 is a subtractor 55375 for extracting only the low frequency component of the signal.
Supply to.

The subtractor 55375 is the selection circuit 55373.
Subtract the low-frequency component output of LPF55374 from the output of
The high frequency component is supplied to the division circuit 55376.

The dividing circuit 55376 divides the input signal into a signal of the center panel portion and a signal of the side panel portion,
The signal from the center panel is supplied to the adder 55377,
The signal of the side panel portion is output to the output terminal 55379. The adder 55377 adds the high frequency signal of the center panel unit and the low frequency component from the LPF 55374 and outputs the result to the output terminal 55378. Therefore, the full band signal of the center panel signal and the low frequency component of the side panel portion are derived from the output terminal 55378. The high frequency component of the side panel portion is led to the output terminal 55379.

The signal from the output terminal 55378 is output from the center panel processing unit 5014 at 10 /
It is expanded 9 times and the side panel portion (low-frequency component) is compressed 1/5 times. The compressed side panel portion corresponds to the horizontal overscan portion. Also, output terminal 553
The high frequency components of the side panel portion 79 are subjected to the rearrangement processing and multiplexed on the upper and lower mask portions.

The color signal introduced to the input terminal 55381 is the pre-filter 55382, selection circuit 55383, L
PF55384, subtractor 55385, division circuit 5538
6 and the adder 55387, the same processing as the above luminance signal is performed.

To the output terminal 55388, the color signal of the entire band of the signal of the center panel portion and the color signal of the low frequency component of the side panel portion are derived, the low frequency component of the side panel portion is time-compressed, and the horizontal overscan portion is output. Are multiplexed and transmitted. The color signal of the high frequency component of the side panel portion is output to the output terminal 55389, and is time-division multiplexed and transmitted to the upper and lower mask portions.

As described above, if the side panel high-frequency / low-band dividing unit 5013 is configured, when the side panel is decoded on the receiver side and the original 16: 9 screen is obtained, the center panel unit and the side panel are The band difference from the part can be made inconspicuous. This is because the diagonal high frequency component of the signal of the center panel part is deleted by the encoder, so the band difference between the center part and the left and right end parts of the center panel part, the left and right end parts of the center panel part, and the side panel part However, this is because the band difference gradually changes and is connected, and there is no abrupt change.

(Multi-Signal Scramble System) The high frequency components of the side panel section are time division multiplexed and transmitted to the upper and lower mask sections.

For example, only a part of the side panel portion,
When there is a high frequency component, the high frequency signal is present only at the place where the upper and lower mask parts are multiplexed. Also,
If only a part of the side panel is moving, the signal of only a part of the upper and lower mask parts, in which the signal is multiplexed, moves.

In these cases, since only the signals of the upper and lower mask portions are moving, only that portion of the upper and lower mask portions becomes very obtrusive.

Therefore, in this embodiment, when the processing method of the rearrangement section 5017 shown in FIG. 49 is devised and the high frequency components of the side panel section are multiplexed on the upper and lower mask sections, the arrangement of the high frequency signals on the upper and lower mask sections is performed. By making them random, the multiplexed signals are made uniform and inconspicuous.

FIG. 112 shows a configuration example of the rearranging section 5017 on the encoder side shown in FIG.

The high frequency component of the side panel luminance signal multiplexed on the upper and lower mask portions is input to the input terminal 55401,
The input terminal 55405 is supplied with the high frequency components of the side panel color signals multiplexed on the upper and lower mask portions.

The luminance signal introduced to the input terminal 55401 is input to the interline processing circuit 55402. The inter-line processing circuit 55402 creates an inter-line sum signal and an inter-line difference signal and supplies them to the field memory 55403. The inter-line sum signal and the inter-line difference signal are multiplexed and transmitted in the upper and lower mask parts as shown in FIG.

The color signal introduced to the input terminal 55405 is input to the delay circuit 55406. Delay circuit 554
06 delays the chrominance signal for the time during which the luminance signal is processed by the inter-line processing circuit 55402. Delay circuit 5
The output of 5406 is input to the field memory 55407.

Field memories 55403, 55407
Is controlled by the scramble address control circuit 55409 to rearrange the luminance signal and the color signal in the upper and lower mask portions, respectively. This operation is performed by the field memory 5540.
The write and read addresses of 3,55407 are controlled and arranged randomly so that the signals on the continuous lines of the side panel portion are not aligned.

The field memory 55403 outputs the side panel luminance signals (high frequency components) rearranged in the upper and lower mask portions to the output terminal 55404, and the field memory 55407 displays the side panel colors rearranged in the upper and lower mask portions. The signal (high frequency component) is led to the output terminal 55408.

FIG. 113 shows a block diagram of rearrangement section 65010 on the decoder side shown in FIG.

The luminance signal (high frequency component) multiplexed in the upper and lower mask portions is input to the input terminal 65311, and the input terminal 6
Color signals (high frequency components) multiplexed on the upper and lower mask portions are input to 5315.

The luminance signal introduced to the input terminal 65311 is input to the field memory 65312, and the input terminal 6
The color signal introduced to the 5315 is stored in the field memory 653.
16 is input. Field memory 65312,65
316 controls the write and read addresses of the field memories 65312 and 65316 by using the scramble address control circuit 65319, and rearranges the side panel signals randomly arranged in the upper and lower mask parts to the original side panel signals. .

The output of the field memory 65312 is input to the interline processing circuit 65313.

The high frequency component of the luminance signal of the side panel section is
It is processed into an inter-line sum signal and an inter-line difference signal by the encoder, and is multiplexed on the upper and lower mask parts. Therefore, the brightness signals of the side panels rearranged in the side panel section output from the field memory 65312 remain as the interline sum signal and the interline difference signal. The inter-line processing circuit 65313 performs a process for obtaining an original signal from the inter-line sum signal and the inter-line difference signal, and outputs the high frequency component of the side panel luminance signal to the output terminal 65314.

The field memory 65316 outputs the high frequency component of the color signal of the side panel section to the delay circuit 65317. The delay circuit 65317 delays the color signal by the time during which the luminance signal is processed by the interline processing circuit 65313, and outputs the delayed color signal to the output terminal 65318.

There are various methods for the relationship between scrambling and descrambling, and the address control circuit 55409
And 65319 are maintained in synchronization, and the scramble information and the descramble information of the decoder and the encoder may be shared by using a memory or the like.

According to the above-mentioned embodiment, when the high band signals of the side panel section are multiplexed to the upper and lower mask sections, the high band signals of the upper and lower mask sections are randomly arranged so that the signals multiplexed to the upper and lower mask sections are It can be made uniform without unevenness. Therefore, the signals multiplexed in the upper and lower mask portions can be made inconspicuous.

Note that the key information for descrambling may be transmitted by superimposing it on a specific line from the transmitting side, and a memory storing descrambling data (key information) from a predetermined timing. May be driven. Also, if the key information in the memory can be rewritten with the key information sent from the broadcasting center side, it can be utilized even when performing pay broadcasting.

(Color Signal Multiplexing Transmission System) Normally, a television signal is a composite signal in which a color signal is frequency-multiplexed with a brightness signal, and the composite signal must be separated into a brightness signal and a color signal by a receiver. In order to extract the frequency-multiplexed color signal, a band pass filter (BPF) has been conventionally used, but since the horizontal resolution deteriorates, it is separated using a comb filter. However, if the luminance signal and the color signal are separated by these separation filters, complete separation cannot be performed, so that the luminance signal leaks into the color signal and cross color occurs, and the color signal leaks into the luminance signal, resulting in dot interference. . Therefore, in particular, interference occurs in a region having many diagonal components where crosstalk between a luminance signal and a color signal is likely to occur, and image quality is deteriorated.

Therefore, in this embodiment, by devising the method of multiplexing and separating the luminance signal and the chrominance signal, almost perfect Y / C can be obtained by matrix calculation on the receiving side.
Separation is possible, and high-definition images can be obtained without causing image quality deterioration due to crosstalk.

FIG. 114 shows a signal in which a chrominance signal is multiplexed with a luminance signal.

In the figure, circled numbers 1, 1, ... Denote scanning lines, Y1, Y2, ... Denote luminance signals, and C1, C2 ,.
Indicates a color signal.

The principle operation of encoding will be described below.

The first scan line is multiplexed with Y ₂ + C ₂ ,
The color signal is swung twice and the second scanning line is Y1-C1.
To multiplex. With the above method, the multiplexing in the first field is completed.

In the second field, for example, the 264th
The second scan line is (Y ₁ + Y ₂ ) / from the first field
A luminance signal is created in ₂ and multiplexed with the -C ₂ signal. Also, the 265th scan line is (2/3) from the first field.
Create a luminance signal with Y ₂ + (1/3) (Y ₃ + Y ₄ )
The C ₂ signal is multiplexed. Also in the second field, the color signals are swung twice in the field.

The above processing is carried out on the encoder side, and is carried out only in the area multiplexed with the color signal, that is, in the high frequency component of the luminance signal. Therefore, no processing is performed on the low frequency component of the luminance signal.

The means for receiving the signals encoded as described above and obtaining the original luminance signal and chrominance signal will be described below.

In FIG. 114, the scanning lines of the first field are designated as n ₁ , n ₂ , ... And the scanning lines of the second field are designated as m ₁ , m 2.
₂ , ... By receiving these signals, the original luminance signal and chrominance signal are obtained by the following equation. _{C 2 = (Y 1 + Y} 2) / 2-m 1 = (n 1 + n 2) / 2-m 1 = n 1/2 + n 2/2-m 1 ... (10) Y 2 = 3/2 (m 2 _{- (n 3 + n 4)} / 6- (n 1 + n 2) / 2-m 1) = - (3/4) n 1 - (3/4) n 2 - (1/4) n 3 - (1 / 4) n ₄ + (3/2) m ₁ + (3/3) m ₂ (11) C ₁ = Y ₂ −n ₂ = − (3/4) n ₁ − (7/4) n ₂ − (1/4) n ₃ − (1/4) n ₄ + (3/2) m ₁ + (3/2) m ₂ (12) Y ₁ = n ₁ −C ₁ = (7/4) n ₁ + (7/4) n ₂ + (1/4) n ₃ + (1/4) n ₄ − (3/2) m ₁ − (3/2) m ₂ (13) Therefore, the formula ( When 10) to (13) are represented by a matrix,

[0405]

[Equation 1] Becomes

The operation on the receiving side will be described with reference to FIG. The composite signal introduced to the input terminal 65321 is shown in FIG.
It is a signal that is Y / C multiplexed in a format such as 14. This signal is a 1-line delay unit (1H) 65322-6532.
4, 260 line delay unit 65325 and 1 line delay unit 65326 are input in series to the first input terminal of the matrix circuit 65327 and the matrix circuit 653 is input.
It is input to the sixth input terminal of 27. In addition, each delay device 65
The outputs of 322-65325 are the matrix circuits 6532.
7 are input to the fifth and second input terminals, respectively.

As a result, the matrix circuit 65327 is supplied with n _{1 to} n ₄ , m ₁ and m ₂ shown in FIG. 114, and matrix operation using the coefficients in the equation (14) becomes possible, and the signal Y ₁ , Y ₂ , C ₁ and C ₂ can be obtained.

FIG. 116 shows the matrix circuit 6532 described above.
7 is a circuit for processing the output from 7 to create a luminance signal and a color signal.

The luminance signal Y ₂ introduced to the input terminal 65331 is delayed by 1H in the line memory 65333 and input to one end of the selection circuit 65334, and the luminance signal Y ₁ introduced to the input terminal 65332 is the other end of the selection circuit 65334. Entered in.

The selection circuit 65334 switches for each line and alternately outputs the luminance signals Y ₁ and Y ₂ . The output of the selection circuit 65334 is delayed by 1H in the line memory 65335, input to the adder 65336, and input to the selection circuit 65334.
Is added to the output of the above and input to the coefficient unit 65337. An average value between lines obtained by halving by the coefficient unit 65337 is delayed by 263H in the field memory 65338 and input to one end of the selection circuit 65339. Selection circuit 65
The output of the selection circuit 65334 is input to the other end of 339, and the selection circuit 65334 is switched for each field. That is, the output of the selection circuit 65334 is selected in the first field, the output of the field memory 65338 is selected in the second field, and the output terminal 65 is selected.
340.

Color signal C introduced to input terminal 65341
1 is the selection circuit 653 via the line delay unit 65343.
44 and one of the selection circuits 65344 directly. The selection circuit 65344 alternately switches the input color signal and the delayed color signal for each line, and swings the line twice.

Color signal C introduced to input terminal 65342
Similarly, 2 selects the selection circuit 6 via the delay unit 65345.
5346 is input to one side and directly to the other side. Then, the selection circuit 65346 swings twice.

The output of the selection circuit 65344 is the selection circuit 65.
The signal is input to one end of 348, and the output of the selection circuit 65346 is output to the selection circuit 653 via the field delay unit 65347.
It is input to the other end of 48 and switched for each field. That is, the color signal C1 is output in the first field, and the color signal C2 is output in the second field 6534.
9 is output.

FIG. 117 shows the output terminal 65340 described above.
And 65349 show the luminance signal Y and the color signal C, respectively. In the first field, the Y1 and Y2 signals are sequentially obtained, and the next output of the matrix is Y1 'and Y2'.
Is obtained next. In the second field, the average value of the upper and lower lines in the first field is obtained. With respect to the color signal, the line is swung twice, C1 and C1 are output, and then the next outputs C1 'and C1' of the matrix are output.

FIG. 118 shows a circuit on the encoder side which creates the multiplexed signal shown in FIG. 114 so that the matrix processing and the separation processing can be performed as described above. Input terminal 65
The luminance signal Y supplied to the control unit 351 is input to the high pass filter (HPF) 65352 and the subtractor 65
353 is input. The subtractor 65353 performs a process of subtracting the output of the HPF 65352 from the input luminance signal Y, and derives the low frequency component. This low frequency component is input to the adder 65369 via the 3-line delay unit 65354 having a delay amount of 3 lines.

The output of HPF65352 is a one-line delay unit 65355, 65356, 65357 connected in series.
Is input to the adder 65360 via. The input and output of the 1-line delay unit 65360 are added by the adder 65357, and the added output is multiplied by 1/2 by the coefficient unit 65358, and thus averaged ((Y ₁ + Y ₂ ) / 2)). Also, 1
The output of the line delay unit 65356 is multiplied by 2/3 in the coefficient unit 65361 and input to the adder 65365. Adder 6
In 5362, the input and output of the 1-line delay unit 65355 are added, and the added output is 1/2 in the coefficient unit 65363.
It is multiplied and averaged ((Y ₃ + Y ₄ ) / 2)). This signal is multiplied by 1/3 by a coefficient multiplier 65364 and an adder 6536 is added.
Input to 5. Therefore, from the adder 65365,
(2/3) Y2 + (1/3) ((Y 3 + Y 4) / 2))
Is obtained. This signal is delayed by the 1-line delay unit 65366 and supplied to one of the selection circuits 65359. The output of the coefficient unit 65358 is supplied to the other side of the selection circuit 65359, and the selection circuit 65359 selects and derives one input signal and the other input signal alternately in a line cycle. Therefore, here, m _{1 of} the second field shown in FIG. 114,
Luminance signals corresponding to m ₂ , m ₁ ′ and m ₂ ′ will be derived. The output of the selection circuit 65359 is input to one of the selection circuits 65368 via the field delay unit 65367. The other side of the selection circuit 65368 has 1
The output of the line delay device 65357 is supplied. The selection circuit 65368 alternately selects and derives one input and the other input for each field. Therefore, here, signals corresponding to the output of the first field and the luminance signal of the second field shown in FIG. 114 are obtained. The output of the selection circuit 65368 is input to the adder 65369, added to the low frequency component of the luminance signal, and output to the output terminal 65370.

The color signal multiplexed with the luminance signal obtained as described above is introduced to the input terminal 65371 and 3
1 line delay unit 6 after passing through the line delay unit 65372
It is supplied to one input terminal of the 5373 and the selection circuit 65374. To the other input terminal of the selection circuit 65374,
The output of the 1-line delay unit 65373 is supplied, and the selection circuit 65374 alternately selects and derives the signals of one and the other input terminals for each line. That is, the color signal is guided to the output terminal 65375 after the time adjustment for phase matching with the luminance signal and the twice swing operation.

Thus, if the luminance signal of the output terminal 65370 and the color signal of the output terminal 65375 are combined, the high frequency component of the luminance signal (due to the cutoff frequency characteristic set in the HPF65352) is as shown in FIG. The signals have various formats, and simple separation by matrix operation is possible. The HPF65352 is set so as to pass a component of 1.5 MHz or higher, for example. As a result, only the high-frequency component of the luminance signal is swung twice in the field, and the current receiver does not have an unnatural motion of a moving image. Further, since the vertical resolution of the color signal is not so sensitive in terms of visual characteristics, even if the line is swung twice, the vertical resolution is not affected so much on the image quality.

As described above, in this embodiment, by devising the multiplexing method and the separating method of the luminance signal and the chrominance signal, almost perfect Y / C separation is possible by the matrix calculation on the receiving side, and the crosstalk. It is possible to obtain a high-definition image without causing deterioration of image quality.

[0420]

As described above, according to the present invention,
A receiver that improves crosstalk between the digital signal (digital audio signal) that is orthogonally multiplexed with the video signal and the video signal is obtained, and the user can see what kind of digital signal is being transmitted. Can be made easier.

[Brief description of drawings]

FIG. 1 is a diagram showing a configuration of a decoder according to an embodiment of the present invention.

FIG. 2 is a diagram showing a high frequency input processing unit of FIG.

3 is a diagram showing a configuration example of a synchronization control unit in FIG.

FIG. 4 is a diagram showing a configuration example of a non-standard wide determination unit in FIG.

FIG. 5 is a diagram showing a magnetic recording / reproducing apparatus for recording / reproducing an intermediate format video signal.

FIG. 6 is an explanatory diagram of an aspect ratio.

FIG. 7 is a diagram showing an example of the indicator of FIG.

8 is a diagram showing a configuration example of the digital decoder of FIG.

FIG. 9 is a diagram showing an example of a format of audio digital data.

FIG. 10 is a diagram showing another example of the indicator of FIG.

11 is a diagram showing a configuration example of an in-phase / quadrature detection unit in FIG.

FIG. 12 is a diagram showing a configuration example of a received signal correction unit in FIG.

FIG. 13 is a diagram showing an example of an in-phase quadrature modulation unit.

FIG. 14 is an explanatory diagram showing a spectrum of quadrature-modulated voice data.

FIG. 15 is a diagram showing another example of the received signal correction unit in FIG. 2.

FIG. 16 is an explanatory diagram of a wide screen and a standard screen.

17 is a diagram showing an example of the inside of the video decoder of FIG.

FIG. 18 is a diagram showing an example of the horizontal compression unit in FIG. 17.

19 is an explanatory diagram shown for explaining the operation of the circuit in FIG.

20 is a diagram showing a configuration example of a scanning line conversion unit in FIG.

FIG. 21 is an explanatory diagram shown for explaining scanning line conversion processing.

FIG. 22 is an explanatory view shown for explaining the scanning line conversion process.

FIG. 23 is a diagram showing a configuration example of a motion detection unit.

FIG. 24 is a diagram shown for explaining the operation of the motion detection unit of FIG. 23.

25 is a diagram showing a configuration example of a double speed conversion unit in FIG.

FIG. 26 is an explanatory diagram of a screen shown for explaining the operation of the video decoder.

FIG. 27 is a diagram showing another example of the video decoder of FIG. 1.

FIG. 28 is an explanatory diagram of scanning lines shown for explaining the operation of the video decoder.

FIG. 29 is a diagram showing an example of the configuration of the vertical extension unit shown in FIG. 26.

FIG. 30 is a diagram shown for explaining the operation of the circuit of FIG. 29.

FIG. 31 is a diagram showing still another embodiment of the video decoder.

32 is an explanatory diagram of a screen shown for explaining the decoder in FIG. 31. FIG.

FIG. 33 is a diagram showing a configuration example of a horizontal / vertical compression unit.

34 is a diagram showing a configuration example of the vertical compression circuit of FIG. 33.

35 is a diagram shown for explaining the vertical compression operation of the circuit of FIG. 34.

FIG. 36 is a timing chart shown for explaining the operation of the circuit of FIG. 33.

FIG. 37 is a diagram showing another example of a horizontal / vertical compression unit.

FIG. 38 is a diagram showing still another embodiment of the video decoder.

FIG. 39 is a diagram showing another embodiment of the video decoder.

FIG. 40 is a diagram showing a configuration example of a decoder having a volume display generation unit.

FIG. 41 is a diagram showing a configuration example of a volume display generation unit of the video decoder.

FIG. 42 is a diagram showing a display example of a screen of the video decoder.

FIG. 43 is a diagram showing still another embodiment of the video decoder.

44 is a diagram showing a configuration example of a signal detection unit of the decoder of FIG. 43.

45 is a diagram showing a configuration example of a telop detection unit in FIG. 44.

46 is an explanatory diagram shown for explaining the operation of the circuit of FIG. 45.

47 is a timing diagram shown for explaining the operation of the video decoder of FIG. 43.

48 is an explanatory diagram showing a display example by the video decoder of FIG. 43.

FIG. 49 is a diagram showing a configuration example of an intermediate encoder of an encoder according to the present invention.

[Fig. 50] Fig. 50 is a diagram illustrating a configuration example of an intermediate system decoder of a decoder according to the present invention.

FIG. 51 is an explanatory view showing the progress of processing of an intermediate format video signal.

FIG. 52 is an explanatory diagram showing a format of an intermediate format video signal.

FIG. 53 is a diagram shown for explaining an example of an intermediate method video signal processing method.

[Fig. 54] Fig. 54 is a diagram illustrating a configuration example of a vertical compression unit of an intermediate system encoder.

[Fig. 55] Fig. 55 is a diagram illustrating a configuration example of a vertical expansion unit of an intermediate system decoder.

FIG. 56 is an explanatory diagram of a folding component and its canceling component in vertical component transmission.

FIG. 57 is a diagram shown for explaining an example of scanning line conversion.

FIG. 58 is a diagram showing frequency characteristics in the process of undergoing reduction processing.

FIG. 59 is an explanatory diagram of impulse response in horizontal compression processing.

FIG. 60 is a diagram for illustrating a configuration example of a scanning line conversion unit and its operation.

FIG. 61 is a diagram showing an encoder for a center signal.

FIG. 62 is an explanatory diagram of a spectrum of an intermediate video signal.

[Fig. 63] Fig. 63 is a diagram illustrating a configuration example of a Vh / VT encoder in an intermediate encoder.

FIG. 64 is a diagram showing a spectrum of a signal in a moving image mode of an intermediate format video signal.

[Fig. 65] Fig. 65 is a diagram illustrating a configuration example of a VT reproducing unit in an intermediate encoder.

[Fig. 66] Fig. 66 is a diagram illustrating a configuration example of a motion adaptive center signal decoder in an intermediate system decoder.

FIG. 67 is a diagram showing a specific arrangement example of a VT reproducing unit in an intermediate encoder.

[Fig. 68] Fig. 68 is a diagram showing a specific arrangement example of the Vh / VT decoder in the intermediate system decoder.

69 is an operation explanatory view shown for explaining the operation of the circuit of FIG. 68;

FIG. 70 is a diagram shown for explaining the relationship between the circuits of FIGS. 67 and 68 and the operation thereof.

71 is a diagram shown for explaining the relationship between the circuits of FIGS. 67 and 68 and the operation thereof. FIG.

[Fig. 72] Fig. 72 is a diagram illustrating a specific arrangement of the motion detection unit in the intermediate system decoder.

FIG. 73 is an explanatory diagram showing a spectrum of an intermediate format video signal.

FIG. 74 is a diagram showing a configuration example of a Vh / VT encoder of an intermediate encoder.

FIG. 75 is an explanatory diagram showing the progress of transmission processing of signals transmitted by the upper and lower mask portions.

[Fig. 76] Fig. 76 is a diagram illustrating a configuration example of a Vh / VT decoder in an intermediate system decoder.

FIG. 77 is an explanatory view showing the progress of reproduction processing of a signal transmitted by the upper and lower mask parts.

[Fig. 78] Fig. 78 is a diagram showing a specific arrangement example of the display switching unit in the decoder.

FIG. 79 is a diagram showing still another embodiment of a video decoder.

FIG. 80 is a diagram showing a specific arrangement example of a normalization encoder.

FIG. 81 is a diagram showing a specific arrangement example of a normalization decoder.

FIG. 82 is a diagram showing normalization characteristics on the encoder side.

FIG. 83 is a diagram showing normalization characteristics on the decoder side.

[Fig. 84] Fig. 84 is a diagram illustrating a specific example of a non-linear conversion unit in an intermediate encoder.

[Fig. 85] Fig. 85 is a diagram illustrating a specific example of the non-linear conversion unit in the intermediate system decoder.

[Fig. 86] Fig. 86 is a diagram showing another example of the format of an intermediate format video signal.

87 is an explanatory diagram shown for explaining the operation principle of the non-linear conversion unit. FIG.

88 is a diagram showing a specific example of the reference signal generator of FIG. 84. FIG.

89 is a diagram showing a specific example of the coefficient determination circuit in FIG. 85.

FIG. 90 is a diagram showing a specific example of an emphasis circuit in an encoder.

FIG. 91 is a diagram showing a specific example of a de-emphasis circuit in a decoder.

92 is an explanatory diagram shown for explaining characteristics of the pre- and de-emphasis circuits. FIG.

FIG. 93 is an explanatory diagram shown for explaining the characteristics of the pre- and de-emphasis circuits.

FIG. 94 is an explanatory diagram showing an example of a signal processed by an emphasis circuit.

FIG. 95 is a diagram showing an example of a DC generating circuit of an emphasis circuit.

FIG. 96 is a diagram specifically showing a side panel processing unit on the encoder side.

97 is a diagram specifically showing a side panel processing section on the decoder side. FIG.

FIG. 98 is an explanatory view showing the progress of side panel processing.

99 is an explanatory diagram of frequency characteristics of side panel components. FIG.

[Fig. 100] Fig. 100 is a diagram illustrating a configuration example of a combining unit in an intermediate encoder.

101 is a diagram showing a configuration example of a combining unit in the intermediate system decoder. FIG.

FIG. 102 is a diagram showing a configuration example of a rearrangement processing unit in the intermediate encoder.

103 is a diagram showing a configuration example of a rearrangement processing unit in the intermediate system decoder. FIG.

104 is a circuit diagram showing each addition / subtraction processing unit in FIG. 102 and FIG. 103;

FIG. 105 is an explanatory diagram showing a format of a multiplexed signal of the upper and lower mask portions.

FIG. 106 is a diagram showing an example of a side panel processing unit in an intermediate encoder.

FIG. 107 is a diagram showing an example of a side panel processing unit in the intermediate system decoder.

FIG. 108 is a diagram shown for explaining the operation of the center panel processing unit.

FIG. 109 is a diagram for explaining the operation of the center panel processing unit.

FIG. 110 is a diagram for explaining the operation of the center panel processing unit.

[Fig. 111] Fig. 111 is a diagram illustrating a specific configuration example of a side panel high-frequency low-frequency division unit in an intermediate encoder.

FIG. 112 is a diagram showing a rearrangement unit in the intermediate encoder.

113 is a diagram showing a rearrangement unit in the intermediate system decoder. FIG.

FIG. 114 is an explanatory diagram showing a principle of a transmission form of a video signal.

115 is a diagram showing an example of a circuit for separating a luminance signal and a chrominance signal from the video signal transmitted in the form of FIG. 114.

116 is a diagram showing an example of a circuit which processes a luminance signal and a chrominance signal separated by the circuit of FIG. 115.

117 is an explanatory diagram shown for explaining the operation of the circuit of FIG. 116;

FIG. 118 is a diagram showing a circuit that multiplexes a luminance signal and a chrominance signal on the transmission side.

[Explanation of symbols]

1000 ... High frequency input processing unit, 2000 ... Selector, 3
000 ... voice amplifier, 4000 ... speaker, 5000 ...
Selector, 6000 ... Video decoder, 7000 ... Synchronization control unit, 8000 ... Display, 9000 ... User control unit, 200 ... Indicator.

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Satoshi Ishii 8 Shinsita-cho, Isogo-ku, Yokohama-shi, Kanagawa Prefecture Home Appliances Technology Laboratory, Toshiba Corporation Yokohama Works (72) Inventor Seijiro Yasugi Isogo-ku, Yokohama-shi, Kanagawa Shin-Sugita-cho 8 Home Appliance Technology Laboratory, Toshiba Corporation Yokohama Works (72) Inventor Noriya Sakamoto 8-Shin-Sugita-cho, Isogo-ku, Yokohama-shi, Kanagawa Home Appliance Technology Laboratory, Toshiba Yokohama Office (72) Inventor Yoshihiko Ogawa 8th Shinsugita-cho, Isogo-ku, Yokohama, Kanagawa Prefecture Home Appliances Technology Research Laboratory, Toshiba Yokohama Works (72) Inventor Atsushi Hirota 8th, Shinsugita-cho, Isogo-ku, Yokohama City, Kanagawa Prefecture 72) Inventor Koichi Noguchi 8 Yokohama Shinsugita-cho, Isogo-ku, Yokohama-shi, Kanagawa Stock company Toshiba Yokohama Tokoro consumer electronics intra-technology Research Institute (72) inventor Koichi Sato, Minato-ku, Tokyo Shimbashi 3-chome, No. 3, No. 9 Toshiba error over buoy Yee within Co., Ltd.

Claims (4)

[Claims] 1. A correction means for introducing a modulation signal in which a video signal and a digital signal are orthogonally modulated and multiplexed, wherein the video signal and the digital signal are respectively detected by in-phase / quadrature detection and the detected video is detected. A means for obtaining a signal and a digital signal, a first difference means for obtaining a differential output of the video signal after the detection, and a ghost is detected by using a reference signal of a specific period of the output of the first difference means, A first waveform equalizer for waveform equalizing the output of the first difference means; a second difference means for obtaining a differential output of the digital signal; and a second period output of the second difference means for a specific period. A waveform equalizer that detects a ghost by using a reference signal and equalizes the output of the second difference unit; and a second waveform equalizer that uses the output of the first waveform equalizer as a cancel signal. Means supplying to the output of the means Television signal processing apparatus characterized by comprising a. 2. Correction means for introducing a modulation signal in which a video signal and a digital signal are quadrature-modulated and multiplexed, wherein the video signal and the digital signal are respectively detected by in-phase / quadrature detection, and the detected video is detected. Means for obtaining a signal and a digital signal, means for analog-to-digital conversion of the detected video signal, means for introducing the digitally converted video signal into a video decoder, and analog-to-digital conversion of the detected digital signal Means, means for converting a sample rate of the digitally converted video signal into a rate on the digital signal side, first difference means for obtaining a differential output of the video signal obtained from the means, A first waveform equalizer for detecting a ghost by using a reference signal of the output of the difference means in a specific period and equalizing the waveform of the output of the first difference means. A second difference means for obtaining a difference output of the digitized digital signal, a ghost is detected using a reference signal of a specific period of the output of the second difference means, and the second difference means is provided. Waveform equalizing means for equalizing the output of the means, and means for supplying the output of the first waveform equalizing means as a cancel signal to the output of the second waveform equalizing means. Television signal processing device. 3. The means for introducing the digitally converted video signal into a video decoder detects a ghost by referring to a reference signal of a specific period of the video signal, and equalizes the waveform of the video signal. 3. The television signal processing according to claim 2, further comprising a waveform equalizing means of No. 3, and a differentiator is provided in an introduction path of the reference signal for reference of the waveform equalizing means. apparatus. 4. A signal in which a video signal and a digital audio signal are quadrature-modulated and introduced, and the video signal and the digital signal are respectively detected by in-phase / quadrature detection to detect the video signal and the digital audio signal. And digital decoding means for obtaining an analog converted first audio signal by performing error correction processing of the digital audio signal and obtaining a judgment output indicating an error rate, and frequency-multiplexed with the detected video signal itself. The means for obtaining the analog second audio signal and the judgment output indicating the error rate obtained from the digital decoding means are equal to or higher than a predetermined rate, the second audio signal is selectively derived and is within the predetermined rate. And a means for selectively deriving the first audio signal, the television signal processing device.