JPH07249825A - Semiconductor laser - Google Patents

Semiconductor laser

Info

Publication number
JPH07249825A
JPH07249825A JP3971094A JP3971094A JPH07249825A JP H07249825 A JPH07249825 A JP H07249825A JP 3971094 A JP3971094 A JP 3971094A JP 3971094 A JP3971094 A JP 3971094A JP H07249825 A JPH07249825 A JP H07249825A
Authority
JP
Japan
Prior art keywords
layer
current
semiconductor laser
electrode
gaas
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3971094A
Other languages
Japanese (ja)
Inventor
Hiroyuki Sawano
博之 沢野
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP3971094A priority Critical patent/JPH07249825A/en
Publication of JPH07249825A publication Critical patent/JPH07249825A/en
Pending legal-status Critical Current

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  • Semiconductor Lasers (AREA)

Abstract

PURPOSE:To realize a semiconductor laser whose threshold current is low and which has an inverted SAG structure. CONSTITUTION:An n-AlGaInP clad layer 2, a GaInP active layer 3, a p-AlGaInP clad layer 4, a p-GaInP etching-stopper layer 5 and a p-AlGaInP clad layer 6 are formed sequentially on an n-GaAs substrate 1 by an MOVPE method. Then, a mesa 22 is formed in a mesa formation process by using a photolithographic technique and an etching technique. After that, a first current-blocking n-layer 30 and a second current-blocking p-layer 31 are formed by an MOVPE method. In addition, an n-electrode 10 and a p-electrode 9 are formed, and this assembly is separated into individual chips.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は半導体レーザの構造に関
し、特に動作電流の低い半導体レーザの構造に関するも
のである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor laser structure, and more particularly to a semiconductor laser structure having a low operating current.

【0002】[0002]

【従来の技術】近年、半導体レーザは情報機器、光通信
など幅広く使われている。特にAlGaInP半導体レ
ーザは発振波長600から700nmと短く、可視域にあ
ることが特徴である。この特徴を活かし、光ディスク、
ポインタ、バーコードリーダ等の光源としての応用が期
待され、一部実用化されている。
2. Description of the Related Art In recent years, semiconductor lasers have been widely used in information equipment, optical communication and the like. In particular, the AlGaInP semiconductor laser is characterized in that it has an oscillation wavelength as short as 600 to 700 nm and is in the visible range. Taking advantage of this feature,
It is expected to be applied as a light source for pointers, bar code readers, etc., and some have been put to practical use.

【0003】図4は逆SAS構造の半導体レーザの構造
図である。この図において1はn−GaAs基板、2は
n−AlGaInPクラッド層、3はGaInP活性
層、4はp−AlGaInPクラッド層、5はp−Ga
InPエッチングストッパ層、6はp−AlGaInP
クラッド層、7はn−GaAs電流ブロック層、8はp
−GaAsキャップ層、9はp電極、10はn電極、2
3はpクラッド層n型反転領域、40、41、42はい
ずれも電流経路である。
FIG. 4 is a structural diagram of a semiconductor laser having an inverted SAS structure. In this figure, 1 is an n-GaAs substrate, 2 is an n-AlGaInP clad layer, 3 is a GaInP active layer, 4 is a p-AlGaInP clad layer, and 5 is p-Ga.
InP etching stopper layer, 6 is p-AlGaInP
Clad layer, 7 is n-GaAs current blocking layer, 8 is p
-GaAs cap layer, 9 is a p-electrode, 10 is an n-electrode, 2
3 is a p-cladding layer n-type inversion region, and 40, 41 and 42 are current paths.

【0004】ここで動作について説明する。p電極9、
n電極10に順バイアス方向に電圧を印加すると電流経
路40に沿って電流が流れ、活性層3において注入キャ
リアの発光再結合が生じレーザ光が出射される。ここ
で、電流ブロック層7は導電型がn型であるため、電流
ブロック層を通る電流経路41の導電型はn−p−nと
なり、この経路に沿った電流はほとんど流れない。一
方、電流ブロック層7を通らない電流経路40の導電型
はp−nであって順バイアス状態では容易に電流が流れ
る。すなわち、n−電流ブロック層7は注入した電流を
効率的に電流経路40に集める働きをしており、半導体
レーザの低電流動作を実現している。
The operation will now be described. p electrode 9,
When a voltage is applied to the n-electrode 10 in the forward bias direction, a current flows along the current path 40, and radiative recombination of injected carriers occurs in the active layer 3 to emit laser light. Here, since the conductivity type of the current block layer 7 is n-type, the conductivity type of the current path 41 passing through the current block layer is n-pn, and almost no current flows along this path. On the other hand, the conductivity type of the current path 40 that does not pass through the current block layer 7 is pn, and a current easily flows in the forward bias state. That is, the n-current blocking layer 7 functions to efficiently collect the injected current in the current path 40, and realizes the low current operation of the semiconductor laser.

【0005】次にその製造方法について説明する。ま
ず、基板1上に、例えばMOVPE法によってn−Al
GaInPクラッド層2、GaInP活性層3、p−A
lGaInPクラッド層4、p−GaInPエッチング
ストッパ層5、p−クラッド層6を順次形成する。次
に、メサ側部をエッチングストッパ層5直上まで選択的
にエッチングしメサ22を形成する。このうえで、n−
GaAs電流ブロック層7、p−GaAsキャップ層8
を形成する。さらにn電極10、p電極9を形成し、各
チップに分離する。
Next, the manufacturing method will be described. First, n-Al is formed on the substrate 1 by, for example, the MOVPE method.
GaInP clad layer 2, GaInP active layer 3, p-A
The 1GaInP clad layer 4, the p-GaInP etching stopper layer 5, and the p-clad layer 6 are sequentially formed. Next, the side of the mesa is selectively etched right above the etching stopper layer 5 to form the mesa 22. Then, n-
GaAs current blocking layer 7, p-GaAs cap layer 8
To form. Further, an n-electrode 10 and a p-electrode 9 are formed and separated into chips.

【0006】[0006]

【発明が解決しようとする課題】ところが、例えば前記
製造工程におけるメサ形成工程において、例えばヒロッ
クの存在等何らかの理由でエッチングストッパ層の一部
にピンホールが生じると、このピンホール下部のp−ク
ラッド層4は容易にエッチングされてしまう。これに続
くn−電流ブロック層の形成において、前記エッチング
された領域にp−クラッドn型反転領域23が形成され
る。このときp電極9からp−クラッドn反転領域23
を通りn電極10にいたる電流経路42の導電型はn型
となって通常のオーミック抵抗と同じ振る舞いを示す。
これが電流短絡経路となり、無効電流が流れ、半導体レ
ーザの低閾値動作が困難となる。
However, if a pinhole is formed in a portion of the etching stopper layer for some reason such as the presence of hillocks in the mesa forming step in the manufacturing process, the p-clad under the pinhole is formed. Layer 4 is easily etched. In the subsequent formation of the n-current blocking layer, a p-clad n-type inversion region 23 is formed in the etched region. At this time, from the p electrode 9 to the p-clad n inversion region 23
The conductivity type of the current path 42 reaching the n-electrode 10 through the n-type becomes n-type and exhibits the same behavior as a normal ohmic resistance.
This becomes a current short circuit path, a reactive current flows, and low threshold operation of the semiconductor laser becomes difficult.

【0007】[0007]

【課題を解決するための手段】上述した問題点を解決す
るため、本発明の半導体レーザの構造は電流ブロック層
の導電型の一部に基板の導電型と逆の導電型の領域を含
む。
In order to solve the above-mentioned problems, the structure of the semiconductor laser of the present invention includes a region of a conductivity type opposite to that of the substrate in a part of the conductivity type of the current blocking layer.

【0008】[0008]

【作用】この発明においては電流ブロック層の一部に基
板の導電型と逆の導電型の領域を含んでいるため、電流
ブロック層下のクラッド層に導電型反転領域が存在して
も、半導体レーザの低電流な動作が実現される。
According to the present invention, since the current blocking layer includes a region having a conductivity type opposite to the conductivity type of the substrate, even if the conductivity type inversion region exists in the clad layer below the current blocking layer, the semiconductor does not exist. A low current operation of the laser is realized.

【0009】[0009]

【実施例】以下、この発明の第1の実施例を図1を用い
て説明する。図1(a)は本発明の半導体レーザの構造
の第1の実施例を説明するための断面図、図1(b)は
図1(a)の要部拡大図である。この図において、図4
と同一符号のものは同一のものを示し、30はn−Ga
As第1電流ブロック層、31はp−GaAs第2電流
ブロック層、43、44はいずれも電流経路である。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A first embodiment of the present invention will be described below with reference to FIG. FIG. 1A is a sectional view for explaining the first embodiment of the structure of the semiconductor laser of the present invention, and FIG. 1B is an enlarged view of a main part of FIG. 1A. In this figure, FIG.
Those having the same reference numerals as those in FIG.
As first current blocking layer, 31 is a p-GaAs second current blocking layer, and 43 and 44 are current paths.

【0010】まず製造方法について説明する。まず図1
(a)に示すように、基板1上に、MOVPE法によっ
てn−AlGaInPクラッド層2、GaInP活性層
3、p−AlGaInPクラッド層4、p−GaInP
エッチングストッパ層5、p−AlGaInPクラッド
層6を順次形成する。次に、フォトリソグラフィ技術、
およびエッチング技術を用い、メサ形成プロセスにより
メサ22を形成する。その後MOVPE法によりn−第
1電流ブロック層30、p−第2電流ブロック層31を
形成する。さらにn電極10、p電極9を形成し、各チ
ップに分離する。
First, the manufacturing method will be described. Figure 1
As shown in (a), the n-AlGaInP cladding layer 2, the GaInP active layer 3, the p-AlGaInP cladding layer 4, and the p-GaInP are formed on the substrate 1 by the MOVPE method.
The etching stopper layer 5 and the p-AlGaInP cladding layer 6 are sequentially formed. Next, photolithography technology,
Then, the mesa 22 is formed by a mesa formation process using an etching technique. After that, the n-first current blocking layer 30 and the p-second current blocking layer 31 are formed by the MOVPE method. Further, an n-electrode 10 and a p-electrode 9 are formed and separated into chips.

【0011】次に、作用について説明する。基本的な動
作は従来のレーザと同様である。しかし、本発明のレー
ザでは、従来例の電流経路42に対応した電流経路43
には、p−n接合が存在し、単一導伝型のオーミック抵
抗に比べ、漏れ電流が低減される。なお、電流経路44
に示すようなn型単一の電流経路も存在するが、この経
路は極めて細く、漏れ電流は小さい。
Next, the operation will be described. The basic operation is similar to that of a conventional laser. However, in the laser of the present invention, the current path 43 corresponding to the current path 42 of the conventional example is used.
Has a pn junction, and leakage current is reduced as compared with a single conduction type ohmic resistance. The current path 44
There is also a single n-type current path as shown in, but this path is extremely thin and the leakage current is small.

【0012】次に、第2の実施例を図2を用いて説明す
る。図2(a)は本発明の半導体レーザの構造の第2の
実施例を説明するための断面図、図2(b)は図2
(a)の要部拡大図である。この図において、図1と同
一符号のものは同一のものを示し、32はn−GaAs
第3電流ブロック層、45、46はいずれも電流経路で
ある。
Next, a second embodiment will be described with reference to FIG. 2A is a sectional view for explaining a second embodiment of the structure of the semiconductor laser of the present invention, and FIG. 2B is FIG.
It is a principal part enlarged view of (a). In this figure, the same reference numerals as those in FIG. 1 denote the same elements, and 32 denotes n-GaAs.
The third current blocking layers 45 and 46 are all current paths.

【0013】基本的な製造方法は実施例1と同じであ
る。実施例1との違いは、実施例1におけるn−GaA
s第1電流ブロック層30、p−GaAs第2電流ブロ
ック層31形成の後、さらにn−GaAs第3電流ブロ
ック層32を形成することである。本実施例の場合、実
施例1における電流経路43に対応した電流経路45の
導電型がn−p−nとなるため、p−n型の電流経路に
比べ、漏れ電流をさらに低減できる。なお、電流経路4
6に示すようなp−n型の電流経路も存在するがこの経
路は極めて細く、漏れ電流は小さい。
The basic manufacturing method is the same as that of the first embodiment. The difference from Example 1 is that n-GaA in Example 1 is different.
After forming the s first current blocking layer 30 and the p-GaAs second current blocking layer 31, the n-GaAs third current blocking layer 32 is further formed. In the case of the present embodiment, since the conductivity type of the current path 45 corresponding to the current path 43 in the first embodiment is npn, the leakage current can be further reduced compared to the pn type current path. The current path 4
There is also a pn type current path as shown in 6, but this path is extremely thin and the leakage current is small.

【0014】次に、第3の実施例を図3を用いて説明す
る。図3(a)は本発明の半導体レーザの構造の第3の
実施例を説明するための断面図、図3(b)は図3
(a)の要部拡大図である。この図において、図1と同
一符号のものは同一のものを示し、8はp−GaAsキ
ャップ層、47は電流経路である。
Next, a third embodiment will be described with reference to FIG. 3A is a sectional view for explaining a third embodiment of the structure of the semiconductor laser of the present invention, and FIG. 3B is FIG.
It is a principal part enlarged view of (a). In this figure, the same symbols as those in FIG. 1 indicate the same components, 8 is a p-GaAs cap layer, and 47 is a current path.

【0015】基本的な製造方法は実施例1と同じであ
る。実施例1との違いは、実施例1におけるn−GaA
s第1電流ブロック層30、p−GaAs第2電流ブロ
ック層の形成の後、さらにp−GaAsキャップ層を形
成することである。本実施例の場合、実施例1における
電流経路44に対応した電流経路47の導電型がp−n
となるため、n型単一の経路に比べ、漏れ電流をさらに
低減できる。
The basic manufacturing method is the same as that of the first embodiment. The difference from Example 1 is that n-GaA in Example 1 is different.
s After forming the first current blocking layer 30 and the p-GaAs second current blocking layer, a p-GaAs cap layer is further formed. In the case of the present embodiment, the conductivity type of the current path 47 corresponding to the current path 44 in the first embodiment is pn.
Therefore, the leakage current can be further reduced as compared with the single n-type path.

【0016】また以上の実施例の他にも、例えば実施例
2と実施例3を組み合わせるなど、ブロック層の導電型
を制御することによって漏れ電流を低減する方法は様々
にあり、これによって閾値電流の低減を実現できること
はもちろんである。
In addition to the above embodiments, there are various methods of reducing the leakage current by controlling the conductivity type of the block layer, for example, by combining the embodiments 2 and 3, and the threshold current Of course, the reduction of

【0017】また、量子井戸の活性層や、多重量子障壁
を用いたレーザ、またAlGaInP以外の材料で作成
したレーザでも効果は同様である。
The same effect can be obtained with a laser using a quantum well active layer, a multiple quantum barrier, and a laser made of a material other than AlGaInP.

【0018】また、以上n型基板上に作成するレーザの
場合について説明したが、p型基板上に作製するレーザ
の場合、導電型を全て逆にすれば全く同じ効果が得られ
ることも明らかである。
Further, although the case of the laser formed on the n-type substrate has been described above, it is clear that the same effect can be obtained in the case of the laser formed on the p-type substrate by reversing the conductivity types. is there.

【0019】[0019]

【発明の効果】以上のように、本発明の半導体レーザの
構造は電流ブロック層の導電型の一部に基板の導電型と
逆の導電型の領域を含むため電流ブロック層を通る漏れ
電流を低減できた。
As described above, since the structure of the semiconductor laser of the present invention includes a region of the conductivity type of the current block layer which is opposite to the conductivity type of the substrate, the leakage current passing through the current block layer is prevented. It was possible to reduce.

【図面の簡単な説明】[Brief description of drawings]

【図1】(a)は本発明の第1の実施例を説明するため
の半導体レーザの断面図で、(b)は(a)の要部拡大
図である。
FIG. 1A is a sectional view of a semiconductor laser for explaining a first embodiment of the present invention, and FIG. 1B is an enlarged view of a main part of FIG.

【図2】(a)は本発明の第2の実施例を説明するため
の半導体レーザの断面図で、(b)は(a)の要部拡大
図である。
FIG. 2A is a sectional view of a semiconductor laser for explaining a second embodiment of the present invention, and FIG. 2B is an enlarged view of a main part of FIG.

【図3】(a)は本発明の第3の実施例を説明するため
の半導体レーザの断面図で、(b)は(a)の要部拡大
図である。
FIG. 3A is a sectional view of a semiconductor laser for explaining a third embodiment of the present invention, and FIG. 3B is an enlarged view of a main part of FIG.

【図4】従来の実施例を説明するための半導体レーザの
断面図である。
FIG. 4 is a sectional view of a semiconductor laser for explaining a conventional example.

【符号の説明】[Explanation of symbols]

1 n−GaAs基板 2 n−AlGaInPクラッド層 3 GaInP活性層 4 p−AlGaInPクラッド層 5 p−GaInPエッチングストッパ層 6 p−AlGaInPクラッド層 7 n−GaAs電流ブロック層 8 p−GaAsキャップ層 9 p電極 10 n電極 22 メサ 23 pクラッド層n型反転領域 30 n−GaAs第1電流ブロック層 31 p−GaAs第2電流ブロック層 32 p−GaAs第3電流ブロック層 40 電流経路 41 電流経路 42 電流経路 43 電流経路 44 電流経路 45 電流経路 46 電流経路 47 電流経路 1 n-GaAs substrate 2 n-AlGaInP clad layer 3 GaInP active layer 4 p-AlGaInP clad layer 5 p-GaInP etching stopper layer 6 p-AlGaInP clad layer 7 n-GaAs current blocking layer 8 p-GaAs cap layer 9 p electrode 10 n electrode 22 mesa 23 p clad layer n-type inversion region 30 n-GaAs first current block layer 31 p-GaAs second current block layer 32 p-GaAs third current block layer 40 current path 41 current path 42 current path 43 Current path 44 Current path 45 Current path 46 Current path 47 Current path

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】活性層上面におけるクラッド層に形成され
たメサ構造と、該メサ構造の両脇に形成された電流狭窄
のためブロック層を有する半導体レーザにおいて、前記
電流ブロック層の導電型の一部に基板の導電型と逆の導
電型の領域を含むことを特徴とする半導体レーザ。
1. A semiconductor laser having a mesa structure formed in a clad layer on an upper surface of an active layer and a block layer formed on both sides of the mesa structure due to current confinement, wherein the conductivity type of the current block layer is one. A semiconductor laser, characterized in that the portion includes a region having a conductivity type opposite to that of the substrate.
JP3971094A 1994-03-10 1994-03-10 Semiconductor laser Pending JPH07249825A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3971094A JPH07249825A (en) 1994-03-10 1994-03-10 Semiconductor laser

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3971094A JPH07249825A (en) 1994-03-10 1994-03-10 Semiconductor laser

Publications (1)

Publication Number Publication Date
JPH07249825A true JPH07249825A (en) 1995-09-26

Family

ID=12560554

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3971094A Pending JPH07249825A (en) 1994-03-10 1994-03-10 Semiconductor laser

Country Status (1)

Country Link
JP (1) JPH07249825A (en)

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5766685A (en) * 1980-06-03 1982-04-22 Nec Corp Rib structure semiconductor laser
JPH04142093A (en) * 1990-10-02 1992-05-15 Matsushita Electric Ind Co Ltd Visible light semiconductor laser
JPH07202336A (en) * 1993-12-28 1995-08-04 Matsushita Electric Ind Co Ltd Semiconductor laser and manufacture thereof

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5766685A (en) * 1980-06-03 1982-04-22 Nec Corp Rib structure semiconductor laser
JPH04142093A (en) * 1990-10-02 1992-05-15 Matsushita Electric Ind Co Ltd Visible light semiconductor laser
JPH07202336A (en) * 1993-12-28 1995-08-04 Matsushita Electric Ind Co Ltd Semiconductor laser and manufacture thereof

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