JPH07249269A - Clock signal generating device and clock signal generating method - Google Patents

Abstract

PURPOSE:To quickly and surely generate a clock signal with a simple constitution. CONSTITUTION:It is discriminated by a lock detecting circuit 26 whether a PLL circuit 25 is in a lock state or not. When it is discriminated by an output of the lock detecting circuit 26 that the PLL circuit 25 is in a lock state, a CPU 30 controls a sine wave generating circuit 31 and generates a sine wave signal. This sine wave signal is supplied to a voice coil motor driving circuit 16, the voice coil motor driving circuit 16 drives a voice coil motor 15 corresponding to the sine wave signal. Consequently, a reproducing head 12 is rocked so as to cross track 3 of plural lines formed on a disk 1. Thereby, a probability that data recorded in the track 3 is erroneously detected as a clock mark, is reduced, a clock mark 2 stamped and formed on the disk 1 can be surely detected by a clock extracting circuit 20.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a clock signal generator and a clock signal generator suitable for use in reproducing data on a magnetic disk, for example.

[0002]

2. Description of the Related Art When reproducing digital information recorded on a disk such as a magnetic disk, an optical disk, a magneto-optical disk, or recording digital information on the disk, a clock that is a reference for reproduction or recording operation is required. Becomes

In a self-clock system which is generally used in magnetic disk devices, a clock component can be generated from reproduced data because the data itself contains a clock component.

On the other hand, in a so-called sampled servo system disk, clock marks are engraved on the disk at a predetermined interval, and a clock signal is generated by a PLL circuit on the basis of a reproduction signal of this clock mark. Is generated.

This reproduced clock signal can hold an extremely precise synchronization relationship of about 10 ns or less with respect to the clock mark, and data recording / reproduction is performed in synchronization with the reproduced clock signal synchronized with this clock mark. It can be carried out.

[0006]

However, for example, when the power supply is turned on or due to noise or the like, the PLL circuit for generating the reproduced clock signal is unlocked and the pull-in operation is performed again. During the process, the read head may continue to run on the track on which the record data similar to the clock mark is recorded, and the clock mark is frequently erroneously detected at this time. There was a problem that it took time to pull in.

The present invention has been made in view of the above circumstances, and is intended to enable a clock signal to be generated quickly and reliably even when clock synchronization is established.

[0008]

A clock signal generator of the present invention reproduces data recorded on a track (eg, track 3 in FIG. 1) of a disk from a rotating disk (eg, disk 1 in FIG. 1). Head (eg Figure 1
Reproduction is performed by the reproduction head 12) and the clock information recorded on the disk is extracted from the output of the reproduction head.
In a clock signal generation device for generating a clock signal synchronized with clock information, an extraction unit (for example, clock extraction circuit 20 in FIG. 1) for extracting clock information (for example, clock mark 2 in FIG. 1) from the output of the reproducing head; Generating means for generating a clock signal synchronized with the clock information extracted by the means (for example, the PLL circuit 2 in FIG. 1).
5) and moving means for moving the reproducing head in the radial direction of the disc (for example, the voice coil motor 15 in FIG. 1),
Swinging means (for example, the sine wave generating circuit 31 in FIG. 1) for controlling the moving means and swinging the reproducing head in the radial direction of the disk when the generating means is generating the clock signal. To do.

The moving means may be configured to rotate the reproducing head in a radial direction of the disk about a predetermined axis (for example, the rotating shaft 11 in FIG. 1).

The extracting means may extract, as the clock information, a signal corresponding to the clock marks formed on the disk at equal intervals.

The moving means may be a voice coil motor (for example, the voice coil motor 15 in FIG. 1) which moves the reproducing head in the radial direction of the disk during the seek operation.

The oscillating means may be a signal generating circuit (for example, the sine wave generating circuit 31 in FIG. 1) that generates a repetitive signal having a predetermined cycle and supplies it to the voice coil motor.

The repetitive signal generated by the signal generating circuit is
It can be a sinusoidal signal.

The signal generated by the signal generating circuit may be a signal which causes the reproducing head to slightly vibrate in the radial direction of the disk a plurality of times during one rotation of the disk. In this case, the read head can be a signal that crosses a plurality of tracks during one rotation of the disk. The number of tracks in this case can be 10 or more.

The generating means is a PLL circuit (for example, P in FIG. 1).
It can be configured by the LL circuit 25).

A lock detecting circuit (for example, the lock detecting circuit 26 in FIG. 1) for detecting the locked state of the PLL circuit can be further provided. In this case, the lock detection circuit
When it is detected that the LL circuit is unlocked,
The signal generation circuit can be made to repeatedly generate signals.

A tracking error signal is generated from a wobbled mark (eg, the wobbled mark 4 in FIG. 2) formed on the disk and supplied to the voice coil motor (eg, the closed servo circuit 19 in FIG. 1). ) Can be further provided.

According to the clock signal generating method of the present invention, the reproducing head reproduces the data and the clock mark recorded on the disk from the rotating disk, and the clock signal is generated in synchronization with the clock mark reproduced by the reproducing head. In the clock signal generation method to generate,
If it is determined that the clock signal is not synchronized with the clock mark by the synchronization state determination procedure (for example, step S1 in FIG. 3) for determining the synchronization state of the clock signal and the clock mark, the reproducing head A rocking procedure for rocking the disk in the radial direction of the disk (for example, step S2 in FIG. 3) and a clock signal is generated in synchronization with a clock mark reproduced from the disk in a state in which the reproducing head is rocked by the rocking procedure. And a clock synchronization procedure (for example, step S3 of FIG. 3).

[0019]

In the clock signal generating device and the clock signal generating method having the above-described structure, the reproducing head is swung in the radial direction of the disk 1 when the clock mark and the clock signal are not synchronized. As a result, the clock signal can be generated quickly and reliably.

[0020]

1 shows an example of the configuration of a magnetic disk device to which the clock signal generator of the present invention is applied. The disk (magnetic disk) 1 is rotationally driven by a spindle motor 33 at a constant angular velocity (for example, a rotation speed of about 60 Hz). The reproducing head 12 attached to the tip of the arm 13 moves in an arc shape in the radial direction of the disk 1 when the arm 13 rotates about the rotation shaft 11. This movement of the arm 13 is performed by driving a voice coil motor 15 having a voice coil 14.

Tracks 3 (which may be spiral) are formed concentrically on the disk 1, and predetermined data are recorded on the tracks 3. Further, clock marks 2 are preliminarily stamped and formed on the disc 1 at regular intervals in a radial pattern by embossing or the like.

Further, as shown in FIG. 2, wobbled marks 4 are formed on the left and right sides of the track 3 on the disk 1, and the reproducing head 12 follows a predetermined track among the tracks 3. It is designed to be able to. The wobbled mark 4 is also engraved.

The reproducing head 12 reproduces the data recorded on the disk 1, the clock mark 2, the wobbled mark 4 and the like, and outputs a reproduction signal thereof. The reproduced signal is amplified by the amplifier 17 and then supplied to the A / D conversion circuit 18 and the closed servo circuit 19.

The closed servo circuit 19 includes an amplifier 17
A signal corresponding to the wobbled mark 4 is detected from the input signal, a tracking error signal is generated from this signal, and this tracking error signal is added to the adder circuit 32.
Is supplied to the voice coil motor drive circuit 16 via.
The voice coil motor drive circuit 16 drives the voice coil 14 (arranged in a predetermined magnetic field) in response to the tracking error signal to cause the reproducing head 12 to follow a predetermined track.

The A / D conversion circuit 18 A / D converts the input signal. The signal output from the A / D conversion circuit 18 is supplied to the reading circuit (not shown) and the clock extraction circuit 20. Clock extraction circuit 20
Extracts a signal corresponding to the clock mark 2 from the input signal, and outputs the extracted signal to the PLL circuit 25 and the lock detection circuit 26. The PLL circuit 25 generates a reproduction clock signal in synchronization with the input signal and supplies the reproduction clock signal to a reading circuit or a recording circuit (not shown).

The lock detection circuit 26 receives the clock mark signal input to the PLL circuit 25 and the reproduced clock signal output from the PLL circuit 25, and determines whether the two signals are locked (synchronized). Then, the determination result is output to the CPU 30. In addition to controlling the spindle motor 33, the CPU 30 responds to the determination result from the lock detection circuit 26 and the sine wave generation circuit 31 and the PLL.
Control the circuit 25. The sine wave generation circuit 31 is controlled by the PLL circuit 25, generates a sine wave signal, and supplies the sine wave signal to the voice coil motor drive circuit 16 via the addition circuit 32.

Next, the operation will be described with reference to the flowchart of FIG. The process shown in the flowchart of FIG. 3 is performed by the CPU 30 when the reproducing operation is performed.
Executed by.

First, in step S1, the CPU 30
Drives the disk 1 to rotate by the spindle motor 33 and at least reproduces the clock mark by the reproducing head 12 while recording or reproducing data. Then, from the output of the lock detection circuit 26, the PLL circuit 25
It is determined whether or not is in the unlocked state. When it is not in the unlocked state, that is, when it is in the locked state, it waits until it becomes the unlocked state.

When it is determined in step S1 that the PLL circuit 25 is in the unlocked state, step S2
Then, the CPU 30 controls the sine wave generation circuit 31,
A sinusoidal signal with a frequency of about 120 Hz is generated. The sine wave signal is supplied to the voice coil motor drive circuit 16 via the adder circuit 32. The voice coil motor drive circuit 16 responds to this sine wave signal by the voice coil 1
4 to drive the voice coil motor 15 in the arm 1.
3 is swung in the left-right direction in the drawing around the rotary shaft 11. As a result, the reproducing head 12 vibrates slightly on the disc 1 in the disc radial direction.

FIG. 4 shows this disc 1 of the reproducing head 12.
The micro-vibration above is schematically shown. As shown in the figure, the reproducing head 12 slightly vibrates a plurality of times (twice in this embodiment) while the disk 1 makes one rotation. The vibration causes the disk 1 to swing in the radial direction with a width of 0.1 mm. As a result, the reproducing head 12 is
It will cross over several tens of tracks 3.

The swing width of the reproducing head 12 can be appropriately adjusted by setting the amplitude of the sine wave signal output from the sine wave generating circuit 31 to a predetermined value.

If the number of tracks traversed is too small,
The number of tracks traversed is preferably at least 10 or more because the effect of swinging the reproducing head 12 is reduced.

As described above, even if the reproducing head 12 crosses a plurality of tracks 3, the clock marks 2 are continuously formed in a radial pattern, so that the reproduced signal corresponding thereto does not oscillate. It is detected in almost the same way.

On the other hand, when the reproducing head 12 moves from one track to another, the reproduced data from the track 3 becomes discontinuous, and as a result, the clock mark 2
Even if similar data is recorded, the probability that the clock extraction circuit 20 erroneously detects this as a clock mark is reduced.

In step S2, the CPU 30 controls the sine wave generation circuit 31 to generate a sine wave signal, and in step S3 controls the PLL circuit 25 to generate a reproduction clock signal synchronized with the clock mark signal. To execute.

That is, the signal reproduced and output from the disk 1 by the reproducing head 12 is amplified by the amplifier 17, and then A
It is input to the / D conversion circuit 18 and A / D converted. The A / D converted signal is supplied to the clock extraction circuit 20. The clock extraction circuit 20 includes an A / D conversion circuit 18
A signal corresponding to the clock mark 2 is extracted from the input signal, and when the clock mark 2 can be extracted, a clock mark signal as shown in FIG. 5A is output.

When the clock mark signal is input, the PLL circuit 25 synchronizes with the clock mark signal and generates a reproduced clock signal as shown in FIG. 5B. The clock mark signal has a frequency of about 50 kHz, whereas the reproduced clock signal has a frequency of about 10 MHz.

Next, in step S4, the CPU 30
From the output of the lock detection circuit 26, it is determined whether the PLL circuit 25 is in the locked state. That is, the lock detection circuit 26 outputs the clock mark signal (FIG. 5A) output from the clock extraction circuit 20 and supplied to the PLL circuit 25.
The PLL circuit 25 receives an input of the reproduced clock signal generated and output (FIG. 5B), and determines whether or not both are in the locked (synchronized) state. When not in the locked state, the process returns from step S4 to step S2, and the subsequent processes are repeatedly executed. That is, the reproducing head 12 repeats the swinging motion.

If it is determined in step S4 that the PLL circuit 25 is locked, the process proceeds to step S5 and C
The PU 30 executes swing end processing. That is, the sine wave generation circuit 31 is controlled to stop the generation of the sine wave signal.
At this time, the closed servo circuit 19 detects the wobbled marks 4 arranged on the left and right of the track 3 from the output of the amplifier 17, and from the difference in the level of the detection signal,
Generate a tracking error signal. Then, this tracking error signal is supplied to the voice coil motor drive circuit 16 via the adder circuit 32. The voice coil motor drive circuit 16 drives the voice coil 14 in response to this tracking error signal. As a result, the reproducing head 12 is tracking-controlled so as to track a predetermined one track 3.

Thus, the reproduced clock signal (FIG. 5B) generated by the PLL circuit 25 and the reproduced data signal (FIG. 5C) output by the A / D conversion circuit 18 are shown in FIG. The reading circuit is supplied to a reading circuit (not shown), and the reading circuit executes a process of reading the reproduction data with the reproduction clock signal as a reference.

After step S5, the process returns to step S1.
Repeat the subsequent processing.

As described above, when the reproducing head 12 is swung, for example, the P speed is rapidly increased within a time of several tens of ms.
The LL circuit 25 can be locked.

In the above embodiment, the lock detection circuit 2
Although the swing operation is executed when 6 detects the unlocked state, it goes without saying that the same operation is executed even when the clock synchronization is established when the power is turned on.

In the above embodiment, the reproducing head 12 is driven by the voice coil motor 15 which executes both seek operation and tracking control during seek operation.
However, when the seek operation and the tracking control are performed by different members, the sine wave signal output from the sine wave generation circuit 31 is supplied to one of the members. do it.

The case where the present invention is applied to a magnetic disk device has been described above as an example, but the present invention can be applied to disks such as optical disks and magneto-optical disks in addition to magnetic disks.

[0046]

As described above, according to the clock signal generating device and the clock signal generating method of the present invention, since the reproducing head is swung in the radial direction of the disk, the data recorded on the disk is clocked by the clock information. As a result, the probability of false detection is reduced, and the clock signal can be generated quickly and reliably.

[Brief description of drawings]

FIG. 1 is a block diagram showing a configuration example of a magnetic disk device to which a clock signal generation device of the present invention is applied.

2 is a diagram illustrating wobbled marks formed on the disc 1 of FIG. 1. FIG.

FIG. 3 is a flowchart illustrating the operation of the embodiment of FIG.

FIG. 4 is a diagram illustrating a swinging operation of the reproducing head 12 of FIG.

5 is a timing chart explaining the operation of the embodiment of FIG.

[Explanation of symbols]

 1 disk 2 clock mark 3 track 4 wobbled mark 11 rotating shaft 12 reproducing head 13 arm 14 voice coil 15 voice coil motor 16 voice coil motor drive circuit 17 amplifier 18 A / D conversion circuit 19 closed servo circuit 20 clock extraction circuit 25 PLL circuit 26 Lock detection circuit 30 CPU 31 Sine wave generation circuit 33 Spindle motor

Claims (14)

[Claims] 1. A reproducing disk reproduces data recorded on a track of the disk from a rotating disk, and clock information recorded on the disk is extracted from an output of the reproducing head. In a clock signal generation device for generating a clock signal synchronized with, the extraction means for extracting the clock information from the output of the reproducing head, and the generation means for generating a clock signal synchronized with the clock information extracted by the extraction means. Moving means for moving the reproducing head in the radial direction of the disc, and the generating means generating the clock signal,
A clock signal generating device comprising: a swinging unit that controls the moving unit and swings the reproducing head in a radial direction of the disk. 2. The clock signal generator according to claim 1, wherein the moving means rotates the reproducing head in a radial direction of the disk about a predetermined axis. 3. The clock signal according to claim 1, wherein the extracting means extracts, as the clock information, a signal corresponding to a clock mark formed on the disk at equal intervals. Generator. 4. The clock signal generating device according to claim 2, wherein the moving means is a voice coil motor that moves the reproducing head in a radial direction of the disk during a seek operation. 5. The clock signal generating device according to claim 4, wherein the oscillating means is a signal generating circuit which generates a repetitive signal having a predetermined cycle and supplies the repetitive signal to the voice coil motor. 6. The clock signal generator according to claim 5, wherein the repetitive signal generated by the signal generating circuit is a sine wave signal. 7. The signal generated by the signal generating circuit is a signal for slightly vibrating the reproducing head a plurality of times in the radial direction of the disk while the disk makes one rotation. 6. The clock signal generator according to item 6. 8. The clock signal according to claim 7, wherein the signal generated by the signal generating circuit is a signal which the reproducing head crosses a plurality of the tracks while the disk makes one rotation. Generator. 9. The clock signal generating device according to claim 8, wherein the number of the tracks is 10 or more. 10. The clock signal generating device according to claim 5, wherein the generating unit is a PLL circuit. 11. The clock signal generation device according to claim 10, further comprising a lock detection circuit that detects a lock state of the PLL circuit. 12. The clock according to claim 11, wherein the signal generating circuit generates the repetitive signal when the lock detecting circuit detects that the PLL circuit is in an unlocked state. Signal generator. 13. A tracking error signal is generated from a wobbled mark formed on the disc,
13. The clock signal generation device according to claim 4, further comprising a supply unit that supplies the voice coil motor. 14. A clock signal for reproducing data and a clock mark recorded on the disk from a rotating disk by a reproducing head, and for generating a clock signal in synchronization with the clock mark reproduced by the reproducing head. In the generating method, the synchronization state determining step of determining the synchronization state of the clock signal and the clock mark, and the reproduction if the clock signal is determined not to be in synchronization with the clock mark by the synchronization state determining step. In a swinging procedure of swinging the head in the radial direction of the disc, and in a state of swinging the reproducing head by the swinging procedure,
And a clock synchronization procedure for generating the clock signal in synchronization with the clock mark reproduced from the disc.