JPH07244809A - Disk device - Google Patents

Abstract

PURPOSE:To obtain normal phase characteristics by compensating the output reduction at the high-frequency region of a read signal based on the characteristic failure of a medium. CONSTITUTION:A read circuit system is provided with an AGC circuit 4, an electric filter 5 for changing filter characteristics by setting a cut-off frequency and a boost value arbitrarily and for equalizing the waveform of a read signal output from the AGC circuit 4, and a level detection circuit 6 for detecting the level of the read signal output from the electric filter 5. The detection value detected by the level detection circuit is fed back as an AGC control signal and at the same time a signal through a bad-pass filter 25 out of the AGC control signals output from the level detection circuit is sent to the electric filter 5 and is added to a boost value Fb.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a magnetic disk device used as an external storage device of a computer system, for example.

In particular, in the present invention, the output from the head is A
In a magnetic disk device in which a gain is adjusted through a GC circuit and an electric filter, a decrease in output of a read signal (read data) at a high frequency due to a medium defect is corrected.

[0003]

2. Description of the Related Art FIG. 11 is an explanatory diagram of a conventional example, FIG. A is a block diagram of a read circuit system, and FIG. B is a frequency characteristic diagram when a medium is defective.

In FIG. 11, 3 is a head IC, 4 is an AGC circuit, 5 is an electric filter, 6 is a level detection circuit, 7 is a digital / analog converter (hereinafter referred to as "DA").
C)), 8 is a filter circuit, and 9 is a boost-up circuit.

§1: Description of magnetic disk device ... See FIG. 11A. Conventionally, for example, a magnetic disk device has been used as an external storage device of a computer. In such a magnetic disk device, the configuration of the read circuit system (readout circuit system) is as illustrated.

That is, the read circuit system of the magnetic disk device is provided with an AGC circuit 4, an electric filter 5, a level detection circuit 6, a DAC 7, etc., and the electric filter 5 is composed of a filter circuit 8, a boost-up circuit 9, etc. It had been.

The level detection signal detected by the level detection circuit 6 is fed back to the AGC circuit 4 as an AGC control signal for performing automatic gain control of the AGC circuit 4.

The electric filter 5 is designed to change the filter characteristics by externally controlling the cutoff frequency and the boost value. In this case, the boost-up circuit 9 of the electric filter 5
Is set by the drive MPU (not shown).
A set value (boost value) of 7 is input, and the boost-up circuit 9 performs a boost-up operation for waveform equalization based on the value (boost value).

§2: Operation of the read circuit system The operation of the read circuit system of the magnetic disk device is as follows. The read signal (read data) output from the head IC 3 is subjected to automatic gain control by the AGC circuit 4,
The read signal has a constant amplitude. This is because the output of the head IC 3 varies depending on the variation of the heads, so that the output is constant regardless of which head is read.

The read signal output from the AGC circuit 4 is waveform-equalized by the electric filter 5 and level-detected by the level detection circuit 6. The level detection value (detection voltage) detected by the level detection circuit 6 is A
It is fed back to the AGC circuit 4 as a GC control signal, and the AGC circuit 4 performs automatic gain control by this AGC control signal.

In this case, in the electric filter 5, the boost-up circuit 9 performs boost-up control based on the set value of the DAC 7. However, this boost-up operation is a boost-up for waveform equalization with respect to a normal medium, and does not correct a medium defect.

The read signal output from the electric filter 5 is converted into a pulse train and demodulated. §3: Description of frequency characteristic ... See FIG. 11B. The frequency characteristic of the read circuit system is as shown in FIG. Note that this characteristic is the output characteristic of the AGC circuit 4.

In FIG. 11B, the horizontal axis represents the frequency of the read signal and the vertical axis represents the output of the AGC circuit 4. Also, a
The characteristics indicated by (1) are frequency characteristics at normal times (normal times), and the characteristics indicated by (b) are frequency characteristics when minute defects exist in the medium.

As is clear from the figure, when the medium has a minute defect portion, it is hardly affected in the low frequency region of the read signal, but the output is reduced in the high frequency region. However, this decrease in output is not corrected by the electric filter 5.

[0015]

SUMMARY OF THE INVENTION The above-mentioned conventional device has the following problems. The defective portion of the magnetic disk medium includes a defective portion where almost no output is obtained and a defective portion (small defective portion) where an output is obtained but the output is smaller than other portions. A defective portion for which no output is obtained is usually registered as a defective block, and that portion is not used alternately.

However, in the defective portion where the output is smaller than that of the other portion, it is general to determine whether or not the defect is caused by setting a certain slice level.

By tightening the slice level,
If even the one with a small output is registered as a defective portion, the capacity of the entire magnetic disk device becomes small. Therefore, in many cases, the defective portion with less output reduction is used as it is.

However, a defective portion accompanied with a reduction in output is likely to cause a read error due to a phase shift or the like, even if the degree thereof is minute. The cause is that the defect is mainly caused by the fact that the characteristics of the medium with respect to the frequency are deteriorated rather than the decrease in the output itself.

That is, the high frequency characteristics are poor, and as a result,
Since the medium is written at a high frequency, the output often appears to be decreasing. With respect to such a defective portion caused by a partial abnormality in the medium, the conventional AGC circuit and electric filter alone cannot perform the phase correction or the high-frequency gain correction.

The present invention solves such a conventional problem and corrects a decrease in read signal output at high frequencies due to defective characteristics of the medium so that a normal phase characteristic can always be obtained. With the goal.

[0021]

FIG. 1 is a diagram for explaining the principle of the present invention. In FIG. 1, the same parts as those in FIG. 12 are designated by the same reference numerals. Further, 25 is a bandpass filter (BPF),
Reference numeral 54 indicates an addition point in the electric filter 5.

In order to achieve the above object, the present invention includes a head IC (integrated circuit) 3 in a read circuit system of a disk device.
AGC circuit 4 which performs automatic gain control of a read signal (read data) output from the device and outputs a signal having a constant amplitude.
And, based on the control signal from the outside, the cutoff frequency,
And a boost value are arbitrarily set to change the filter characteristics to equalize the waveform of the read signal output from the AGC circuit 4, and the level of the read signal output from the electric filter 5. A level detection circuit 6 for detecting and a bandpass filter 25 are provided.

The detected value detected by the level detection circuit 6 is fed back as an AGC control signal for the AGC circuit 4, and the bandpass filter 25 outputs the AGC control signal output from the level detection circuit 6. , And passes only signals of a predetermined frequency in the high frequency band and sends them to the electric filter 5.

Then, in the electric filter 5,
At the addition point 54, the boost value F _b set in the DAC 7 and the signal passed through the bandpass filter 25 are added to form a boost-up control signal BU, and this boost-up control signal BU is sent to the boost-up circuit 9. Configured.

[0025]

The operation of the present invention based on the above construction will be described with reference to FIG. As described above, the read signal (read data) output from the head IC 3 is subjected to automatic gain control by the AGC circuit 4 and becomes a read signal with a constant amplitude. This read signal is waveform-equalized by the electric filter 5 and level-detected by the level detection circuit 6.

The detection value (detection voltage) detected by the level detection circuit 6 is fed back to the AGC circuit 4 as an AGC control signal. At this time, the bandpass filter 25 allows only a signal of a predetermined high frequency of the AGC control signal to pass therethrough, and has a set value of the DAC 7, that is, a boost value F _b set by a drive MPU (not shown). , And addition is performed at the addition point 54, and the boost up control signal BU is sent to the electric filter 5.

In the electric filter 5, the boost-up circuit 9 controls boost-up based on the boost-up control signal BU. That is, the electric filter 5 corrects the output reduction in the high frequency range due to the medium defect portion by increasing the boost-up amount of the boost-up circuit 9 in proportion to the value (voltage) of the AGC control signal.

In this way, even if there is a minute defect in the medium and the output drop in the high frequency band of the read signal occurs, the boost-up control of the electric filter 5 can correct the output drop. . as a result,
The phase shift of the read signal is corrected.

[0029]

Embodiments of the present invention will be described below with reference to the drawings. 2 to 10 are views showing an embodiment of the present invention. In FIGS. 2 to 10, the same parts as those in FIGS. 1 and 11 are designated by the same reference numerals. Further, 11 is a disk enclosure (hereinafter referred to as "DE"), 12 is a spindle motor,
13 is a voice coil motor (hereinafter referred to as "VCM"),
16 is a write compensation circuit, 17 is a pulse detection circuit, 18
Is a read / write control circuit, 19 is an analog / digital converter (hereinafter referred to as “ADC”), 20 and 21 are digital / analog converters (hereinafter referred to as “DAC”), 22 is a peak hold circuit, and 25 is a bandpass filter. , 27 is an actuator control circuit, 28 is a spindle motor control circuit, 30 is a ROM, 31 is a RAM, 3
2 is an MPU for interface control (MP for I / F control
U), 33 is a drive MPU, 34 is a ROM table, 35 is a setting value table, 38 is a magnetic disk (medium), 39 is a magnetic head, 41, 42 and 43 are secondary low-pass filters (secondary LPF), 44. Is a first-order low-pass filter (first-order LPF), 45 is a second-order high-pass filter (2
Next HPF), 46 is an attenuator, 47 is an adder, 50, 52
Is an amplifier, 51 and 54 are addition points, and 53 is a capacitor.

§1: Description of configuration of magnetic disk device--see FIG. 2 FIG. 2 is a block diagram of the magnetic disk device. The configuration of the magnetic disk device will be described below with reference to FIG.

The magnetic disk device of this embodiment is equipped with an AGC
Circuit 4, electric filter 5, level detection circuit 6, DE (disk enclosure) 11, write compensation circuit 16, pulse detection circuit 17, read / write control circuit 18, DAC 7, 20, 21, peak hold circuit 22, ADC 19, band Pass filter 25, actuator control circuit 27, spindle motor control circuit 28,
ROM30, RAM31, MP for interface control
U (I / F control MPU) 32, drive MPU 33
Etc.

The DE 11 has a head IC 3,
A spindle motor 12, a VCM 13, a magnetic disk (hereinafter also simply referred to as “medium”) 38, a magnetic head 39, etc. are provided.

In the above configuration, the AGC circuit 4, the electric filter 5, the level detection circuit 6, the pulse detection circuit 17, the DACs 7, 20, 21 and the like constitute a read circuit system (readout circuit system), and the write compensation circuit. 16
Constitutes a write circuit system (write circuit system). Functions and the like of the above-mentioned respective parts are as follows.

(1): DE11 has a spindle motor 1
A plurality of magnetic disks (medium) 3 which are rotationally driven by 2
8 are provided, and magnetic heads 39 are arranged on the recording surfaces of the plurality of magnetic disks 38, respectively.

Then, the VCM 13 moves the magnetic head 39 in the radial direction of the magnetic disk 38 via an actuator to position it at a target position, and the magnetic head 39 reads / writes data (information). Is configured.

In this case, one of the recording surfaces of the plurality of magnetic disks 38 is used as a servo information surface on which servo information is recorded, and the other recording surface is a data recording surface. .

The head IC 3 is the magnetic head 3
9 is connected to drive the magnetic head 39 to read / write data. And at the time of lead,
The read signal (read data) read by the magnetic head 39 is output from the head IC 3 to the AGC circuit 4.

Of the magnetic disk 38, for example, the circuit characteristics of the read circuit system and the write circuit system are optimized for the corresponding combination of the magnetic disk 38 and the magnetic head 39 in the innermost cylinder having the lowest peripheral speed. The parameter setting value to be written is written (for example, the parameter setting value is written with the innermost cylinder as the adjustment cylinder).

That is, as the information regarding the circuit parameters (parameter setting values), the same information is written for each disk surface in the cylinder. The circuit parameter set value to be written on the magnetic disk is, for example, a set value that determines the filter characteristic of the electric filter 5, a detection level voltage (slice level) of the pulse detection circuit 17, or the like.

(2): The AGC circuit 4 receives the read signal (read data) from the head IC 3 and performs automatic gain control, and outputs a read signal of constant amplitude. In this case, the AG fed back from the level detection circuit 6
Automatic gain control is performed using the C control signal as the control voltage of the AGC circuit 4.

(3): The electric filter 5 is an AG
The read signal output from the C circuit 4 is input to perform waveform equalization of the read signal. In this case, the electric filter 5 is configured so that the cutoff frequency F _c and the boost value F _b can be freely controlled by a control signal from the outside (details will be described later).

(4): The level detection circuit 6 detects the level (voltage level) of the read signal output from the electric filter 5. Then, the detection signal (voltage signal) detected by this circuit is fed back to the AGC circuit 4 as an AGC control signal.

(5): The pulse detection circuit 17 creates a pulse train from the read signal waveform-equalized by the electric filter 5. In this case, the pulse detection circuit 1
In 7, a pulse train is created by slicing the read signal according to the detection level voltage (slice level) set by the drive MPU 33 via the DAC 21.

(6): The write compensation circuit 16 performs write compensation (compensation of write current) when writing data. (7): The read / write control circuit 18 is a drive MP
Data read / write processing is performed according to the instruction of U33.

For example, at the time of reading, the pulse detection circuit 1
The pulse (pulse train) detected in 7 is input, and the read data demodulation processing and the like are performed. In addition, at the time of writing, write data format processing, etc.
The data is sent to the head IC 3 via the write compensation circuit 16.

(8): The bandpass filter 25 is fed back from the level detection circuit 6 to the AGC circuit A.
Among the GC control signals, only a signal of a predetermined frequency (high frequency component) is passed and sent to the electric filter 5. This signal is added to the boost value F _b from the DAC 7 and sent to the electric filter 5.

(9): The DAC 7 is the drive MPU 33.
Sets the boost value F _b to be sent to the electric filter 5. This boost value F _b is added to the signal that has passed through the band pass filter 25 and sent to the electric filter 5.

(10): The DAC 20 is the drive MPU 3
3 sets the cutoff frequency F _c to be sent to the electric filter 5. (11): The DAC 21 sets the detection level voltage (slice level) sent from the drive MPU 33 to the pulse detection circuit 17.

(12): The ADC 19 converts the analog signal from the peak hold circuit 22 into a digital signal. (13): The peak hold circuit 22 inputs the read signal (servo information signal) from the servo head obtained by the AGC circuit 4 and performs peak hold.

The peak-held signal is
After being converted into a digital signal by the ADC 19, it is demodulated by a predetermined circuit (not shown) to take out servo information.

(14): The actuator control circuit 27 controls the VCM 13 according to an instruction from the drive MPU 33. Then, the VCM 13 moves the magnetic head 39 in the radial direction of the magnetic disk 38 via the actuator to position it at the target position.

(15): The spindle motor control circuit 28
The rotation of the spindle motor 12 is controlled by an instruction from the drive MPU 33. (16): The drive MPU 33 is a processor that controls the entire magnetic disk device. MPU for this drive
In 33, for example, when the power is turned on, the set values of the circuit parameters previously recorded on the magnetic disk are read out, and R
Using the data in the ROM table 34 in the OM 30,
The setting value table 35 is created in the RAM 31. Then, the drive MPU 33 uses the created setting value table 35 to control read / write.

(17): MPU 32 for interface control
Is a processor that controls the interface with a higher-level device (for example, a host computer). For example, when a higher-level device issues a command, the interface control MPU 32 receives the command and analyzes its content. Then, the command is sent to the drive MPU 33.

When the drive MPU 33 completes the execution of the command, it sends an end report to the host device. The command end report is sent to the host device via the interface control MPU 32.

(18): The ROM 30 is the drive MPU 3
3 is a non-volatile memory connected to the bus. This RO
The program executed by the drive MPU 33 is stored in M30.

A ROM table 34 is set in advance in the ROM 30, and the drive MPU 33 is the RO table.
The data in the M table 34 is read out for control. (19): The RAM 31 is a volatile memory connected to the bus of the drive MPU 33. In this RAM31,
The drive MPU 33 creates the set value table 35 when the power is turned on.

§2: Description of Operation of Magnetic Disk Device The operation of the magnetic disk device is as follows. When the magnetic disk device is powered on, the drive MPU3
According to the instruction of 3, the spindle motor control circuit 28 activates the spindle motor 12 and controls the rotation.

After that, the drive MPU 33 has a RAM
A set value table 35 is created in 31 (details of this processing will be described later). After that, the drive MPU 33 is the RAM 3
The setting value table 35 created in 1 is read out for control.

Then, when the host device issues a command, this command causes the interface control MPU 3 to
2 receives, analyzes the command, and sends the command to the drive MPU 33.

In the drive MPU 33, based on the head number and cylinder number designated by the above command, the RAM
The setting value table 35 in 31 is referred to, and the corresponding setting value is read.

In this case, if the command is a read command, the drive MPU 33 sends the set values (filter constants F _c , F _b ) for the electric filter 5 read from the set value table 35 to the DAC 7 and the DAC 20. Set.

At this time, the drive MPU 33 is
The detection level voltage (slice level) of the pulse detection circuit is set in the DAC 21. As a result, the electric filter 5 is set with optimum filter characteristics corresponding to the designated magnetic head and cylinder position, and
An optimum pulse detection level is set in the pulse detection circuit 17.

On the other hand, the drive MPU 33 issues an instruction to the actuator control circuit 27 to drive the VCM 13 and seek the magnetic head 39 to the target track. Then, when the seek to the target track is completed, data read / write to the magnetic disk 38 is executed.

For example, at the time of reading, the signal read by the magnetic head 39 is sent from the head IC 3 to the AGC circuit 4, where it is converted into a read signal having a constant amplitude, and the electric filter 5 performs waveform equalization.

At this time, the read signal (read data) waveform-equalized by the electric filter 5 is converted into a pulse train by the pulse detection circuit 17 and sent to the read / write control circuit 18 for demodulation.

The level detection circuit 6 detects the voltage level of the read signal waveform-equalized by the electric filter 5 and feeds back the detected voltage level to the AGC circuit 4 as an AGC control signal. The AGC circuit 4 performs automatic gain control using the fed-back AGC control signal.

Further, the bandpass filter 25 allows only a predetermined frequency (high frequency component) of the AGC control signal fed back from the level detection circuit 6 to the AGC circuit 4 to pass therethrough, and the boost value F of the electric filter 5 is passed.
_It is added to _b (the value of the DAC 7 set by the drive MPU 33).

As a result, the electric filter 5 corrects the output decrease of the high frequency component of the read signal and outputs the read signal of a normal waveform to the pulse detection circuit 17 when the minute defective portion of the medium is read.

§3: Description of electric filter
-See Fig. 3 and Fig. 4. Fig. 3 is a configuration diagram of the electric filter, and Fig. 4 is a frequency characteristic diagram of the electric filter. Below, FIG.
The electric filter will be described with reference to FIG.

The electric filter 5 shown in FIG. 2 can change the filter characteristics by arbitrarily setting the cutoff frequency (cutoff frequency) F _c and the boost value F _b by a control signal from the outside. Is.

The electric filter 5 shown in FIG. 3A is a second-order low-pass filter (second-order LPF) 41, 4.
2, 43, 2nd-order high-pass filter (2nd-order HPF) 45,
First-order low-pass filter (first-order LPF) 44, adder 4
7, an attenuator 46 and the like.

Then, the secondary low-pass filter 41,
42, 43, the secondary high-pass filter 45, the primary low-pass filter 44, etc. constitute a filter circuit, and the attenuator 46
Form a boost-up circuit. In this case, K of the attenuator 46 is a damping constant, and the boost-up amount can be changed by changing the value of the damping constant K.

The transfer function of each filter can be expressed as follows. Secondary LPF 41 = a ₀ / (S ² + a ₁ + a ₀ ) Secondary HPF 45 = S ² / (S ² + a ₁ S + a ₀ ) Secondary LPF 42 = b ₀ / (S ² + b ₁ S + a ₀ ) Secondary LPF 43 = c ₀ / (S ² + c ₁ S + a ₀ ) First-order LPF 44 = d ₀ / (S + d ₀ ) However, S = jΩ = jω / ω _c Therefore, the transfer function T of the electric filter 5 is as follows. However, V _IN is an input voltage and V _OUT is an output voltage.

T = V_OUT/ V_IN = {A₀b₀c₀d₀(1-GS)} / {(S²+ A₁
S + a₀) (S²+ B ₁S + a₀) (S²+ C₁S + a
₀) (S + d₀)} FIG. 4 shows a specific filter of the electric filter 5.
This is an example of the filter characteristics. In FIG. 4, the vertical axis represents the gain
(DB), the horizontal axis is frequency (MH_Z).

The characteristic indicated by Q1 is the cutoff frequency F
_c = 11.09MH _Z, boost value F _b = 10.75d
It is a characteristic of the electric filter 5 when B is set. Further, the characteristic indicated by Q2 is that the boost value F _b = 0d
It is a characteristic of the electric filter 5 when B is set.

[0076] Here, the definition of the boost value F _b which determines the high frequency emphasis characteristic of the electric filter 5, the characteristic Q2 when the boost value F _b = 0 dB, gain,
From the P1 point of the cutoff frequency F _c that is 3 dB down,
It shows how much the P2 point of the characteristic Q1 has gained up.

In the electric filter 5, the second order
Low-pass filters (second-order LPF) 41, 42, 43, 2
High-pass filter (second-order HPF) 45, first-order low-pass
By controlling the gain of the filter (first-order LPF) 44
Cutoff frequency F_cTo control. Also, the attenuator 4
By controlling the damping constant K of 6, the boost value F _b
To control.

For example, the final-stage first-order low-pass filter 4
For example, as shown in FIG. 3B, the first-order low-pass filter 44 includes an amplifier 50, a capacitor 53, an addition point 51, and an amplifier 52.

Here, the transfer function of the primary low-pass filter 44 is ω ₀ / (S +) as shown in FIG. 3C.
ω ₀ ). When the capacitance of the capacitor 53 is C, ω ₀ is ω ₀ = G / C, and ω ₀ = 2πfC
Therefore, the cutoff frequency f _c of this filter is
f _c = G / 2πC.

Therefore, the cutoff frequency f _c of the primary low-pass filter 44 can be adjusted by changing the gains of the amplifiers 50 and 52. In this way, the cutoff frequency F _c of the electric filter 5 as a whole can be controlled by adjusting the gain G.

On the other hand, as described above, the boost value F _b can be adjusted by changing the attenuation constant K of the attenuator 46. §4: Description of processing of magnetic disk device by flowchart--see FIG. 5 FIG. 5 is a flowchart of processing of the magnetic disk device.
The processing of the magnetic disk device will be described below with reference to FIG. Note that S1 to S6 indicate processing steps.

When the magnetic disk device is powered on,
The drive MPU 33 has a spindle motor control circuit 2
8, the spindle motor control circuit 28 activates the spindle motor 12 to perform rotation control (S
1).

Then, the drive MPU 33 monitors whether or not the rotation of the spindle motor 12 has reached the steady rotation (S2). When the rotation of the spindle motor 12 reaches the steady rotation, the set value is stored in the RAM 31. The table 35 is created (S3).

Next, when the host device issues a command,
The interface control MPU 32 receives this command, analyzes the command, and sends the command to the drive MPU 33.

In this way, when the drive MPU 33 receives the command (S4), the drive MPU 33
U33 is a set value table 3 in the RAM 31 based on the head number and the cylinder number designated by the command.
5, the corresponding set value is read.

If the received command is a read command, the drive MPU 33 sets the set value in the electric filter 5 and the pulse detection circuit 17 (S5).

In this case, setting of the set value for the electric filter 5 is performed by setting the DAC 7 and the DAC 2
Through 0. The setting of the set value for the pulse detection circuit 17 is performed via the DAC 21. By setting the set values, it becomes possible to control the optimum filter characteristic and detection level corresponding to the magnetic head and cylinder position specified by the command.

At the same time as setting the set values for the electric filter 5 and the pulse detection circuit 17, the actuator control circuit 27 controls the VCM 13 according to the instruction of the drive MPU 33 to cause the magnetic head 39 to move to the purpose of the magnetic disk 38. Seek to the track.

When the magnetic head 39 reaches the target track, the circuit parameters of the electric filter 5 and the pulse detection circuit 17 have already been set to the optimum values.

After that, read / write is executed under the control of the drive MPU 33 (S6). Then, the process returns to the process of S4 again, and the series of processes is repeated. §5: Example of table data and outline of its creation process
.. FIG. 6 is an example of table data, FIG. 6A is an example of a ROM table, and FIG. 6B is an example of a set value table in RAM.

To create the set value table 35 in the RAM 31, the information (parameter set values for optimizing the circuit characteristics of the read circuit system and the write circuit system) written in advance on the magnetic disk is read out. Create,
At this time, the data is read from the ROM table 34 in the ROM 30 and used.

In this case, the ROM table 34 stores data numbers, filter constants,
Each data of the detection level voltage is stored. That is, in the ROM table 34, for each data number 0 to M,
As the filter constants of the electric filter 5, the cutoff frequencies F _c 0 to F _c M and the boost values F _b 0 to F are used.
_b M is stored, and similarly, the pulse detection circuit 17
It stores the detection level voltages V0 to VM used in.

The set values stored in the ROM table 34 are set values obtained by a conventional statistical method.
Since there is a possibility that one type of set value cannot be read, a plurality of types of set values of statistically obtained data numbers 0 to M are stored. To control.

If the data cannot be read, the set value of the next data number is controlled and the retry is performed. By the way, as the information on the circuit parameter (circuit parameter setting value), the same information is written for each disk surface in the adjustment cylinder (for example, the innermost cylinder). Even if the reading of the information about the circuit parameter fails by the designation, the reading can be surely performed by sequentially switching to the next head number and retrying.

Therefore, even if the setting values obtained by the statistical method of the ROM table 34 are used, the setting values of the optimum circuit parameters can be obtained by using some setting values.
In this way, the information about the circuit parameters recorded in advance on the magnetic disk is read and the set value table 35 is created in the RAM (this creating method will be described later).

Here, even when the circuit parameters are controlled to the values in the ROM table 34, the magnetic disk 3
It is desirable to set the medium recording density of the circuit parameter to a low value in order to ensure the reading of the information on the circuit parameter that is recorded in advance. Specifically, the transfer speed of the medium writing magnetic disk device is set low.

Further, it is desirable to record the information on the circuit parameters on the magnetic disk 38 on the inner circumference having a low peripheral speed (for example, on the innermost cylinder).

As the set value table 35 created in the RAM 31, for example, as shown in FIG. B, the head number, cylinder number, filter constants (F _c , F _b ),
It is a table including items of detection level voltage. This set value table 35 is an example in which the set values of the circuit parameters are recorded by dividing the inner circumference cylinder to the outer circumference cylinder of the magnetic disk 38 into three zones.

Therefore, the cylinder numbers 0 to 500 and 501 to the head numbers in the created set value table 35 are set.
The cutoff frequency F _c [M is divided into three zones of 1000 and 1001 to 1500 as a filter constant.
H _Z ], boost value F _b [dB], and detection level voltage are stored.

Of course, as the filter constants stored in the set value table 35, the cutoff frequency F _c and the boost value F _b are not stored as they are, but actually, these cutoff frequencies F _c are not stored. , And a boost value F _b , data such as the attenuation constant K of the attenuator for the electric filter 5 and the voltage that determines the frequency characteristic of each filter are stored. Hereinafter, a method of creating the set value table 35 will be described in detail.

§6: Description of Setting Value Table Creation Process by Flowchart--See FIG. 7 FIG. 7 is a flowchart of the setting value table creation process. Hereinafter, the process of creating the set value table 35 in the RAM 31 will be described with reference to FIG. Note that S11
S23 show each processing step.

When the set value table is created in the RAM 31, the drive MPU 33 controls the seek of the magnetic head 39 to the adjustment cylinder (for example, the innermost cylinder) in which the information about the circuit parameter is stored. Yes (S11).

Then, the head address is set to 0 (S12), and the first magnetic head 0 is selected. continue,
The data number N = 0 of the ROM table 34 is set (S1
3), the setting value is read by referring to the N = 0th data in the ROM table 34 (S14).

After that, the set value is set in the electric filter 5 so that the cutoff frequency F _c 0 read from the N = 0th of the ROM table 34 and the boost value F _b 0 are set (S15), and the filter characteristic is set. Control.

Next, the N = 0th detection level voltage of the ROM table 34 is read out and set in the pulse detection circuit 17 to control the pulse detection level (S16). S16
After the processing of (1) is completed, the magnetic head having the head address 0 executes the data read of the information on the circuit parameter written at the position of the adjusting cylinder (for example, the innermost cylinder) (S17).

After the processing of S17 is completed, it is checked whether or not the information on the circuit parameter can be read (S18). If the information can be read, the information on the read circuit parameter is stored in the set value table 35 prepared in the RAM 31. Yes (S19).

After that, it is judged whether or not it is the final head address (S20), and if it is not the final head, the head address is incremented (S23), and the process returns to the process of S13 again. The same process is performed.

On the other hand, in the process of S18, if the information regarding the parameter cannot be read normally, the data number N of the ROM table 34 is incremented by 1 (N = N +).
1) Do (S21).

Then, it is judged whether or not it is the final number (N = M?) (S22), and if it is not the final number, the process returns to S14 and the same process as described above is performed. However, if it is the final number, the head address is incremented (+1)
Then, the process again returns to S13, and the same process as described above is performed on the incremented head address.

In the process of S18, the data number N is incremented until the information about the parameter can be read, and the reading of the information about the circuit parameter is retried using different filter constants and pulse detection levels.

If the data could not be read even with the final data number M, the process returns to S23, the head address is incremented by 1, the process returns to S13, and the state is switched to the next head. Then, the retry using the data from the first ROM table 34 is started again.

By repeating the above processing, S20
When it is confirmed that the processing has been completed for all the head addresses in the processing of 1, the setting value table creation processing is ended. §7: Description of operation of read circuit system--see FIG. 8 FIG. 8 is a partial detailed view of FIG. The operation of the read circuit system of the magnetic disk device will be described below with reference to FIG.

As described above, the read signal (read data) output from the head IC 3 is subjected to automatic gain control by the AGC circuit 4 and becomes a read signal with a constant amplitude. This read signal is waveform-equalized by the electric filter 5 and level-detected by the level detection circuit 6.

Then, the level detection value (detection voltage) detected by the level detection circuit 6 is A as an AGC control signal.
It is fed back to the GC circuit 4. At this time, the band pass filter 25 passes only the signal of a predetermined frequency (high frequency component) of the AGC control signal, and adds it to the set value of the DAC 7, that is, the boost value F _b set by the drive MPU 33. The addition is made at the point 54, and it is sent to the electric filter 5 as a boost-up control signal BU.

The electric filter 5 controls the value of the attenuation constant K of the attenuator 46 based on the boost-up control signal BU to control the boost value F _b . That is, the electric filter 5 corrects the output decrease in the high range due to the medium defect portion by increasing the boost-up amount of the boost-up circuit in proportion to the value (voltage) of the AGC control signal.

For example, since the output drop in the high frequency range of the read signal is small at normal times, the boost-up amount by the electric filter 5 becomes small. However, if the medium has minute defects, the output of the read signal in the high frequency range is significantly reduced.

As a result, the AGC control signal changes, the boost-up amount in the electric filter 5 increases, and the output drop in the high range of the read signal is sufficiently corrected.
At this time, the drive MPU 33 sets the cutoff frequency F _c in the DAC 20, so that the electric filter 5 controls the cutoff frequency F _c based on the set value of the DAC 20.

As described above, when the output of the read signal is reduced due to the minute defect portion of the medium, the electric filter 5 increases the boost-up amount to sufficiently correct the output reduction in the high frequency range.

Therefore, the read signal output from the electric filter 5 is supplied to the pulse detection circuit 1 shown in FIG.
When the pulse train is created by inputting to 7, the phase shift hardly occurs. That is, the phase shift of the read signal can be sufficiently corrected.

§8: Description of Output Reduction by Waveform Diagram of Read Signal--See FIG. 9 FIG. 9 is an explanatory diagram of an output reduction unit by a waveform diagram of a read signal. In FIG. 9, A is a normal medium, B is a read signal waveform in a high frequency region, C is a read signal waveform in a low frequency region, D is a medium minute defect portion, and E is a medium minute defect portion. In the case of the read signal waveform in the high frequency region, FIG. F shows the read signal waveform in the low frequency region in the case where the medium minute defect portion exists. In each drawing, the read signal is a signal output from the AGC circuit 4 to the electric filter 5.

As shown in FIG. A, when the medium has no defect and is normal, the waveform of the read signal output from the AGC circuit 4 to the electric filter 5 is as shown in FIG. B in the high frequency region. Waveform (dotted line in the figure is the recording waveform of the medium, solid line is the read signal waveform) and is C in the low frequency region.
The waveform is as shown in the figure (the dotted line in the figure is the recording waveform of the medium, and the solid line is the read signal waveform).

Further, as shown in FIG. D, the read signal waveform in the case where the medium has minute defects exists in the high frequency region, as shown in FIG. E, the output decreases due to the influence of the minute defects of the medium. Although a portion is generated, in the low frequency region, it is almost unaffected by the minute defect portion of the medium, as shown in FIG. F, and is almost the same as the waveform shown in FIG.

That is, if the medium has minute defects,
The output lowering part occurs in the high frequency region of the read signal (the output lowering in the high frequency region occurs). However, the read signal in the low frequency region is hardly affected by the minute defect portion.

§9: Explanation of phase shift based on waveform diagram of read signal ... See FIG. 10. FIG. 10 is an explanatory diagram of phase shift based on waveform diagram of read signal. For comparison, FIG. 10 also shows a read signal waveform by the conventional circuit.

In FIG. 10, FIG. 10A shows the waveform of the read signal output from the AGC circuit 4 in the case of a normal medium, and FIG.
The figure shows the waveform of the read signal output from the AGC circuit 4 when there is a small defect in the medium, the figure C shows the corrected waveform by the conventional circuit, the figure D shows the corrected waveform by the circuit of this embodiment, and the figure E shows the read under normal conditions Signals (pulse trains), F diagrams show read signals (pulse trains) by a conventional circuit, G diagrams show read signals (pulse trains) in a normal state, and H diagrams show read signals (pulse trains) when the circuit of this embodiment is used.

It is assumed that the waveform of the read signal when the medium does not have a minute defect portion is, for example, the waveform shown in FIG. However, if the medium has a minute defect, as shown in FIG.

Therefore, the read signal having the output lowering portion shown in FIG. 9B is corrected by the electric filter 5. In this case, when corrected by the conventional circuit, the waveform of the read signal as shown in FIG. Become. However, when the read signal having the output lowering portion shown in FIG. 7B is corrected by the electric filter 5 of the present embodiment, the read signal waveform shown in FIG.

That is, in the conventional circuit, the boost-up circuit performs boost-up based on the value (boost value F _b ) set in the DAC 7, but since this boost-up is for waveform equalization, The amount of correction due to the boost-up is small.

On the other hand, in the electric filter 5 according to the present embodiment, the value obtained by adding the value from the bandpass filter 25 to the value of the DAC 7 (boost value F _b ) set by the drive MPU 33 is used to boost up. There is. Therefore, the boost-up amount in the output lowering section becomes larger than that of the read signal corrected by the circuit of the conventional example, and the read signal has a waveform as shown in FIG.

According to the circuit of the conventional example, when the pulse detection circuit 17 is supplied with the read signal having the waveform shown in FIG. C to create a pulse train, as shown in FIG. It becomes a signal (pulse train).

However, according to the present embodiment, when the pulse signal is created by inputting the read signal shown in FIG. 7D to the pulse detection circuit 17, as shown in FIG. Pulse train).

That is, with the electric filter 5 of the present embodiment, with respect to the output reduction in the high frequency range of the read signal,
With sufficient correction, the phase shift becomes extremely small when the read signal output from the electric filter 5 is pulsed, even if the medium has minute defects.

(Other Embodiments) The embodiments have been described above, but the present invention can also be implemented as follows. (1): The band-pass filter can be replaced with a high-pass filter that passes a signal having a predetermined frequency or higher.

(2): Not limited to the magnetic disk device, it can be similarly applied to other similar disk devices.

[0135]

As described above, the present invention has the following effects. (1): In the magnetic disk device which adjusts the output from the head through the AGC circuit and the electric filter, sends only the signal of the predetermined frequency (high frequency component) of the AGC control signal to the electric filter and adds it to the boost-up value. By doing so, it is possible to sufficiently correct the output drop in the high range of the read signal (read data) due to the medium defect.

(2): As described above, when the output of the read signal is reduced due to the minute defect portion of the medium, the electric filter increases the boost-up amount to sufficiently correct the output reduction in the high frequency range.

Therefore, when the read signal output from the electric filter is input to the pulse detection circuit to create the pulse train, the phase shift hardly occurs. That is, the phase shift of the read signal is sufficiently corrected, and normal phase characteristics can always be obtained.

(3): The defective portion of the medium accompanied by a decrease in output is
Even if the degree is small, there is a high possibility that a read error will occur due to causes such as phase shift. The cause is
It is mainly due to the fact that the characteristics of the medium with respect to frequency are partially deteriorated, rather than mainly because the output itself is reduced.

That is, the high frequency characteristics are poor, and as a result,
Since the medium is written at a high frequency, the output often appears to be decreasing. According to the present invention, the phase correction and the high-frequency gain correction can be sufficiently performed on the defective portion due to the partial characteristic abnormality of the medium, particularly by the electric filter.

(4): In the small defect portion of the medium, the output is lowered in the high frequency band of the read signal. If a pulse train is created without correcting this output reduction, there is a high possibility that a phase shift will occur and a read error will occur.

However, in the present invention, the output reduction in this high frequency band is sufficiently corrected by the electric filter to reduce the occurrence of phase shift. As a result, there is almost no possibility of causing a read error.

Further, by doing so, it is possible to reduce the number of defective media registered as defective portions and prevent the overall capacity of the media from decreasing.

[Brief description of drawings]

FIG. 1 is a diagram illustrating the principle of the present invention.

FIG. 2 is a block diagram of a magnetic disk device according to an embodiment.

FIG. 3 is a configuration diagram of an electric filter according to an embodiment.

FIG. 4 is a frequency characteristic diagram of the electric filter in the example.

FIG. 5 is a processing flowchart of the magnetic disk device in the embodiment.

FIG. 6 is an example of table data in the embodiment.

FIG. 7 is a flowchart of a setting value table creation process in the embodiment.

FIG. 8 is a partial detailed view of FIG.

FIG. 9 is an explanatory diagram of an output reduction unit according to the embodiment.

FIG. 10 is an explanatory diagram of a phase shift in the example.

FIG. 11 is an explanatory diagram of a conventional example.

[Explanation of symbols]

 3 head IC (integrated circuit) 4 AGC circuit (automatic gain control circuit) 5 electric filter 6 level detection circuit 7 digital / analog converter (DAC) 8 filter circuit 9 boost-up circuit 25 band pass filter (BPF) 54 addition point

Claims (2)

[Claims] 1. A read circuit system for processing a read signal when information is read from a medium, an AGC circuit (4) for automatically controlling the gain of the read signal and outputting a signal of a constant amplitude, and The cutoff frequency (F _c ) and the boost value (F _b ) are arbitrarily set based on the control signal of
An electric filter (5) for equalizing the waveform of the read signal output from the AGC circuit (4) and a level detection of the read signal output from the electric filter (5) are performed by changing the filter characteristics. A level detection circuit (6), wherein the detected value detected by the level detection circuit is fed back as an AGC control signal for performing automatic gain control of the AGC circuit, wherein the level detection circuit (6) Among the AGC control signals output from the AGC control signal, only a signal having a predetermined frequency is passed, is sent to the electric filter (5), and is added to the boost value ( _Fb ). apparatus. 2. The disk device according to claim 1, wherein the filter means is a bandpass filter (25).