JPH0723590A - Amplifier circuit - Google Patents

Abstract

PURPOSE:To suppress switching loss by driving two FET elements in an H-type output amplifier circuits based on the logical product of outputs from a PWM circuit and a voltage comparator thereby conducting two FET elements on a diagonal out of four FET elements in the H-type output amplifier circuit. CONSTITUTION:Any one of FETs 20, 21 is interrupted or conducting. When the FET 20 is conducting, for example, a FET 19 on a diagonal is driven by the output from a PWM modulator 12. Upon polarity inversion of an input 11, FET 18 or 21 on the reverse side is driven. Consequently, only one of the FETs 20, 21 is conducted and only one of the FETs 18, 19 is switched.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an amplifier circuit for driving a motor or the like.

[0002]

2. Description of the Related Art Four F's are provided as a circuit for driving a motor or the like.
An amplifier circuit in which an ET element is arranged in an H shape is known. This circuit conducts the FET elements that are normally located on the diagonal line to drive the load. However, in order to continuously control the output amount, the FET element cannot be controlled simply by making it conductive. As a method of controlling the output, the conventional method shown in FIG.
There is an example as shown in FIG. In FIG. 2, 1 is an input terminal, 2 is a pulse width modulator for converting an input voltage into a pulse width proportional to the input, 4 is a power supply line, 5 is a sign inverter, 7
Are amplifiers 8 and 9 are switching FET elements, and 10
Is the load. In this circuit, each element of the H-shaped circuit composed of four switching FET elements 8 and 9 simultaneously controls the output by driving with a pulse width proportional to the input voltage. In the conventional example shown in FIG. 3, the same parts as those in FIG. 2 are designated by the same reference numerals. 3 is a voltage comparator for determining the polarity of the input voltage, 11
Is an FET element for voltage control. In FIG. 3, 4
The power supply voltage of the H-shaped circuit composed of the individual FET elements 8 and 9 is controlled by the signal supplied to the voltage control FET element 11. Therefore, as a result, the output is controlled with a pulse width proportional to the input voltage applied to the input terminal 1. However, FIGS. 2 and 3 have the following problems. In the circuit example of FIG. 2, since all four FET elements are switching, a switching loss of four is generated. Usually, the switching loss is much larger than the direct current loss that causes the element to conduct, and the loss is very large. Further, since four switching is performed simultaneously, it is necessary to provide a preventive circuit (not shown) for preventing simultaneous conduction of series elements at the time of switching, which makes the circuit extremely complicated. In the circuit example of FIG. 3, the FE that controls the power supply voltage supplied to the H-shaped circuit
There is a drawback that the T element 11 and the like are additionally required and the loss of the circuit element is increased.

[0003]

DISCLOSURE OF THE INVENTION The present invention is directed to a conventional circuit example in which a large switching loss as shown in FIGS.
It is to eliminate the drawbacks that require extra elements.

[0004]

In order to solve the above problems, the present invention drives a load, a pulse width modulator that outputs a pulse width proportional to an input voltage, a voltage comparator that determines the polarity of the input voltage, and a load. It consists of an H-type output amplifier circuit composed of four FET elements that
Driving one FET element of the output amplifier circuit,
The FET element paired with the T element is driven by the inverted output of the voltage comparator, and by the AND output of the output of the pulse width modulation circuit and the output of the voltage comparator, the remaining two of the H-shaped output amplifier circuit are It is configured to drive two FET elements, whereby four FEs of the above H-shaped output amplifier circuit are provided.
In the T element, two FET elements on the target line are electrically connected to each other.

[0005]

As a result of the above, the switching loss is opposite to the FE
Either one of T and one of the other FETs facing each other has a smaller static loss than the circuit shown in FIG. Further, since no extra element such as the voltage control FET 11 as in the circuit shown in FIG. 3 is required, low loss and a simple circuit can be realized.

[0006]

1 is a block diagram showing the configuration of an embodiment of the present invention. In FIG. 1, 11 is an input terminal, 12 is a pulse width modulator that converts the input voltage into a pulse width proportional to the input, 13 is a voltage comparator that determines the polarity of the input voltage, 14
Is a power supply line, 15 is a sign inverter, and 16 and 17 are AND
Circuits, 18, 19, 20, and 21 are FETs, and 22 is a load. In FIG. 1, either of the FETs 20 and 21 is cut off or conducted. Now, assuming that the FET 20 is conducting, for example, the FET 19 on the diagonal line to the FET 20 is driven by the output of the pulse width modulator 12. When the polarity of the input 11 is reversed, the FETs 18 and 21 on the opposite sides are driven. As a result, it is the FET 20 that operates.
Only one of the two is conductive, and FET18
Only one of the two and 19 is switched.

[0007]

According to the present invention, it is possible to realize an H-type output amplifier circuit which has a simple circuit with little switching loss and whose output power can be varied.

[Brief description of drawings]

FIG. 1 is a block diagram showing an embodiment of the present invention.

FIG. 2 is a block diagram showing an example of a conventional circuit system.

FIG. 3 is a block diagram showing an example of a conventional circuit system.

[Explanation of symbols]

 11 Input Terminal 12 Pulse Width Modulator 13 Voltage Comparator 15 Sign Inverter 16,17 AND Circuit 18, 19, 20, 21 FET 22 Load

Claims (1)

[Claims] 1. An H comprising a pulse width modulator that outputs a pulse width proportional to an input voltage, a voltage comparator that determines the polarity of the input voltage, and four FET elements that drive a load.
The output of the voltage comparator drives one FET element of the H-type output amplifier circuit, and
The FET element paired with the ET element is driven by the inverted output of the voltage comparator, and by the AND output of the output of the pulse width modulation circuit and the output of the voltage comparator, the remaining two of the H-shaped output amplifier circuit are It is configured to drive two FET elements, whereby four FEs of the above H-shaped output amplifier circuit are provided.
An amplifier characterized in that, among T-elements, two FET elements on the target line are electrically connected to each other.