JPH0723049A - Communication terminal equipment - Google Patents

Abstract

PURPOSE:To obtain the communication equipment which can detect a fact that a fault is generated in a receiving terminal RX. CONSTITUTION:This equipment is provided with a differentiating circuit 30 for detecting a variation of a signal inputted from a receiving terminal RX, and a counter 32 for monitoring this variation for a prescribed period. Also, this equipment is provided with an idle register 34 which is set, unless a level of a signal on a bus is varied for a prescribed period or above. Moreover, this equipment contains an EXOR gate 38 for monitoring the coincidence of the signal inputted from the receiving terminal RX and data sent out to a transmitting terminal TX, and AND gates 40, 42 for taking AND of a signal outputted from this EXOR gate 38 and a sampling clock and an SOF signal. An output signal of an AND gate 36a for taking AND of an output signal of this AND gate 42, and a Q output terminal of the idle register 34 shows a fact that a fault is generated in the own receiving terminal RX, and in the case this signal becomes an 'HI' level, it is regarded that a fault is generated in the own receiving terminal RX.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a communication device connected to a local area network (LAN) or the like. In particular, it relates to a communication device adopting the CSMA / CD system.

[0002]

2. Description of the Related Art With the development of communication technology, various devices distributed in a geographically narrow area such as the same building or the same premises are connected to each other using a network. Various access methods have been proposed for such a so-called local area network (LAN). This access method is TDMA (Tim
e Division Multiple Acces
s) method and CSMA / CD (Carrier Sen)
se Multiple Access with C
For example, the collision detection method is used. Among them, the CSMA / CD method is widely used as an access method for a bus network.

CSMA means that transmission is started immediately when the bus is idle (idle state), and is free when the bus is in use (other node is transmitting data). A method of transmitting after waiting for. A CD is a node that simultaneously monitors the status of the bus while transmitting data, and when the data sent by that node and the data actually appearing on the bus differ, the data of another node In this method, the transmission is considered to have occurred and transmission is immediately stopped.

That is, the CSMA / CD system is a system for transmitting data by waiting for the bus to become free when a transmission request is generated, and the data collides on the network even during data transmission. It is a method that constantly monitors whether or not there is.

The CSMA / CD system is widely used as an access system in a bus type network. However, when a plurality of nodes try to start transmitting at the same time, each node detects a data collision and tries to transmit again after a predetermined random pause time has elapsed. Therefore, the bus is not used for a long period, and it is difficult to increase the so-called bus throughput. Therefore, when adopting the CSMA / CD method, the contention method is often adopted at the same time. The contention method is a method in which a plurality of nodes start transmission at the same time, and even if data collides, one data survives without being destroyed. If such a method is adopted, even if a collision occurs, one data is transmitted without fail, so that the throughput of the bus can be improved to nearly 100%. Ordinary CSMA / CD LA that does not apply contention
In N, the throughput of the bus is said to be limited to 50% at most.

FIG. 3 shows a block diagram of a LAN using such a contention system and a time chart showing its operation. As shown in FIG. 3A, the entire LAN bus is pulled up by a pull-up resistor, and one of the open collector drivers 10 (a, b, c) of each node is turned on. Then, the value of the signal on the LAN bus becomes "LO". That is, the driver 10 (a, B of each node (A, B, C))
Each of b and c) is wired-OR connected to the LAN bus to form a so-called wired-OR configuration.

Therefore, if the signal level on the LAN bus is defined as data "1" when the signal level is "HI" and data "0" when the signal level is "LO", the data is "0" and "1". If the two collide with each other on the LAN bus, "0" always appears on the bus. For this reason, if each node has the collision detection capability, at least one transmission data is always transmitted correctly even if a plurality of nodes start transmission at the same time. Here, the collision detection capability is a capability of immediately interrupting the transmission when the data transmitted by itself does not match the data on the bus.

The correct transmission of at least one transmission data will be described with reference to the time chart of FIG. 3 (b). In the time chart shown in FIG. 3B, the signal indicated by the bus is the level of the data actually appearing on the LAN bus, and the node A · TX indicates the node A. Represents the data that is about to be sent. Hereinafter, the data indicated by the nodes B and TX and the nodes C and TX are the data to be transmitted by the nodes B and C, respectively. As shown in FIG. 3B, since the first bits of the transmission data of all the nodes are all "0", the signal level on the bus is also "0". Regarding the second bit of the transmission data, only the transmission data from the node A is "1", and the other nodes B and C
The transmission data from each is "0". Therefore, the level of the data actually appearing on the bus is "0", and the node A detects the difference between the data that it tried to transmit and the data on the bus. Thus, node A
Detects that data collision has occurred during transmission of the second bit. Then, the node A interrupts the transmission at this point and tries again after the elapse of a predetermined pause time.

Similarly, in the fourth bit of the transmission data, the data transmitted from the node B is "0".
On the other hand, the data transmitted from the node C is “1”. Therefore, the signal level actually appearing on the bus is "0", and the node C detects that data collision has occurred while transmitting the fourth bit. Then, the node C interrupts the transmission of the data thereafter and requests an opportunity to transmit the data again after the lapse of a predetermined pause time.

By using such a contention system, it is possible to give priority to transmission data. In the case of the LAN having the configuration shown in FIG. 3, if "0" and "1" collide, "0" always survives.
The data in which many "0" s are lined up can be transmitted with the highest priority.

Incidentally, Japanese Patent Laid-Open No. 61-195453 proposes another type of access method.

[0012]

In the protocol to which the conventional access method described above is applied, each node may start transmission at any timing as long as the bus is in the idle state. Therefore, in the node as shown in FIG. 4, the receiving terminal RX of the communication controller 12 is short-circuited or opened in the power supply line, and as a result, an internal failure that is fixed to the "HI" level occurs. To do. Then, the communication controller 12 always recognizes that the bus is in the idle state due to this failure. When such a failure occurs, this Fig. 4
When a node like the one shown in (1) tries to send certain data, the following loop state occurs.

(1) The bus becomes idle and transmission conditions are satisfied (2) SOF (start of frame) is sent (3) Collision is detected (bus level is different from that sent by itself) Since there is a failure at the receiving terminal, it is always detected that a collision has occurred. (4) Transmission is interrupted. Control returns to the above (1) after a predetermined time has elapsed The above controls (1) to (4) are repeated indefinitely.
Therefore, there is a problem that a periodic waveform always appears on the bus, which hinders communication between other normal nodes. FIG. 5 shows a time chart for explaining how such a periodic waveform occurs. In the time chart shown in FIG. 5, RX is the reception data at the reception terminal RX of the communication controller 12 in FIG. 4, and TX is the transmission terminal T of the communication controller 12.
The data at X. As shown in FIG.
The data appearing on RX due to a failure of the receiving terminal RX is always "HI". Therefore, when the communication controller 12 starts sending SOF (Start of Frame) to start transmission, the signal on the bus changes accordingly, but the communication controller 12 cannot recognize it due to the failure of the reception terminal RX. Therefore, the communication controller 12 considers that a collision has occurred and interrupts the transmission. Then, the SOF is retransmitted in an attempt to start communication again after the lapse of a predetermined pause time. Thereafter, this operation is repeated, and a waveform that periodically interferes with communication of another node is generated on the bus.

In order to avoid this, it can be considered to detect the above-mentioned trouble depending on the presence or absence of collision of the first 1 bit at the start of transmission. However, in this method, there is a possibility that a transient failure may be mistakenly recognized as occurring in the first 1-bit sampling at the start of transmission due to noise, timing deviation from another node, or the like.
The present invention has been made to solve such a problem, and an object thereof is to obtain a communication device capable of distinguishing between a continuous failure and a transient failure.

[0015]

In order to solve the above-mentioned problems, the first invention has a transmission terminal and a reception terminal, and C
In a communication terminal device that implements the SMA / CD system, an idle register that is set when signals on a bus have the same value for a predetermined time and is reset when a signal on the bus changes, and the transmission. The signal sent from the terminal to the bus and the signal on the actual bus received from the reception terminal are monitored, and when the two are different, a failure determination means for outputting a failure occurrence signal, and the failure occurrence signal Self-fault detection means for outputting a self-fault signal indicating that a fault has occurred in the reception terminal when the idle register is set, and the fault occurrence signal is output, and Collision detection means for outputting a collision detection signal indicating that a collision with another communication terminal device has occurred when the idle register has been reset. Only when a signal is detected, a communication terminal apparatus and performs retransmission of the signal.

[0016]

The idle register of the present invention can detect whether the signals on the bus have the same value for a certain period of time. Therefore, by referring to the output signal of the idle register, it is possible to distinguish whether the data collision with another node actually occurs or the own node fails.

[0017]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT A preferred embodiment of the present invention will be described below with reference to the drawings.

FIG. 1 is a block diagram showing the configuration of the communication controller 20 according to this embodiment. As shown in FIG. 1, the signal on the bus is input into the communication controller 20 via the reception terminal RX. The signal thus input is input to the reception controller 22, and data is received by appropriately sampling. Further, the data transmitted from the communication controller 20 is output to the outside via the transmission terminal TX and is output to the bus via the buffer amplifier 24 and the driver (open collector). This transmitted data is output from the transmission controller 28 in the communication controller 20.

The reception controller 22 and the transmission controller 28 are both supplied with a clock signal CLK from the outside and are used to determine the timing of transmission and reception. The signal input via the reception terminal RX is supplied to not only the reception controller 22 but also the differentiation circuit 30. The differentiating circuit 30 is a circuit that generates a pulse when the level of the signal on the bus changes.
The above-described clock signal CLK is supplied to the differentiating circuit 30 and is used to generate a pulse when a signal on the bus changes. The pulse generated by the differentiating circuit 30 is supplied to the counter 32 and the idle register 34 as an edge signal. This edge signal is supplied to the reset (R) terminal for the counter 32. Further, the clock signal CLK described above is supplied to the counter 32.
It is being input to the clock terminal of. Therefore, the counter 32 is a counter that normally performs a counting operation based on the clock signal CLK and is reset when the edge signal is output. When the count value of the counter 32 overflows, the overflow signal is supplied to the idle register 34 described above. That is, the overflow signal of the counter 32 is a signal output when the level of the signal on the bus has not changed for a predetermined period.

The above-mentioned edge signal is supplied to the reset (R) terminal of the idle register 34, and the above-mentioned overflow signal is supplied to the set (S) terminal. Therefore, the idle register 34 is "set" unless the level of the signal on the bus changes for a predetermined period (by the overflow signal described above), and when the level of the signal on the bus changes (described above). A register that is "reset" by the edge signal. An AND gate 36 is connected to the Q terminal of the idle register 34.
a is connected, and the inverted Q terminal of the idle register 34 is connected to the AND gate 36b. Therefore, AND
The output signal of the gate 36a becomes "HI" only when the level of the signal on the bus does not change for a predetermined period, and A
It will be appreciated that the output signal of ND gate 36b will be "HI" only if the period on which there is no change on the bus has been less than a predetermined period.

Further, the communication controller 22 according to this embodiment is provided with an EXOR gate 38. The receiving terminal RX is connected to one input end of the EXOR gate 38, and the transmitting terminal TX is connected to the other input end. That is, the output signal of the EXOR gate 38 becomes "HI" when there is a difference between the level of the transmission data and the level of the reception data. The output signal of the EXOR gate 38 is supplied to the AND gate 40.
The sampling clock output from the reception controller 22 is supplied to the other input terminal of the AND gate 40. Therefore, this AND gate 40 is a gate that monitors whether or not the transmission data and the reception data match at each sampling timing of the data, and when they do not match, sets its output signal to the “HI” level. is there. The output signal of the AND gate 40 is further supplied to the AND gate 42. Further, the other input end of the AND gate 42 is connected to the SOF from the transmission controller 28.
The (start of frame) signal is supplied. The SOF signal is a signal indicating that a so-called SOF (start of frame) bit to be output first when data is transmitted is transmitted. Therefore, the AND gate 42 monitors the coincidence between the transmission data and the reception data when the signal of the start of frame is sampled from the bus during the transmission of the start of frame, and if they do not coincide, It is a gate for setting the output signal to the "HI" level. In this way, the signal (the output signal of the AND gate 42) that finally indicates that the transmission data and the reception data do not match is supplied to the above-mentioned AND gates 36a and 36b.

Therefore, the output signal of the AND gate 36a becomes the "HI" level when there is no change in the signal on the bus for a predetermined period or more and when the mismatch between the transmission data and the reception data is detected. In the present embodiment, this AND
The output signal of the gate 36a is called an RX fail signal. A
The output signal of the ND gate 36b becomes the "HI" level when a mismatch between the transmission data and the reception data is detected within a predetermined period after the signal level on the bus changes. In the present embodiment, this AND gate 36b
The output signal from is usually referred to as the collision signal. As is clear from the above description, the RX fail signal is a signal indicating that a failure has occurred in the reception terminal RX, and the normal collision signal is a so-called data collision with another communication controller (node). It is a signal that represents a thing.

FIG. 2 is a time chart showing an operation example of the communication controller according to this embodiment.
The operation of the communication controller 20 according to the present embodiment will be described based on this time chart.

FIG. 2 (a) is a time chart showing the state of signals during transmission data collision with another communication controller (node), that is, a so-called normal collision. As shown in FIG. 2A, the idle register 34 is set by the pulse of the overflow signal of the counter 32, and the output signal of the Q terminal (called an idle signal in the figure) is "HI". It becomes a level. When the pulse of the edge signal from the differentiating circuit 30 is applied to the idle register 34, the idle signal (output signal of the Q terminal) becomes "LO".

Next, at the rising edge of the sampling clock (indicated by T1 in FIG. 2A), the signal input from the reception terminal RX and the signal transmitted to the transmission terminal TX do not match. If it is recognized, the output signal of the AND gate 42 becomes the "HI" level. And
In the case shown in FIG. 2A, the idle signal (the output signal of the Q terminal of the idle register 34) is "L".
Since it is at the "O" level, a normal collision signal (AND gate 3
The output signal of 6b) becomes "HI" level in synchronization with this sampling clock. As in the case shown in FIG. 2A, when the idle signal is at the “LO” level, the output signal of the inverted Q terminal, which is the opposite level to that signal, is “HI”. Please note that.

As described above, when the mismatch between the received data and the transmitted data is detected in synchronization with the sampling clock within a predetermined period after the change in the signal level on the bus, another communication controller is detected. It is considered that the collision of the transmission data with the (node) has occurred, and the transmission of the data is tried again after a predetermined pause period. This operation is the conventional C
This is similar to the access method of the SMA / CD method.

In FIG. 2 (b), if a mismatch between the transmitted data and the received data is detected after a lapse of a predetermined period or more after the level of the signal on the bus ceases to change, it is received. A flowchart in the case where it is recognized that a failure has occurred at the terminal RX is shown. As shown in FIG. 2B, when a pulse is generated in the overflow signal, the idle signal becomes “H” as described above.
I level. Then, in this state, if it is recognized that the data received from the receiving terminal RX and the data sent to the transmitting terminal TX do not match at the rising timing of the sampling clock,
As shown in FIG. 2B, the RX fail signal becomes the “HI” level in synchronization with the sampling clock. This RX fail signal is the output signal of the AND gate 36a as described above, and is a signal indicating that a failure has occurred at the reception terminal RX. Therefore, when the RX fail signal is output, the communication controller 20 according to the present embodiment considers that a failure has occurred in the reception terminal RX, and does not attempt transmission again after a lapse of a predetermined pause period. In this case, for example, send an error signal to the outside,
The operator is requested to replace or repair the parts.

As described above, according to the present embodiment, when the level of the signal on the bus does not change for a predetermined period, when the mismatch between the received data and the transmitted data is detected thereafter, the self-operation is performed. It is possible to realize the communication controller 20 that can be regarded as having always received the signal of the “HI” level, for example, when a failure occurs in the reception terminal RX.
Therefore, it is possible to effectively detect that a continuous failure has occurred at the receiving terminal RX of its own, and as a result, it is not necessary to periodically send a signal to the network. In addition, if any change in the bus level is detected between the start of transmission and the sampling of the first bit,
Even if a collision is detected due to noise or the like in the sampling of the first bit, it is possible to continue normal communication after a lapse of a predetermined period as a temporary failure. Therefore, if a LAN is configured using the communication controller 20 according to the present embodiment, it is possible to construct a network in which a failure of one communication device does not adversely affect other communication devices on the network.

[0029]

As described above, according to the present invention, when the level of the signal on the bus does not change for a predetermined period or more and the mismatch between the transmission data and the reception data is detected, the self It was considered that a continuous failure occurred at the receiving terminal RX of. Therefore, it is possible to efficiently detect a continuous failure of the receiving terminal RX of its own, and it is possible to obtain a communication device that does not adversely affect other communication devices on the network. In addition, in the case of a transient failure, normal transmission is still possible.

Therefore, by constructing a network in which the communication device according to the present invention is used as each node, it is possible to distinguish between a transient failure and a continuous failure, so that more efficient CSMA /
A network using the CD system can be constructed.

[Brief description of drawings]

FIG. 1 is a configuration block diagram of a communication controller that is a preferred embodiment of the present invention.

FIG. 2 is a time chart showing an operation example of a communication controller 20 shown in FIG.

FIG. 3 is a configuration block diagram and a time chart of a network to which a conventional CSMA / CD system is applied.

FIG. 4 is a block configuration diagram of each node connected to a network using a conventional CSMA / CD system.

FIG. 5 is a time chart showing an example of operation when a failure occurs in the reception terminal RX of the node shown in FIG.

[Explanation of symbols]

 20 communication controller 22 reception controller 24 buffer amplifier 26 driver 28 transmission controller 30 differentiating circuit 32 counter 34 idle register 36a, 36b AND gate 38 EXOR gate 40, 42 AND gate

Claims (1)

[Claims] 1. A CSM having a transmission terminal and a reception terminal
In a communication terminal device that implements the A / CD system, an idle register that is set when signals on a bus have the same value for a predetermined time and is reset when a signal on the bus changes, A failure determination means for monitoring the signal sent from the terminal to the bus and the signal on the actual bus received from the receiving terminal, and outputting a failure occurrence signal when the two are different, and the failure occurrence signal Self-fault detection means for outputting a self-fault signal indicating that a fault has occurred in the reception terminal when the idle register is set, and the fault occurrence signal is output, and Collision detection means for outputting a collision detection signal indicating that a collision with another communication terminal device has occurred when the idle register is reset; Only when a signal is detected, the communication terminal apparatus, characterized in that retransmits the signal.