JPH0723041A - Circuit fault informing system - Google Patents

Abstract

PURPOSE:To eliminate an invalidation processing of a fault analysis caused by a software of a control part, and to reduce the load, with regard to a circuit terminating circuit for containing a digital transmission line of a wide band ISDN, etc. CONSTITUTION:This system is provided with a fault factor analyzing part 3 for grouping fault information to three of a section fault, a path fault and a VP fault with respect to the fault generated from each part in a circuit terminating circuit 1. The fault factor analyzing part 3 selects the fault information of the maximum one item at every group and informs a processing software 6 about the respective outputs. Also, the priority is set among the fault information grouped to three, the priority of the fault information generated from three groups is discriminated, and this system is constituted so as to inform the processing software 6 about the fault information of the group of the highest priority.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a line failure notification system in a line termination circuit accommodating a digital transmission line.

In recent years, wideband digital transmission by ATM using an optical line has come to be performed, and in a circuit terminating such a digital transmission line, each section such as an optical / electrical converting section, a frame synchronizing section, a cell synchronizing section, etc. It is composed by. In such a line termination circuit, a failure is detected in each part and the line management software is notified from each. Depending on the failure, multiple types of failure notifications are generated depending on the main cause of the failure, which may burden the failure analysis software.

[0003]

2. Description of the Related Art FIG. 5 is an explanatory diagram of a broadband ISDN network. FIG. 5 (a) shows an example of a network configuration. This example is a simple configuration including nodes A, B and C. Node A is the transmission-side termination point and node C is the reception-side termination point. Each node is connected by a trunk line such as an optical line, and each line is physically a line termination circuit (indicated by LU: Line Unit). Is terminated in. Although not shown between the line termination circuits (LUs) in each node, ATM cells are connected to VPI (logical path identification number) or VCI.
A mechanism (cross connect or the like) for performing switching by (logical channel identification number) is provided. A physical section including a relay line connecting the line termination circuit (LU) of one node and the line termination circuit (LU) of the other node is called a section as shown in the figure, and a physical path is Has been formed.

On the other hand, in the broadband ISDN, transmission is performed by ATM cells, and logical paths (V
P: Virtual Path) can be set, and a plurality of logical channels (VC: Virtual Channel) can be set therein, and VPI (VP identification number) and VCI (VC identification number) can be set.
Is transmitted to the destination by the ATM cell added with. These ATM cells are transmitted through a physical path passing through the above section, and logically through a logical channel (VC) in a logical path (VP) set up in the section.

FIG. 5B is an explanatory diagram of signals transmitted and received when a failure between nodes is detected. To detect such a failure between nodes, failure detection is performed for each layer (physical signal level, physical path level, logical path level, etc.). Although not clearly shown in FIG. 5 (a),
In reality, bidirectional transmission paths are provided between and within each node. As shown in (b), node A
The direction from node C to node C is a down path, and the direction from node C to node A is an up path.

In the path of this path, if a failure occurs between the node A and the node B (a failure of the logical path),
The line termination circuit (LU) of node B detects a fault and notifies the control unit. When the control unit analyzes with a fault analysis software and analyzes that there is a logical path fault, the AIS (alarm indication signal: Alarm Identifi) is sent to the end point (node C) of this logical path by the management cell.
cation signal). When this is detected by the line termination circuit (LU) of the node C, the control unit is notified. When the control unit analyzes the content of this failure, it transmits a FERF (Far End Receive Failure) signal through the upstream path by the management cell. By receiving this FERF at the termination point on the transmission side, it is possible to know the failure of the downlink path and take countermeasures.

Next, a processing method for various failures detected in the conventional line termination circuit (LU) will be described with reference to FIG. FIG. 6 is an explanatory diagram of conventional line failure processing.

In FIG. 6, reference numeral 60 is a line terminating circuit (LU) on the receiving side, 61 is an optical / electrical converting section (shown by an O / E section) for converting an optical signal transmitted by an optical fiber into an electric signal, 62. Is a frame synchronization unit for inputting an electric signal to control synchronization of a frame composed of a plurality of ATMs, and 63 is an A
A cell synchronization unit that controls the synchronization of TM cells (consisting of 53 octets), 64 is a VP termination unit that terminates a logical path (VP), and 65 is an interface between the line termination circuit (LU) 60 and the control unit. The control system interface section 66, the control section 66, and the line management software 67 analyze the failure information and execute the control operation for dealing with the failure.

In the line terminating circuit (LU) 60, when the O / E unit 61 converts an optical signal into an electric signal and detects the disconnection of the optical signal, a signal notifying the control system interface unit 65 of the optical signal disconnection. To occur. The control system interface unit 65 sends this notification to the control unit 66, and the control unit 66 analyzes the line management software 67 to generate a control signal for coping with the failure. In the case of this optical signal interruption failure, the redundant optical line is autonomously switched to the standby system.

Further, the frame synchronization section 62 performs an operation for synchronizing the frame composed of a large number of cells, but when the frame synchronization signal is no longer detected, it notifies the control system interface section 65 of a frame signal disconnection notification signal. Similarly, when the cell synchronization unit 63 detects loss of cell synchronization,
When the P termination unit 64 receives VP-AIS (warning display signal generated from the upstream node that has detected the failure of the logical path VP shown in (b) of FIG. 5), the control system interface unit 65 receives the VP-AIS. Failure notifications are individually generated and notified from the control system interface section 65 to the control section 66, and the line management software 67 performs analysis and corresponding control processing accordingly.

[0011]

In the conventional line failure notification system shown in FIG. 6 described above, in the line terminating circuit, when the optical input is cut off, the frame is out of synchronization, the cell is out of synchronization, and the VP-AIS is detected. Failure information such as is notified to the line management software of the control unit, but if the optical input is cut off, frame out-of-sync and cell out-of-sync will inevitably occur. Even if each of the out-of-sync and the out-of-sync of the cell is notified, the load of the line management software only increases, and the notification has no meaning.

It is an object of the present invention to provide a line fault notification system capable of reducing load by eliminating invalidation processing of fault analysis by software of a control unit.

[0013]

FIG. 1 is a basic configuration diagram of the present invention. In FIG. 1, 1 is a line termination circuit that constitutes a transmission device, 2a is an optical / electrical conversion (O / E) unit, 2b is a frame synchronization unit, 2c is a cell synchronization unit, 2d is a VP termination unit,
3 is a failure factor analysis unit, 4 is a control system interface unit, 5
Is a control unit, and 6 is processing software.

According to the present invention, as a method of notifying failure information in a transmission apparatus, the processing software invalidation processing including failure analysis is performed by grouping the failure types into processing units of the management software and hierarchically notifying each other. Is configured to reduce.

[0015]

[Function] The fault factor analysis unit 3 of the line termination circuit 1
When a failure is detected in each of the sections 2a to VP terminating section 2d, failure information is notified from each section. The failure information from each section is displayed in the section 3 of the failure factor analysis unit.
a, a path failure 3b, and a VP failure 3c are input into any of the three groups. The management software separates these groups so that the processing units are different for each group, and one item of failure information is generated from each group. The failure information of one item from each of these groups is sent to the control system interface unit 4
Output to the control system interface unit 4 to the control unit 5
Is supplied to. The control unit 5 is preliminarily grouped according to the failure, and only one item in the group is input, so that the load of processing software such as failure analysis is lightened.

The failure factor analysis unit 3 may be provided with another mechanism to further reduce the load on the processing software of the control unit 5. The first is to provide a priority order determination means (not shown) in which the priority order is set to 3a>3b> 3c among the three groups 3a to 3c, and failure information is output from a plurality of groups among the three groups. When it occurs, the failure factor analysis unit 3 displays one piece of failure information that is prioritized by the priority order determination means.
To the control system interface unit 4.
In this case, the control unit 5 processes the failure notification of one preferential group among the plurality of groups.

[0017]

FIG. 2 is a block diagram of an embodiment of a failure factor analysis unit, which corresponds to the failure factor analysis unit 3 in the line termination circuit 1 of FIG. 1 described above. Priorities are set.

In FIG. 2, 20 is a section fault occurrence part, 21 is a path fault occurrence part, 22 is a VP fault occurrence part, 2
Reference numerals 3 and 24 denote AND circuits for controlling the priority order.

In the configuration shown in FIG. 2, the section fault generating section 20 has a circuit (O / O in FIG. 1) in the line termination circuit.
A plurality of pieces of fault information a generated from the E section 2a) that can be grouped into a group of section faults are input, and when one of the plurality of pieces of fault information occurs, one item is output. If multiple items display a failure, only one is selected.

The section failure group is
A failure in which autonomous switching is performed as a process corresponding to the failure is targeted. A plurality of pieces of failure information b generated from related circuits (frame synchronization section, cell synchronization section in FIG. 1) in the line termination circuit and which can be summarized into a group of path failures are input to the path failure generation section 21. . This path failure group targets failures for which system switchover is performed as processing for the failure. When the fault information is generated in one item in the path fault group input to the path fault generating unit 21, it is supplied to one input of the AND circuit 23.
At this time, if the fault information is generated from the section fault generating unit 20, an inverted signal of that signal is supplied to the other input of the AND circuit 23, so that the output of the path fault generating unit 21 is prohibited. Therefore, the output of the path failure occurrence part 21 is
The section fault occurrence unit 20 notifies the control system interface unit only when fault information does not occur.

Further, the VP failure generating section 22 is supplied with failure information c which is generated from a related circuit (VP terminating section in FIG. 1) in the line terminating circuit and can be put together into a group of VP failures. This VP failure group is processed by, for example, FERF (see FIG. 5 above) as processing corresponding to the failure.
(Refer to (b)). The fault information output from the VP fault generating unit 22 is supplied to one input of the AND circuit 24, and is output to the control system interface unit when the output of the AND circuit 23 supplied as the other input is not generated. .

With the configuration of FIG. 2, fault information is output to the control system interface section in the priority order of section fault> path fault> VP fault between the three fault groups a to c. When the fault information is output from the section fault generating unit 20 due to the occurrence of the fault, the fault notification generated by the path fault, the VP fault, etc. generated due to the signal disconnection as in the related art is prohibited, and the control unit causes the fault. It is possible to reduce unnecessary analysis and operation of processing software for line control.

FIG. 3 shows an example of the contents of the failure in each of the above groups. As shown in FIG. 3, examples of the faults included in the section fault group include LOS (Loss Of Signa).
l: Loss of frame, LOF (Loss Of Frame: loss of frame synchronization), S-AIS (Signal-AIS: signal level alarm display signal), etc.

Faults included in the path fault group include LOP (Loss Of Path) and P-AIS (Path-AI).
S: Pass level alarm display signal), LOC (Loss Of Ce)
ll: Cell discard). Furthermore, as a fault included in the group of VP faults, there is VP-AIS (alarm display signal of logical path level).

FIG. 4 is a block diagram of another embodiment of the failure factor analysis unit. In FIG. 4, 20 to 22 are the same devices as the respective fault occurrence units of the same reference numerals in FIG. 2, 40 is a protection time setting circuit, and 41 is a priority order determination logic circuit.

To explain the operation of FIG. 4, the fault information generated from the section fault generating unit 20, the path fault generating unit 21, and the VP fault generating unit 22 is input to the protection time setting circuit 40. In the protection time setting circuit 40, the protection time set in advance corresponding to each group is set, and the failure information to be input is monitored only for the set time,
If the fault information continues to be generated even after the respective protection times have passed, the respective fault information is output to the priority order determination logic circuit 41.

The protection time setting circuit 40 is composed of a timer or the like. The priority determination logic circuit 41 has the same configuration as the AND circuits 23 and 24 in FIG.
Fault information selected according to the priority is supplied to the control system interface unit.

With the configuration shown in FIG. 4, for example, when a section failure occurs somewhere on the line and autonomous switching occurs, a section failure and a path failure or a VP failure are detected, and the failure occurrence units 20 to 22 are detected. However, if the protection time for the natural recovery is set in advance in the protection time setting circuit 40, the failure information disappears because the protection time is restored after the protection time. In this case, the fault information is not output to the priority determination logic circuit 41, so that the control unit is not burdened at all.

Further, when each failure information occurs, if a path failure continues to occur even after the protection time elapses, failure notification is given to the line control software of the control unit for system switching. Similarly, with respect to other groups, only the failure of the lower layer (the lower layer is the physical layer) is notified to the control unit.

The time set in the protection time setting circuit 40 can be set to a different value according to the nature of each failure occurrence section 20-22.

[0031]

According to the present invention, the fault factors are classified into groups corresponding to the processing contents of the software, and the fault factor analysis unit is provided in each line termination circuit, thereby reducing the load of the line control system software of the control unit. Can be reduced. Moreover, by giving priority to each failure factor analysis unit in each failure factor analysis unit, it is possible to suppress the generation of a plurality of failure information based on the same factor. Further, by setting the protection time for the occurrence of the failure information of each group, it is possible to prevent the unnecessary occurrence of the failure information.

[Brief description of drawings]

FIG. 1 is a basic configuration diagram of the present invention.

FIG. 2 is a configuration diagram of an embodiment of a failure factor analysis unit.

FIG. 3 is a diagram showing an example of contents of a failure in each group.

FIG. 4 is a configuration diagram of another embodiment of the failure factor analysis unit.

FIG. 5 is an explanatory diagram of a broadband ISDN network.

FIG. 6 is an explanatory diagram of conventional line failure processing.

[Explanation of symbols]

 1 Line termination circuit 2a Optical-electrical conversion (O / E) unit 2b Frame synchronization unit 2c Cell synchronization unit 2d VP termination unit 3 Failure factor analysis unit 4 Control system interface unit 5 Control unit 6 Processing software

─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. ⁶ Identification number Reference number within the agency FI Technical indication location H04Q 11/04 (71) Applicant 000005108 Hitachi, Ltd. 4-6 Kanda Surugadai, Chiyoda-ku, Tokyo ( 72) Inventor Toshio Shimoe 1015 Kamiodanaka, Nakahara-ku, Kawasaki-shi, Kanagawa, Fujitsu Limited (72) Inventor Yu Ezaki, 1015, Kamikodanaka, Nakahara-ku, Kawasaki, Kanagawa, Fujitsu Limited (72) Inventor ▲ High ▼ Yasushi Ki 1-1-6 Uchisaiwaicho, Chiyoda-ku, Tokyo Inside Nippon Telegraph and Telephone Corporation (72) Inventor Yoichi Imagawa 1-7-12 Toranomon, Minato-ku, Tokyo Oki Electric Industry Co., Ltd. (72) Inventor Minamimura Keizo 5-7 Shiba 5-chome, Minato-ku, Tokyo Nippon Electric Co., Ltd. (72) Inventor Masaru Murakami 1-280 Higashikoigakubo, Kokubunji, Tokyo Ceremony Hitachi Central Research Laboratory

Claims (3)

[Claims] 1. A line terminating circuit accommodating a digital transmission line, wherein each piece of fault information generated from each section in the line terminating circuit is classified into one of three groups: section fault, path fault, and VP fault. A line failure notification method in which a failure factor analysis unit for outputting is provided, and the failure factor analysis unit notifies the processing software of at least one item of failure information for each group. 2. The line according to claim 1, wherein the failure factor analysis unit is provided with means for determining a priority order among the grouped failure information, and notifies the processing software of the failure information of the highest priority group. Failure notification method. 3. The constant protection time according to claim 2, wherein the failure factor analysis unit sets a fixed protection time between the first failure detection of the grouped failure information and the notification to processing software. A protection time setting circuit that waits only for the protection time setting circuit is provided, and the fault information output from the protection time setting circuit and grouped is discriminated by the means for discriminating the priority, and the processing software is notified in descending order of priority. Line failure notification method.