JPH07218626A - Transmitting/receiving circuit - Google Patents

Abstract

PURPOSE:To provide an electromagnetic coupling type transmitting/receiving circuit for transmitting/receiving the signal through a single coil in which clock and power can be generated stably from the receiving wave while reducing the size. CONSTITUTION:An ID tag 2 comprises a resonance circuit 10 for communicating signals S1, S2 with an information reader 4, a transistor Tr1 for modulating the output from the resonance circuit 10 by grounding the output terminal T2 thereof, and a modulation circuit 26 generating a modulation control signal Sc for turning the modulation transistor Tr1 ON only for one half period every two periods depending on a response data Do read out from a memory 22 at the time of modulation. Since the modulation is performed without varying the output frequency of the resonance circuit 10, a stabilized clock can be generated from the output and since the output is partially thinned ripple is suppressed after rectification thus providing a stabilized power supply.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a transmitter / receiver circuit which receives a radio wave transmitted from the outside, generates a power supply and a clock for driving and controlling an internal circuit from the radio wave, and operates the clock.

[0002]

2. Description of the Related Art Conventionally, as an apparatus provided with a transmission / reception circuit of this type, for example, as shown in Japanese Patent Laid-Open No. 62-212589, for placing articles or articles that move in a factory or the like. An information holder attached to a pallet, etc., that holds information about an article, and an information reader that is installed near the moving route of the article and reads the information of this information holder without contact when the article passes. A moving object identification device including a container is known.

In this mobile object identification device, the information holder is
A resonance circuit including a coil and a switch, a storage device that stores information about an article, a control circuit that controls a switch of the resonance circuit according to the information read from the storage device, and the like are provided, and radio waves output from an information reader are transmitted. Information is received by the resonance circuit, and a switch provided in the resonance circuit is operated in accordance with the information read from the storage device to change the resonance state (frequency and amplitude) of the resonance circuit to modulate the signal. The identification code of the article is transmitted to the reader.

In this information holder, in order to miniaturize the device, a clock generation circuit for generating a clock for controlling synchronous processing such as read / write of the storage device divides the received signal to generate a clock. And a power supply circuit for rectifying a received signal to generate a direct current power supply as a power supply for driving each part of the information holder, thereby being configured without using a battery. ing.

[0005]

However, in this device, when the information holder transmits a signal to the information reader,
Since the resonance state (frequency and amplitude) is changed by switching the connection state of the resonance circuit to modulate the signal, the frequency of the received signal at the time of modulation is not constant,
Therefore, the clock generated by dividing the frequency of the received signal changes according to the modulation. Therefore, there is a problem in that the operation of the synchronization process performed by using a clock for reading data from the storage device becomes unstable, and the read and modulation operations are not normally performed.

Further, since the amplitude of the output signal of the resonance circuit also changes according to the modulation during the modulation, the power supply circuit cannot supply a constant power, and the circuit operation in the information holder becomes unstable. However, there is a problem that the identification code may not be read normally.

As described above, if the clock generation circuit and the power supply have a simple structure in order to miniaturize the device, the operation of the device becomes unstable, and a highly reliable information holder cannot be constructed. . In order to solve the above problems, the present invention can generate a stable clock and power from the received wave in an electromagnetic coupling type transmitting / receiving circuit that transmits / receives a signal by using one coil, and can be applied to an applicable device. An object of the present invention is to provide a transceiver circuit that can be downsized.

[0008]

A transmission / reception circuit according to claim 1, which is made to achieve the above object, comprises a coil and a capacitor, and a resonance circuit which resonates with an electric wave transmitted from the outside, and the resonance circuit. Clock generating means for generating a clock synchronized with the output of the circuit, rectifying means for rectifying the output of the resonant circuit into a DC voltage with the center potential of the output being the ground potential, and a predetermined output from the rectifying means In a transmission / reception circuit provided with a power supply generation unit that generates a power supply for driving a voltage and a modulation unit that modulates the output of the resonant circuit using a clock generated by the clock generation unit, the modulation unit is a predetermined unit. A switching unit grounding one end of the resonance circuit according to a drive signal, and a predetermined unit corresponding to the clock in synchronization with the clock output from the clock generation unit. Drive signal generating means for generating a drive signal for driving the switching means only during a half period of the clock case, that it consists characterized.

A transmitting / receiving circuit according to a second aspect is the transmitting / receiving circuit according to the first aspect, which has a resistance element connected in series to the switching means, and further, the drive signal generating means, The switching means is driven in synchronization with a clock output from the clock generating means at a predetermined rate corresponding to the clock for a predetermined period between a half cycle and one cycle of the clock.

The transmitting / receiving circuit according to claim 3 is the transmitting / receiving circuit according to claim 1 or 2, wherein the signal component contained in the radio wave is extracted from the change in the output level of the rectifying means. It is characterized in that a demodulating means for performing demodulation is provided.

[0011]

In the transmitter / receiver circuit according to claim 1 configured as described above, the resonance circuit resonates with an electric wave transmitted from the outside to receive the electric wave, and the clock generation means receives the electric wave. Generates a clock synchronized with the output from the resonance circuit, and the rectifying means rectifies the output of the resonance circuit into a direct current voltage whose center potential is the ground potential. A driving power supply of a predetermined voltage is generated from the generated DC voltage.

On the other hand, in the modulating means, the drive signal generating means generates a drive signal for driving the switching means according to the data to be transmitted. Then, the switching means is driven by this drive signal, and in synchronism with the clock output from the clock generating means, one end of the resonant circuit is grounded for a half cycle of the clock at a predetermined rate corresponding to the clock.

By this switching operation, the output of the resonance circuit is modulated at a predetermined rate corresponding to the clock so that the amplitude of the signal becomes the ground potential for a half cycle of the clock, and the modulated signal is supplied to the resonance circuit. It is output to the outside through the coil that constitutes it. Here, in the present invention, the drive signal generating means is configured to generate the drive signal for driving the switching means for a half cycle of the clock at a predetermined rate corresponding to the clock. When one end of the resonance circuit is grounded by driving, the resonance circuit is held at the ground potential, and the amplitude of the resonance signal is lost.Therefore, if it is held at the ground potential for more than half a clock cycle, the clock is generated. This is because the frequency component necessary for doing so is lost, and it becomes impossible to generate a clock synchronized with the resonance signal.

Next, in the transmitting / receiving circuit according to the second aspect, the resistance element connected in series with the switching means limits the current flowing out from the resonance circuit via the switching means when the switching means is driven. The output of the resonance circuit when the switching means is operated is held at a predetermined level higher than the ground potential.

On the other hand, the drive signal generation means drives the switching means in synchronization with the clock output from the clock generation means for a predetermined period between a half cycle and one cycle of the clock at a predetermined ratio corresponding to the clock. By this switching operation, the output of the resonance circuit is modulated into a signal having a portion whose amplitude is limited by a predetermined period corresponding to the clock for a predetermined period between a half cycle and one cycle of the clock, and this modulated signal Is output to the outside through the coil that constitutes the resonance circuit.

Here, in the present invention, the drive signal generating means is configured to generate the drive signal for driving the switching means for a predetermined period between a half cycle and one cycle of the clock at a predetermined rate corresponding to the clock. However, this is because when the switching means is driven, one end of the resonance circuit is grounded via a resistor, so that the amplitude is lost by being pulled to the ground potential as in the transceiver circuit according to claim 1. This is because the amplitude is limited and the frequency component necessary for generating the clock is not lost even if the modulation is performed for one cycle.

As the resistance value of the resistance element increases, the amplitude of the output of the resonance circuit when the switching means is driven becomes closer to the amplitude when it is not driven. According to this, the degree of modulation of the output of the resonance circuit becomes small, and
The ripple of the DC voltage output from the rectifying means is also small.

On the other hand, a period for driving the switching means,
That is, the closer the period in which the amplitude of the output of the resonant circuit is limited to one cycle of the clock, the greater the degree of modulation of the signal of the resonant circuit, and the greater the ripple of the DC voltage output from the rectifying means. However, in order to efficiently generate the power supply, the smaller the ripple of the DC voltage output from the rectifying means, the better, and the greater the degree of signal modulation in order to facilitate demodulation at the signal receiving side. Therefore, the period for driving the resistance element and the switching means is
It is necessary to appropriately set an appropriate value that satisfies the conflicting requirements.

Next, in the transmission / reception circuit according to the third aspect, the demodulation means extracts the signal component superimposed on the radio wave received by the resonance circuit from the fluctuation of the level of the DC voltage rectified by the rectification means. Then, the extracted signal component is demodulated by the clock supplied from the clock generation means and synchronized with the received radio wave.

[0020]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment in which the transmitting / receiving circuit of the present invention is applied to an article identifying device will be described below with reference to the drawings. FIG. 1 is a block diagram showing the configuration of the article identifying device.

The article identification device is attached to an article or a pallet, and is installed near an ID tag 2 that holds information about the article such as an identification code and its quantity, and a belt conveyor or other conveyance device that conveys the article. The information reader 4 reads the identification code of the ID tag attached to the article or pallet.

The information reader 4 constitutes an oscillating circuit for oscillating at a predetermined frequency, a transmitting coil L1 for outputting this as a transmitting signal S1, and a transmitting coil L1 for transmitting a predetermined transmitting information. The transmission circuit 6 that amplitude-modulates the signal S1, the receiving coil L3 that receives the response signal S2 from the ID tag 2, and the frequency-modulated response signal S2 that is received by the receiving coil L3 are demodulated to extract response information. The receiving circuit 8 is provided.

The ID tag 2 is a capacitor C1 which constitutes the resonance circuit 10 together with the coil L2 and the coil L2 for transmitting and receiving the transmission signal S1 and the response signal S2 by electromagnetic induction coupling with the transmission coil L1 and the reception coil L3 of the information reader 4. ,
Rectifier circuit 1 for converting the output of the resonance circuit 10 into a DC voltage
2. A power supply circuit 14 for generating a power supply Vcc of a predetermined voltage for driving the internal circuit of the ID tag 2 from the output of the rectifier circuit 12, and an output terminal T1 of the resonance circuit 10 connected to the output of the resonance circuit 10 to output the ID tag 2 A clock generation circuit 16 for generating a clock CLK for operating the internal circuit of C, a capacitor C2 connected to an output terminal T3 of the rectifier circuit 12 and for extracting an amplitude modulation signal component included in the transmission signal S1 from the output of the rectifier circuit 12, A waveform shaping circuit 18, which shapes the signal component extracted by the capacitor C2 into digital data,
The decoder 20 for decoding the serial digital data output from the waveform shaping circuit 18, the memory 22 for storing the information that the ID tag 2 should respond to the information reader 4, and the memory 22 according to the command CMD output by the decoder 20 A control circuit 24 for controlling reading / writing, a modulation circuit 26 for generating a modulation control signal Sc synchronized with a clock CLK from response data Do output from the control circuit 24, and an output terminal T2 of the resonance circuit 10 are connected to perform modulation. The modulation transistor Tr1 is configured to modulate the output of the resonance circuit 10 by grounding the output terminal T2 according to the modulation control signal Sc output from the circuit 26.

The rectifier circuit 12 is a well-known full-wave rectifier circuit in which the median value of the output potential of the resonance circuit 10 is the ground level G, and there are, for example, a bridge type and a center tap type. The power supply circuit 14 is a well-known stabilizing circuit that generates a stable power supply without ripples from a DC power supply containing ripples output from the rectifier circuit 12, and the resonance circuit 1 when not modulated.
It is configured to generate a power supply Vcc having a voltage of about 3/4 of the effective value voltage of the signal output from 0.

The clock generation circuit 16 is composed of a comparator or the like for comparing input signals at a predetermined level. By comparing the levels of the signals at the output terminal T1 of the resonance circuit 10, the clock generation circuit 16 and the output of the resonance circuit 10 are compared. A clock CLK having the same frequency f is generated. The control circuit 24 includes an address generation unit that generates an address for accessing the memory 22, a control signal generation unit that generates a control signal such as a read / write signal of the memory 22, and a control code or the like in the data read from the memory 22. It has a response data generation unit for adding response data Do to add it, and these are provided by the decoder 20.
Respectively operate in synchronization with the command CMD output by the clock generation circuit 16 and in synchronization with the clock CLK output by the clock generation circuit 16. The control circuit 24 may be composed of a microcomputer.

Further, the memory 22 stores information such as the identification code of the article and the quantity of the article as information for responding to the information reader 4. The modulation circuit 26 is shown in FIG.
As shown in FIG. 3, a clock CLK having a frequency f output from the clock generation circuit 16 and a clock CLK2 having a frequency f / 2, which is obtained by dividing the frequency of the clock CLK, and the control circuit 2
4 and an input of the response data Do generated in 4 and an AND circuit 28 that outputs the logical product as a modulation control signal Sc of the modulation transistor Tr1 is connected to the base terminal of the modulation transistor Tr1. ing.

Next, the ID tag 2 configured as described above
The operation of each unit of will be described based on the waveform chart. First, a case where data is transmitted from the information reader 4 to the ID tag 2 will be described with reference to FIG.

The information reader 4 sends out a transmission signal S1 having a predetermined amplitude and a predetermined frequency from the transmission coil L1. When transmitting a command or the like to the ID tag 2, the transmission signal S1 is amplitude-modulated according to the transmission information and transmitted. When the ID tag 2 is located near the information reader 4,
The ID tag 2 receives this transmission signal S1 by the coil L2.

Outputs (waveform 3--) appearing at the output terminals T1 and T2 of the resonance circuit 10 by receiving the transmission signal S1.
1) is converted into a DC voltage (waveform 3-2) containing a signal component by amplitude modulation by the rectifier circuit 12, and further, a stable internal drive power supply Vcc (containing no ripple) is supplied by the power supply circuit 14. Waveform 3-3) is continuously taken out,
Clock generation circuit 16, waveform shaping circuit 18, decoder 2
0, memory 22, control circuit 24, modulation circuit 26, etc. In the power supply circuit 14, the extracted power supply Vcc is set to a value slightly lower than the voltage value VL taken out when the small amplitude is continuous so as not to be affected by the ripple due to the signal component of the amplitude modulation. There is.

The output of the rectifier circuit 12 (waveform 3-2)
The DC component is removed by the capacitor C2, and only the amplitude modulation component of the received signal is extracted and input to the waveform shaping circuit 18. The signal input to the waveform shaping circuit 18 is waveform shaped by the comparator, and the received data Di (waveform 3
-4) is input to the decoder 20 and the control circuit 24.

On the other hand, a signal (waveform 3-5) of the output terminal T1 of the resonance circuit 10 with respect to the ground level G is input to the clock generation circuit 16. The clock generation circuit 16 generates a clock CLK (waveform 3-6) by comparing this signal at a predetermined level, and supplies this clock CLK to the control circuit 24, the modulation circuit 26 and the like.

Further, in the control circuit 24, when the power supply Vcc and the clock CLK are supplied by the above-described circuit operation, the command CMD output from the decoder 20 is fetched and the processing according to the command CMD is executed. For example, if the command CMD is a command for writing data to the memory 22, the control circuit 24 generates a control signal for controlling the memory 22, such as an address and a write signal, and the reception that the waveform shaping circuit 18 outputs. The data Di is fetched and the received data Di fetched in a predetermined area of the memory 22 is written.

The commands and data transmitted from the information reader 4 to the ID tag 2 by the amplitude modulation signal are as follows.
For example, there are a command used for writing response information in the memory 22 in advance, write data thereof, a command for instructing reading of written response information, and the like.

Next, the operation of each part when the response signal S2 is sent from the ID tag 2 to the information reader 4 will be described with reference to FIG.
Follow along. The data held in the ID tag 2 is read while the transmission coil L1 of the information reader 4 is transmitting the transmission signal S1 having a predetermined period and a predetermined amplitude.

From the outputs appearing at the output terminals T1 and T2 of the resonance circuit 10 that have received the transmission signal S1, the rectifier circuit 12, the power supply circuit 14 and the clock generation circuit 16 supply the power supply Vcc and the clock CLK (waveform) as described above. 4-
1) and are generated and supplied to each part of the ID tag 2.

If the command CMD fetched from the decoder 20 commands the reading of response information, the control circuit 24 reads the response information for notifying the information reader 4 stored in the memory 22 in advance, Response data Do (waveform 4) is added to this by adding a control code for communication.
-2) is generated and input to the modulation circuit 26.

The response data Do is converted by the modulation circuit 26 into a modulation control signal Sc (waveform 4-3) for turning on / off the modulation transistor Tr1. That is, while the response data Do is at the H level, the H level is continuously output for every 1/2 cycle of the double cycle of the clock CLK.

When the modulation transistor Tr1 is driven by the modulation control signal Sc, the modulation transistor Tr1 is driven.
1 turns on, the output terminals T1 and T2 of the resonance circuit 10
Is drawn to the ground level G. This is because the power value of the output excited in the resonance circuit 10 by receiving the transmission signal S1 is a predetermined value, the modulation transistor Tr1 is turned on, and the modulation transistor Tr1 is turned on.
This is because if the current flows out through the coil, the voltage across the coil L2 cannot be maintained.

As a result, the output at the output terminal T1 (waveform 4-4) is pulled to the ground level G only during a half cycle in which the potential becomes lower than the median value, and the output at the output terminal T2 (waveform 4-4). In the case of 5), conversely, the potential is pulled to the ground level only during a half cycle in which the potential becomes higher than the median value. That is, as can be seen from the waveform diagram of FIG. 4, the output of the output terminal T1 (waveform 4-4) is not greatly affected although the waveform is slightly distorted, while the output of the output terminal T2 is (waveform 4-5). The waveform is thinned out every one cycle, and it is in a state of oscillating at 1/2 of the original frequency.

Therefore, the output terminals T1 and T of the resonance circuit 10 are
The modulated output (waveform 4-6) appearing between the two is a signal in which the signal component of the frequency f / 2 generated by the modulation in the ID tag 2 is superimposed on the frequency f of the transmission signal S1. This modulated output (waveform 4-6) is induced from the coil L2 to the receiving coil L3 of the information reader 4 via the magnetic flux.

In the receiving circuit 8, the response data (waveform 4-8) is extracted by frequency-detecting the signal component f / 2 contained in the response signal S2 (waveform 4-7) from the ID tag 2. As described above, in the ID tag 2 of the article identifying apparatus according to the first embodiment, the potential with respect to the ground level G of the output terminal T2 to which the modulation transistor Tr1 is connected is higher than the central value of the half cycle. By driving the modulation transistor Tr1 every two cycles only during the period, the frequency of the signal (waveform 4-4) input to the clock generation circuit 16 does not change even during modulation. It is possible to always generate a stable clock CLK (waveform 4-1).

Further, as can be seen from the waveform 4-6, during the modulation, the ground level G is held for every half cycle for every two cycles, and during this period, no electric power is supplied from the resonance circuit 10, so that the rectifier circuit 12 is operated. The output (waveform 4-9) is 3/4 of the output Vs obtained during unmodulation, but the power supply circuit 14 is configured to output a value slightly lower than this voltage as the power supply Vcc. , Can always supply a stable power supply.

That is, since the frequency of the signal input to the clock generation circuit 16 is constant even during modulation,
A stable clock CLK can be generated at all times, and the DC voltage obtained by rectifying the output of the resonance circuit 10 does not fluctuate below a predetermined level (3/4 of that in the unmodulated state) due to modulation. It is possible to always supply a stable power supply Vcc. Therefore, the circuit in the ID tag 2 always operates stably and the decoding of commands and the reading and writing of information are accurately performed, so that a highly reliable device can be provided.

Further, according to the ID tag 2 of the first embodiment, the transmission / reception of the transmission signals S1 and S2 with the information reader 4 is carried out by the single coil L2 for both transmission and reception.
From the output of the resonance circuit 10 when receiving the transmission signal S1,
The power supply Vcc is generated and the clock CLK synchronized with this output is also generated from the output of the resonance circuit 10.

Therefore, it is not necessary to provide a unique oscillation circuit for generating the clock CLK or a large component such as a battery, so that the ID tag 2 can be miniaturized. Next, a second embodiment will be described.

FIG. 5 is a block diagram of the ID tag 2a according to the second embodiment. As shown in FIG. 5, the ID tag 2a is a modulation transistor Tr in the ID tag 2 of the first embodiment.
The resistor R is connected to one emitter, and the configuration of the other parts is exactly the same as that of the first embodiment, so the description thereof is omitted. The resistor R may be connected to the collector side.

The operation of the ID tag 2a during modulation will be described with reference to the waveform chart shown in FIG. The modulation control signal Sc (waveform 6− is synchronized with the clock CLK and turns on the modulation transistor Tr1 only for a half cycle every two cycles thereof.
When the modulation transistor Tr1 is driven by 1),
The potentials at the output terminals T1 and T2 of the resonance circuit 10 are the resistance R connected to the emitter of the modulation transistor Tr1.
A predetermined voltage is generated according to the magnitude of. That is, when the modulation transistor Tr1 is turned on, the current excited in the resonance circuit 10 flows out from the modulation transistor Tr1 by receiving the transmission signal S1, but the current value flowing out at this time is limited by the resistor R. Therefore, unlike the first embodiment in which the resistor R is not connected, it is not drawn to the ground level G, and the output terminals T1 and T2 of the resonance circuit 10 are not drawn.
A voltage is generated at. The voltage generated here is
The larger the resistance R, the smaller the current value flowing out from the modulation transistor Tr1.
1 approaches the value when it is in the off state, and conversely, the smaller the resistance R, the closer to the ground level G.

As a result, the output (waveform 6-2) of the output terminal T1 with respect to the ground level G is not particularly affected, and the ground level G of the output terminal T2 is not affected.
The output (waveform 6-3) is for the modulation transistor T
The amplitude is limited only when r1 is in the ON state, and the output of the resonance circuit 10 is limited in amplitude for every half cycle for every two cycles.

As described above, since the amplitude at the output terminal T2 is not pulled to the ground level G even during the modulation, the clock is generated even from the signal extracted from the side of the output terminal T2 affected by the modulation. Output terminal T2, as shown by the dotted line in the circuit diagram of FIG.
Can be configured to be supplied to the clock generation circuit 16.

Further, since the amplitude is limited only by the modulation, the output of the rectifying circuit 12 at the time of modulation (waveform 6
-5) is 3/4 or more of the output Vs at the time of non-modulation, and the power supply can be taken out more efficiently than in the first embodiment. Further, in the case of the second embodiment, the modulation transistor T
The modulation transistor Tr1 has a modulation control signal Sc (waveform 6-1, broken line) such that r1 is turned on for one cycle T.
May be driven. Because the modulation transistor T
When r1 is turned on for one cycle, the output terminal T1,
Both sides of T2 are affected by the modulation, but even if they are affected, the amplitude is not limited and the amplitude is not lost. This is because it can be generated.

In this case, not only the output of the output terminal T1 but also the output of the output terminal T2 (waveform 6-2, broken line) is influenced by the modulation and the amplitude is limited, so that the output (waveform of the resonance circuit 10 6-4, broken line), the magnitude of the modulation changes. That is, the magnitude of modulation can be adjusted by controlling the output time of the modulation control signal Sc.

Amplitude change (modulation depth) during modulation
Is too small, it is difficult to demodulate on the side receiving the signal, and conversely, if the change in amplitude is too large, the output (waveform 6-5, broken line) of the rectifier circuit 12 at the time of modulation is lowered, and power is efficiently extracted. I can't. Therefore, it is desirable to control the output time of the modulation control signal Sc from 1/2 cycle to 1 cycle, and the resistance R of the output of the rectifier circuit 12 at the time of modulation is 3 Vs of the output Vs at the time of non-modulation. It is desirable to select it so that it does not become / 4 or less.

Next, a third embodiment will be described. Figure 7
As shown in FIG. 3, the ID tag 2b of the third embodiment includes a rectifier circuit 12, a power supply circuit 14, a clock generation circuit 16, a capacitor C2, a waveform shaping circuit 18, a decoder 20, and a memory 2.
2. An IC with the control circuit 24 and the modulation circuit 26 as one chip
A resonance circuit 10 including a coil L2 and a capacitor C1, a modulation transistor Tr1, and a battery 2 for backing up the memory 22.
9 is externally attached. A small battery 29 is used.

As described above, according to the ID tag 2b of the third embodiment, most of the structure is included in the IC 30, and the number of parts is small, so that the ID tag 2b can be further downsized. Also, manufacturing becomes easy. Also,
Since the resonance circuit 10 and the modulation transistor Tr1 are externally attached and the coil L2, the capacitor C1, and the resistor R are replaceable, the resonance frequency, the modulation depth, and the like can be freely set according to the usage state. it can.

In the third embodiment, the memory 22
I am using the backup battery 29 of the
If a rewritable non-volatile memory such as a ROM is used, backup is unnecessary, and if the modulation depth setting may be fixed, the capacitor C1, the modulation transistor Tr1, and the resistors R and Rb are also incorporated in the IC. Is possible, that is, with only two parts, the coil and one IC
Since the D tag can be configured, the ID tag can be further miniaturized.

Although some embodiments of the present invention have been described above, the present invention is not limited to these embodiments and can be implemented in various modes without departing from the scope of the present invention. it can. For example, in each of the above-described embodiments, the control circuit 24 is configured to generate the response data according to the command CMD sent by the information reader 4, but the power supply Vcc and the clock are irrespective of the input of the command CMD. The response data Do may be automatically generated and output when CLK and CLK are supplied.

In the embodiment, the receiving circuit 8 of the information reader 4 is constructed so as to demodulate the response signal S2 as frequency-modulated signal. However, the direct-current voltage obtained by rectifying the response signal S2 is obtained. The signal component may be extracted from the ripple of. Further, although the moving body identification device has been described as an embodiment, it can be widely applied to other devices that exchange information in a non-contact manner, and may be used as a price reading device, for example.

[0058]

As described above, according to the transmission / reception circuit of the first aspect, the amplitude of the signal is set to the ground potential for a half cycle at a predetermined rate corresponding to the clock by operating the switching means. Thus, the modulation is performed without changing the frequency of the output of the resonance circuit.

Therefore, it is possible to generate a clock without frequency fluctuation, which is synchronized with the output of the resonance circuit, from the half-period signal component on the unmodulated side. Also, instead of changing the amplitude continuously like amplitude modulation, the amplitude is changed at a predetermined rate corresponding to the clock and for half a period. A possible voltage difference is smaller than that of amplitude modulation, and a stable power supply can be efficiently generated.

Since a stable clock and power can be supplied in this way, a highly reliable device with stable circuit operation can be constructed. The clock and power supply are generated from the output of the resonant circuit,
Since it is not necessary to independently provide an oscillation circuit for clock generation and to provide a battery as a power source, the device can be downsized.

Next, according to the transmitting / receiving circuit of the second aspect, by operating the switching means, the amplitude of the signal is changed to the ground potential for a predetermined period between a half cycle and one cycle at a predetermined rate corresponding to the clock. The modulation is performed without changing the frequency of the output of the resonance circuit by limiting it to a predetermined magnitude.

That is, since the amplitude of the signal is not held at the ground potential even if it is modulated, the clock can be extracted even by using the half-cycle signal component on the modulated side, and the design can be performed. The degree of freedom of can be increased. Further, since the amplitude is only limited at the time of modulation, the ripple of the DC voltage output from the rectifying means is smaller than that in the transmitting / receiving circuit according to claim 1, and efficient and stable power can be taken out. .

Further, the period for driving the switching means,
That is, the closer the period in which the amplitude of the output of the resonance circuit is limited to one cycle of the clock, the greater the amplitude of the signal at the time of modulation can be changed, and the detection on the receiving side of this modulated signal becomes easy. Can be

Further, according to the transmitting / receiving circuit of the third aspect, when the signal component is superimposed on the radio wave transmitted from the outside, the signal component can be extracted by the demodulating means. Moreover, since the clock generated by the clock generation circuit is synchronized with the received signal, it is possible to perform highly reliable demodulation using this clock.

[Brief description of drawings]

FIG. 1 is a block diagram illustrating a configuration of an article identification device according to a first embodiment.

FIG. 2 is a circuit diagram showing a specific configuration of a modulation circuit.

FIG. 3 is a waveform diagram illustrating an operation of each unit of the ID tag 2 when receiving a signal.

FIG. 4 is a waveform diagram illustrating an operation of each unit of the ID tag 2 at the time of response.

FIG. 5 is a block diagram showing a configuration of an ID tag 2a according to a second embodiment.

FIG. 6 is a waveform diagram illustrating the operation of each part of the ID tag 2a at the time of response.

FIG. 7 is a block diagram showing a configuration of an ID tag 2b according to a third embodiment.

[Explanation of symbols]

2, 2a, 2b ... ID tag 4 ... Information reader
6 ... Transmission circuit 8 ... Reception circuit 10 ... Resonance circuit 12 ... Rectifier circuit 14 ... Power supply circuit 16 ... Clock generation circuit 18 ... Waveform shaping circuit
20 ... Decoder 22 ... Memory 24 ... Control circuit 26 ... Modulation circuit 28 ... AND circuit 29 ... Battery

Claims (3)

[Claims] 1. A resonance circuit comprising a coil and a capacitor, which resonates with an electric wave transmitted from the outside, a clock generation means for generating a clock synchronized with the output from the resonance circuit, and an output of the resonance circuit. Using a rectification means for rectifying a DC voltage whose center potential of the output is the ground potential, a power generation means for generating a driving power source of a predetermined voltage from the output of the rectification means, and a clock generated by the clock generation means. And a modulation means for modulating the output of the resonance circuit, wherein the modulation means comprises a switching means for grounding one end of the resonance circuit in response to a predetermined drive signal, and the clock generation means for outputting. In sync with the clock
And a drive signal generating means for generating a drive signal for driving the switching means for a half cycle of the clock at a predetermined rate corresponding to the clock. 2. A resistance element serially connected to the switching means, and the drive signal generating means is synchronized with a clock output from the clock generating means at a predetermined rate corresponding to the clock. The transmission / reception circuit according to claim 1, wherein the switching means is driven for a predetermined period between a half cycle and one cycle of the clock. 3. From the change of the output level of the rectifying means,
The transmission / reception circuit according to claim 1 or 2, further comprising demodulation means for extracting and demodulating a signal component included in the radio wave.