JPH0721633A - Digital signal reproducing device - Google Patents

Abstract

PURPOSE:To obtain a digital signal reproducing device capable of fixing a phase of a head scanning and a data frame on a tape. CONSTITUTION:When the reproduction is performed at a tape speed different from one at the time of recording, an ID information included in the reproduced signal is detected by an ID detecting circuit 12. A sampling pulse is generated by a pulse generating circuit 16 at the specific position in the data frame in accordance with the detected ID information. A tracking error signal is produced by a tracking error detecting circuit 13 from a pilot signal included in the reproduced signal. The tracking error signal is sampled by a sampling circuit 14 according to the sampling pulse. The running of tape is adjusted by a tracking control circuit 15 in accordance with the sampled tracking error signal. By this procedure, the selective read-out of the specific area in the frame is attained when the reproduction is performed at the tape speed different from the one at the time of recording.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a digital signal reproducing apparatus for recording and reproducing information such as digitized image, voice and data on a tape.

[0002]

2. Description of the Related Art A device for recording and reproducing a video signal as an oblique track on a tape is a VHS-VTR or an 8 mm VTR.
It is widely used in consumer fields such as. In general, these devices are provided with a high-speed playback mode in which the tape is fed at a higher speed than that at the time of recording in order to confirm the recorded contents and quickly search for a desired scene. In such a case, the head mounted on the rotating cylinder draws a locus that traverses the track on the tape.Therefore, the playback signal is lost at the part where the head is applied to the reverse azimuth track, and Shows a noise bar. To make it easier to see the playback screen by fixing this noise bar on the screen or by driving it into the vertical blanking period,
The phase relationship between the head scanning locus and the track is fixed (phase locked).

For example, in a VHS-VTR, a control signal for tracking is recorded on a linear track, and this is locked at an appropriate phase during high speed reproduction.

In the case of the 8 mm VTR, the tracking error signal is detected by using the pilot signal recorded on the track by frequency multiplexing with the video signal, and tracking is performed by this, so that the VHS-VTR is used.
Control signals such as are not recorded. Therefore, at the time of high speed reproduction, a method of sampling the tracking error signal at a timing synchronized with the rotation of the cylinder and adjusting the tape running so that the tracking error signal becomes 0 at that timing is adopted (for example, Japanese Patent Laid-Open No. 57-57).
-202185, etc.).

On the other hand, a digital tape recorder (digital VT) for reproducing a digitized video signal or the like.
The digital signal recording / reproducing apparatus such as R) has been put to practical use for business because it does not deteriorate the recording / reproducing video signal due to dubbing as compared with the analog recording / reproducing apparatus. However, the digitized video information has a large amount of information, and there is a drawback that a large amount of tape is consumed in recording and reproducing the information. Therefore, for home use,
A method of recording / reproducing by compressing information / bandwidth of a video signal by predictive coding, DCT (discrete cosine transform) conversion coding, variable length coding, or the like has been studied.
IEEE Transactions on Consumer Electronics, Vol.34, N
o.3, pp.597-604, AUGUST 1988, etc.).

[0006]

DISCLOSURE OF THE INVENTION Problems to be Solved by the Invention
In the high-speed playback method, the phase lock is performed by the control timing of the linear track and the sampling timing synchronized with the rotation of the cylinder. Therefore, this phase lock is performed irrespective of variations in track position (variations in cylinder rotation position detection, track recording start timing, track height deviation, etc.) and variations in control head deck position. As a result, there is a problem that the lock phase of the head scanning locus viewed from above the track is affected by these variations and deviates from the target position.

Further, in a digital VTR, due to the large amount of recorded information, a video signal of one frame is often divided into a plurality of tracks for recording. At this time, if a control signal synchronized with the frame is written, the same problem as described above occurs. Also, when the pilot signal is recorded on the track and the phase is locked by this, if the circulation cycle of the pilot signal frequency (tracking pull-in position cycle) that changes for each track does not match the frame or an integral multiple of the frame, the frame There is also the problem that phase lock cannot be performed in a form synchronized with.

In view of the above-mentioned problems, the present invention provides a predetermined position of information, for example, a desired position of a data frame, at the time of special reproduction.
It is an object of the present invention to provide a digital signal reproducing device capable of accurately fixing a scanning locus.

[0009]

In order to solve the above-mentioned problems, a digital recording / reproducing apparatus of the present invention comprises a cylinder on which a tape, on which a digital signal is recorded in oblique tracks on the tape, runs in its longitudinal direction and rotates. Is a digital signal reproducing device in which the tape is scanned by the head and the tracking control means operates based on the reproduction signal from the head to fix the phases of the head scanning and the track, and digital information of a predetermined length. With a signal as one data frame, the digital information signal of one data frame is divided and recorded on the tape in N tracks, and the digital information signal of one track is further divided into M sync blocks (where M and N are positive). Integer), each sync block on the tape has an ID that includes the track number and sync block number.
Information is recorded together with the digital information signal, and a reproduction position detecting means for detecting the ID information from the reproduction signal is provided,
When reproducing at a tape speed less than or equal to -1 times the tape speed at the time of recording or more than twice the tape speed at the time of recording, the tracking control means operates based on the output of the reproduction position detecting means, and the phase between the head scan and the data frame. Is fixed.

Further, according to the present invention, a tape in which a pilot signal and a digital signal are recorded on diagonal tracks on the tape is run in the longitudinal direction, the tape is scanned by a head on a rotating cylinder, and the tape from the head is scanned. A digital signal reproducing apparatus in which a tracking control means operates based on a pilot signal included in a reproduced signal to fix the phases of head scanning and tracks, and a digital information signal of a predetermined length is set as one data frame. The digital information signal of the data frame is divided and recorded in N tracks on the tape, and the digital information signal of one track is further divided into M sync blocks (where M and N are positive integers), and each sync on the tape is recorded. ID information including a data frame number, a track number, and a sync block number is stored in the block. A reproduction position detecting means for detecting the ID information contained in the reproduction signal, which is recorded together with the audio signal and the digital information signal, and a timing for reproducing the target sync block in the data frame from the output of the reproduction position detecting means. Sample pulse generating means for outputting a sample pulse based on the above, tracking error detecting means for detecting a relative positional deviation between the head and the track from a pilot signal included in the reproduction signal, and outputting a tracking miscalculation signal corresponding thereto, and the sample pulse A sampling means for sampling the tracking error signal according to the above, and when reproducing at a tape speed less than or equal to -1 times the tape speed during recording,
The tracking control means operates based on the tracking error signal sampled by the sampling means to fix the phases of the head scan and the data frame.

Further, according to the present invention, a tape in which a pilot signal and a digital signal are recorded on oblique tracks on the tape is run in the longitudinal direction thereof, and the tape is scanned by a head on a rotating cylinder, and the tape from the head is scanned. A digital signal reproducing apparatus in which a tracking control means operates based on a pilot signal included in a reproduced signal to fix the phases of head scanning and tracks, and a digital information signal of a predetermined length is set as one data frame. The digital information signal of the data frame is divided and recorded in N tracks on the tape, and the digital information signal of one track is further divided into M sync blocks (here, M, N
Is a positive integer), ID information including a track number and a sync block number is recorded in each sync block on the tape together with a pilot signal and a digital information signal, and reproduction position detection is performed to detect the ID information included in the reproduction signal. Means, a timed pulse generating means for generating a sample pulse at a timing based on the rotation of the cylinder, a relative positional deviation between the head and the track is detected from a pilot signal included in the reproduction signal, and a tracking miscalculation signal corresponding to the deviation is output. Tracking error detecting means, sampling means for sampling the tracking error signal by the sample pulse, and pulse generating means for reproducing the target sync block in the data frame according to the output of the reproducing position detecting means. Sample pulse generation timing A timing correction means for correcting, and when reproducing at a tape speed less than or equal to -1 times the tape speed at the time of recording or more than twice the tape speed at the time of recording, the sample pulse is sampled by the sampling means by the sample pulse whose timing is corrected by the timing correction means. The tracking control means operates based on the tracking error signal thus generated to fix the phases of the head scan and the data frame.

[0012]

According to the present invention, since the tracking control is performed on the basis of the ID information detected from the reproduction signal by the reproduction position detecting means according to the above-described structure, the tape on the tape is reproduced when the tape is reproduced at an integer multiple tape speed different from that at the time of recording. It is possible to fix the phases of the data frame and the scanning locus without being affected by the track position deviation and the like.

[0013]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A digital signal reproducing apparatus according to an embodiment of the present invention will be described below with reference to the drawings.

FIG. 1 is a block diagram showing an example of the configuration of a digital VTR according to the present invention. In FIG. 1, 1 is a magnetic tape (tape), 2 is a cylinder, 3a and 3b are magnetic heads (heads) having different azimuths, 5 is a capstan, 4 is a capstan motor, 6 is a pinch roller, and 7 is a rotation. A speed detector, 8 is a capstan drive circuit, 9 is a cylinder control circuit, 10 is a reproduction amplifier, 11 is a demodulation circuit, 12 is an ID detection circuit (corresponding to reproduction position detection means), 13 is a tracking error detection circuit, and 14 is A sample circuit, 15 is a tracking control circuit, and 16 is a pulse generation circuit. Further, the tracking control circuit 15, the capstan drive circuit 8, the capstan motor 4, the capstan 5, the pinch roller 6, and the speed detector 7 constitute a tracking control means. The operation of the digital VTR thus configured will be described with reference to FIG.

FIG. 2A is a schematic diagram showing a track recording pattern of the tape 1. In this example, the video signal is subjected to information compression in units of 10 frames and recorded as one data frame. Of these, 9 frames are subjected to inter-frame compression, the remaining 1 frame is subjected to intra-frame compression, subjected to necessary modulation, and then dividedly recorded on the tape into 10 tracks. FIG. 2 shows two of these data frames. Actually, each track is recorded on the tape 1 with a larger inclination, but here, it is drawn with a slight inclination in order to match the explanation of the time series. The number string circulating 0 to 9 shown at the upper end of the tape indicates the track number in the data frame. Head 3a is for even track numbers, and head 3b is for odd tracks.
, And the azimuths match.

FIG. 3 shows the data structure in each track. Each track is divided into small blocks called sync blocks as shown in FIG. In each sync block, as shown in FIG. 3B, a sync pattern for detecting the start end of the sync block is recorded at the beginning thereof, and subsequently, the sync block address information I
Parity for detecting errors in D information and ID information,
Then, digital video signal data is recorded. Of these, the ID information part is composed of a data frame number, a track number, and a sync block number, as shown in FIG.

F shown at the lower end of the tape 1 in FIG. 2 (a)
The symbols 0, f1, f0, and f2 indicate the types of pilot signals for tracking control. The pilot signals of f1 and f2 have relatively different frequencies, are separable from the digital information signal, and are relatively low frequencies that are not easily affected by azimuth loss. Further, no pilot signal is recorded on the f0 track. Further, each pilot signal is recorded over the entire track by frequency multiplexing with the digital video signal.

In normal reproduction (1 × speed reproduction), f0
When the head 3a reproduces a track (track number is an even number), the deviation between the head and the track is detected by comparing the magnitudes of the pilot signals f1 and f2 from the adjacent tracks which leak into the reproduction signal. The tracking control is performed by adjusting the tape running speed by using the tape, but the details are omitted here.

An operation when a speed different from that at the time of recording, for example, high speed reproduction is performed will be described. The cylinder 2 is controlled to rotate at a predetermined rotation speed by the cylinder control circuit 9. At this time, the cylinder control circuit detects the rotational position of the cylinder and outputs a head switching signal (hereinafter, referred to as HSW signal) 106 which is a signal for identifying which head is in contact with the tape. Tape 1 is 180 cylinders
It is wrapped around many times. The tape 1 is also sandwiched between the capstan 5 and the pinch roller 6 and travels in its longitudinal direction by the rotation of the capstan motor 4. The rotation of the capstan motor 4 is controlled by the tracking control circuit 15 through the capstan drive circuit 8. The heads 3a and 3b mounted on the cylinder 2 scan the tape in a trajectory determined by the cylinder rotation and the tape running speed. Assuming that the tape runs at a speed five times faster than normal playback, the scanning locus is shown in FIG. 3 (a).
At the tape 1, it becomes like the arrow shown by the solid line and the broken line. Of these, the solid line is the head 3a, and the broken line is the head 3b.
Shows the locus of.

While crossing the tracks one after another,
The reproduction signal obtained from each head is the reproduction amplifier 1
At 0, the head is switched by the HSW signal 106, amplified, and then supplied to the demodulation circuit 11, the ID detection circuit 12, and the tracking error detection circuit 13. Demodulation circuit 11
In the normal reproduction, the reproduction signals sequentially obtained from all tracks are demodulated and expanded to completely restore the recorded video signal and output it as the reproduced video signal 106. However, in the high-speed reproduction state, since the head reproduces across the tracks, only the limited area before and after the point where the track center of the track where the head scanning locus and azimuth coincide with the head scanning locus can be reproduced. The hatched area in FIG. 2A is an example. The demodulation circuit 11 forms a screen based on the partial information obtained even in such a state and outputs it.

When the compressed data is decompressed, it is necessary to prepare all the data for the unit at the time of compression. In this embodiment, the data of one video frame subjected to the intraframe compression has a smaller compression unit than the data of the other nine frames. Therefore, if the sync block in which the data of one video frame compressed in the frame is stored is selectively reproduced, the image can be efficiently reproduced at the time of high speed reproduction.

In another example, the video signal is divided into a low frequency component and a high frequency component and recorded in different sync blocks. Then, at the time of high speed reproduction, the image can be efficiently reproduced by selectively reproducing the sync block in which the low frequency component is recorded.

As described above, in the digital signal reproducing apparatus, it is often required to selectively reproduce a specific portion of the recorded data on the tape during high speed reproduction. That is, it is necessary to lock the phase relationship between the head locus and the print data. This phase lock operation will be described below.

The tracking error detecting means 13 is constructed, for example, as shown in FIG. The reproduced signal 101 is converted into a pilot signal f by the bandpass filters 21 and 22, respectively.
1, f2 components are extracted, and envelope detectors 23, 24
Each amplitude is detected by. And the difference circuit 2
The difference in amplitude (f1-f2) is calculated by 5 and output as the tracking error signal 104.

Tracking error signal 104 during high speed reproduction
In the case of the scanning locus of FIG. 2A, it becomes as shown in FIG. Although the tracking error signal can be obtained even during the reproducing period of the head 3b, it is not used here, and is shown by a broken line. Now, the position of the sync block to be reproduced is shown in FIG.
Shall be in the hatched position. FIG. 2 shows a state in which the scanning locus coincides with this sync block. At this time, the tracking error signal becomes 0 at the timing when this sync block is reproduced. Therefore,
On the contrary, by controlling the tape running so that the tracking error signal at this timing becomes 0, the scanning locus can always be fixed on this sync block as shown in FIG.

The ID detection circuit 12 and the pulse generation circuit 16 detect the timing at which the tracking error signal should be zero. The ID detection circuit 12 detects the ID portion included in each sync block of the reproduced signal. Although a specific configuration is omitted, for example, the reproduced signal 101 is subjected to waveform equalization, binarization, timing reproduction by a PLL (Phase Lock Loop), and the like to obtain a digital data string, and then shown in FIG. The synchronization pattern shown is detected, and the ID part following this is extracted. Further, the parity is used to detect an error in the ID section, and only ID information having no error is output.

The pulse generation circuit 16 inputs the track number / sync block number 103 of the ID information and detects the ID of the sync block to be reproduced, in this case, the sync block at the position shown in FIG. 2A. Then, the sample pulse 110 is output. An example of the sample pulse 110 is shown in FIG.

Here, there may be a case where a plurality of sync blocks to be actually reproduced continuously exist. For example, if one track consists of 100 sync blocks,
The hatched area in FIG. 2A includes several to several dozen sync blocks. In such a case, the target scanning locus may be selected so as to intersect at the center position of these sync blocks, and the sync block at the position where the scanning locus intersects the track center may be detected. Alternatively, similarly, the scanning locus is selected, one or more of the IDs of the plurality of sync blocks are detected, and the sample pulse 110 is output at the timing when the scanning locus will intersect the track center. May be.

The sample circuit 14 uses the sample pulse 110.
And the tracking error signal 104 are input, and the tracking error signal at the timing given the sample pulse is sampled and held and output.

The tracking control circuit 15 controls the rotation of the capstan so that the sampled tracking error signal 105 becomes zero. By the way, when the phase relationship between the scanning locus of the head and the track pattern on the tape is in the vicinity of the ideal state shown in FIG. 2A, control can be performed by the method described up to this point, but it is largely deviated. In this case, for example, when the scanning loci of the heads 3a and 3b are interchanged, the target sync block is not reproduced, so that the ID is not detected and therefore the sample pulse is not generated, so that the tracking control circuit operates. Fall into a vicious circle of being unable to. Therefore, it is necessary to take measures to pull tracking in from such a state.

FIG. 5 shows a configuration example of the tracking control circuit in consideration of pull-in. In FIG. 5, 31, 32
Is a D flip-flop, 33 is a latch, 34 and 35 are change-over switches, 36 is a polarity inverting circuit (-1 time amplifier),
37 is a voltage source, 38 is a frequency comparator, 39 is a reference signal generating circuit, 40 is an adder, and 41 is a filter.

First, the operation of the portion 42 surrounded by the broken line will be described with reference to FIG. In FIG. 6, signals corresponding to the connections in FIG. 5 are assigned the same reference numerals. This circuit is a circuit that determines whether or not the target ID has been detected in each scan of the head 3a. Now, while the head 3a is scanning the tape, the cylinder control circuit 9 outputs the HSW signal 106 as "
H "(high level) is output. The D flip-flop 31 receives the D input" H "at the rising edge of the HSW signal.
Capture and output. When the sample pulse 110 is applied during the scanning period as in the first cycle of HSW in FIG. 6, the D flip-flop 31 is reset at that time.
However, it is not reset unless the sample pulse 110 is applied as in the second cycle,
The output of the D flip-flop 31 remains "H".
Therefore, at the falling edge of the HSW signal 106, the output 111 of the D flip-flop 31 is latched by the D flip-flop 32 at the next stage, so that a signal corresponding to the presence or absence of the sample pulse is obtained at the output 112 in each scanning period. .

On the other hand, the sampled tracking error signal 105 is subjected to polarity inversion by the polarity inversion circuit 36, and the switch 34 selects inversion or non-inversion. In FIG. 2, it can be seen that the sample error pulse positions in the even-numbered frames and those in the odd-numbered frames have opposite inclinations in the tracking error signal. That is, the tracking error when the scanning locus deviates in a certain direction is opposite between the even frame and the odd frame. This is the number of tracks that make up a frame and one cycle of the tracking pilot frequency that changes for each track (here, f0, f1, f0, f
(4 tracks of 2) is not an integral multiple. In order to keep the polarity of the error signal used for control constant, it is necessary to switch between inversion and non-inversion of the polarity depending on whether the sampled tracking error signal frame is even or odd. The ID detection circuit 1 is connected to the D input of the latch 33.
The least significant bit of the frame number from 2, that is, the frame even / odd signal 108 is input. When the desired ID is detected and a sample pulse 110 is applied to the E input, the latch captures the D input level and holds the output until the next sample pulse is applied. The switch 34 operates according to the output 117, and the tracking error signal 113 after switching has a constant polarity.

Next, in the switch 35, the tracking error signal 13 is switched to the reference voltage 37 according to the output 112 of the judgment circuit 42. During the period in which the sample pulse is given for each scan, the signal 112 becomes "L" and the switch 35 selects the tracking error signal 113 side. The output 114 of the switch 35 is supplied to the adder 40. On the other hand, from the speed detector 7 of the capstan motor 4, the FG signal 1 having a frequency according to the rotation speed of the capstan 5
07 is given. The frequency comparator 38 compares the frequency of the FG signal 107 with the reference signal supplied from the reference signal generating circuit 39, and outputs a speed error signal 115 corresponding to the deviation of the rotational speed of the capstan motor from the target. Speed error signal 115 and tracking error signal 114
Are added by an adder 40, and after being subjected to frequency compensation such as integral compensation in a filter 41, they are sent to a capstan drive circuit 8 as a capstan drive signal 109.
In this way, the tape running is adjusted so that the tracking error signal becomes zero.

When the head scanning position is largely deviated from the state of FIG. 2A and the sample pulse 110 cannot be obtained,
The switch 35 selects the reference voltage side. The reference voltage is added to the speed error signal 115 by the adder 40, and the tape running is adjusted so that the added signal 116 becomes zero.
In this case, since the signal 114 maintains a constant value, the speed error signal is offset in the opposite direction in terms of direct current, so that the added signal becomes 0 and is balanced. That is, the tape running is controlled to a speed deviated by an amount corresponding to the reference voltage. Therefore, by selecting this reference voltage so that the tape speed in the high-speed reproduction state deviates from the target tape speed by a small amount, for example, about several percent, head scanning gradually shifts its phase with respect to the frame. Eventually, the scanning locus reaches the vicinity of the phase shown in FIG. 2A, so that the sample pulse can be obtained. As a result, the switch 35 is switched to pull in the tracking, and the scanning locus is locked in the desired phase. By the above operation, even if the scanning locus is largely deviated from the target locus, it is possible to smoothly perform the phase pull-in without falling into a vicious circle.

As described above, according to the present embodiment, when reproducing is performed at a tape speed different from that at the time of recording, the ID information included in the reproduction signal is detected and the identification within the frame is performed based on the detected ID information. Since the sample pulse is generated at the position and the tape running is adjusted based on the tracking error signal sampled by the sample pulse, the head scanning locus can be accurately fixed to a specific phase on the tape.

Next, another embodiment of the present invention will be described. FIG. 7 is a block diagram showing a second configuration example of the digital VTR according to the present invention. In FIG. 7, elements other than the timed pulse generation circuit 17, the timing correction circuit 18, and the tracking control circuit 15 have the same configuration and operation as those of the embodiment shown in FIG.

The tape 1 is rotated by a capstan drive circuit 8 and the capstan 5 rotates the tape 1 to about 5 during normal reproduction.
It runs at twice the tape speed. Therefore, the angular relationship between the head scanning locus and the track is the same as in FIG. The arrangement of pilot signals and the data structure in the track are the same as those in FIGS. The cylinder 2 is controlled to rotate at a predetermined rotation speed by the cylinder control circuit 9. Heads 3a, 3b
After being amplified by the reproduction amplifier 10 and the head is switched, the output is input to the demodulation circuit 11, the ID detection circuit 12, and the tracking error detection circuit 13. The demodulation circuit 11 demodulates a reproduction signal obtained intermittently and outputs a reproduction video signal 102. The ID detection circuit 12 detects and outputs the ID portion in each sync block of the reproduced signal. The tracking error detection circuit 13 outputs a tracking error signal 104 corresponding to the deviation between the head and the track based on the pilot signal amplitude included in the reproduction signal.

The present embodiment differs greatly from the embodiment shown in FIG. 1 in that the sampling timing in the sampling circuit 14 is always synchronized with the HSW signal, and that timing is the reproduced signal. The point is that the scanning locus is finally corrected to the target phase by performing correction based on the detected ID information. These operations will be described.

FIG. 8 shows the configurations of the timed pulse generation circuit 17, the sampling circuit 14, the timing correction circuit 18, and the tracking control circuit 15.

In FIG. 8, the HSW signal 106 is supplied to the timing circuit 51, the microcomputer 52, and the timed pulse generation circuit 17. The timed pulse generation circuit 17 has an HS
The sample pulse 122 is output after a time corresponding to the timing data 121 given from the microcomputer 52 from the rising edge of the W signal. The timing data 121 includes the microprocessor 52 and the timing circuit 51.
Are created from the track number / sync block number 103 and the HSW signal, and the method will be described later. The sampling circuit 14 outputs the sample pulse 122
Is given, the tracking error signal 104 is sampled and held and output. The sampled tracking error signal 105 is supplied to the adder 40 after the polarity is switched by the inverting circuit 36 and the selector switch 34 so as to keep the control polarity constant according to the switching signal 135.
Thereafter, the speed error signal 115 is created by the frequency comparator 38 and the reference signal generator 39, is added to the tracking error signal 113 by the adder 40, and is supplied to the capstan drive circuit 41 through the filter circuit 41. Is similar to the example. As a result, the tape running is adjusted so that the tracking error signal 105 sampled one after another at the sampling timing in the sampling circuit becomes zero.

Next, the timing data is created, that is,
The operation of correcting the sample timing will be described.
The clock circuit 51 is a counter that inputs the HSW signal 106, is reset at this rising edge, and then counts up at a fixed time interval. The counter contents, that is, the elapsed time from the rising edge of the HSW signal. Is output to the microprocessor 51.

FIG. 9 is a flow chart showing an outline of the program of the microprocessor 52. In FIG. 9, x,
y, f_det are built-in memories, X, Y, Z, HSW are input / output ports, y0, IDn, ymax1, ymax
2, Δy is a constant. The operation of the program is as follows.

First, in step 61, the memory and port are initialized. y0 is HS when the head scanning locus is in the target phase, that is, in the state shown in FIG.
Time data corresponding to the time interval from the rising edge of the W signal (d) to the ideal sample pulse position of (b) is output to Y. The value of Y is the signal line 12
2 is supplied to the timed pulse generation circuit 17 through FIG.
A sample pulse is generated at the position of (b). In the initial state, the tracking control operates so that the tracking error signal 105 becomes 0 at this timing. Step 75
Then wait for the time corresponding to the response time of tracking control. During this time, tracking pull-in is performed.

In step 62, the HSW rising edge is detected. In step 63, the ID detection flag f_det is cleared. In step 64, the value of the input port Z, that is, the track number / sync block number being reproduced is compared with a predetermined value. The predetermined value is a value corresponding to the target sync block shown by hatching in FIG. If they match, it means that the target sync block could be played. Therefore, in step 70, the elapsed time data 131 from the clock circuit at this time is input from the input port X and stored in the memory x. Then, in step 71, the detection flag f_det is set, and the process proceeds to step 65. If they do not match, or if they have not been detected, the process proceeds to step 65 without doing anything. In step 65, when the falling edge of the HSW signal is detected, the process proceeds to the next step, and otherwise returns to step 64. That is, steps 64, 70, 71 and 65 are repeatedly executed while the HSW signal is at the "H" level.

When the falling edge of the HSW signal is detected, the process proceeds to step 66. Here, if the value of f_det is 1,
That is, the "H" period of the HSW signal (the previous head 3a
If IDn is detected during the scanning period), the elapsed time data x is moved to y in step 67. Then step 6
By outputting y to the output port Y at 8, the sample timing is corrected from the initial value y0 to the timing at which IDn is detected. Here, it is assumed that the elapsed time data 131 obtained from the time counting circuit 51 and the time data 121 supplied to the timed pulse generation circuit 17 are in the same unit. As a result, the scanning locus phase determined from the initial timing based on the HSW is corrected to an accurate phase in consideration of error factors such as track position deviation.

If f_det is 0 in step 66, it means that IDn was not detected in the immediately preceding scanning period. This is because the actual scanning locus in FIG. 2 is different from that shown. y0
The phase of the scanning locus such that the tracking error signal becomes 0 at the timing of is not limited to that shown in the figure, and exists every two tracks except for the control polarity. Therefore, when the tracking control is first pulled in at step 75, it is not known to which phase the tracking control is pulled. Therefore, when the phase is shifted to the shifted phase, it is necessary to correct the lock phase up to the target phase. This processing is performed in steps 72, 73 and 74.

Although various methods can be considered concretely, here, a method of gradually shifting the lock phase by moving the sample timing is adopted. Step 72
The value of y is increased by Δy. Δy is time width data for shifting the sample timing for each rotation of the cylinder, and this is selected in accordance with the response time of the tracking control system so that the movement can be performed quickly within a range in which control can follow. Next, at step 73, y is compared with ymax. ymax1 is time data corresponding to one scanning period. When y increases with each cylinder rotation in step 72, the sample timing eventually deviates from the scanning period. Therefore, in order to prevent this, the sample timing is slightly returned by subtracting ymax2 from y. However, in order to prevent the head scanning phase from returning to the original state, the amount of time to be returned is set to a circulation period of the pilot signal frequency that changes for each track, that is, a value equivalent to the time when the head crosses four tracks. In this example, the head traverses four tracks in one scanning period, so ymax2 is one scanning period. That is, ymax2 = ymax1. By selecting in this way, even if the sample timing changes discontinuously, the tracking error signal value is the same, so the head scanning locus can be continuously shifted. Finally, in step 68, the value of y set in step 67 or 74 is output to the output port Y to send time data to the pulse generation circuit 121.

As a result of the above processing, the head scanning locus moves little by little with each cylinder rotation, and when it finally reaches the vicinity of the target phase, IDn is detected and steps 70 and 7 are executed.
The sample timing is corrected by 1 and 67, and the target scanning locus phase is accurately controlled.

Step 69 is not the processing by the timing correction circuit 18 described above, but the processing by the tracking control circuit 15. That is, this process is necessary because the number of tracks per data frame (10 in this case) and the cyclic period of the pilot signal frequency (4 in this case) are not in an integral multiple relationship. That is,
The polarity of the sampled tracking error signal 105, which is inverted every data frame, is made constant for use in control. The polarity of the output port value P is reversed every cylinder rotation. In this embodiment, the tape advances by one data frame with one rotation of the cylinder and two scans of the head, so that the polarity of the tracking error signal is inverted in accordance with this inversion, whereby polarity matching is performed. Specifically, the output signal 133 is supplied to the changeover switch 34 after being timed to the sample timing by the D flip-flop 53, and switches the polarity of the tracking error signal between inversion and non-inversion. After this, the process returns to step 62 again, and the same processing is repeated thereafter.

As described above, according to the present embodiment, when the reproduction is performed at the tape speed different from that at the time of recording, the ID information contained in the reproduction signal is detected and the sample pulse is synchronized with the rotation of the cylinder. And the tape running is adjusted based on the tracking error signal sampled by the sample pulse, while the sample timing is corrected based on the detected ID information, the head scanning locus is accurate to a specific phase on the tape. Can be fixed to.

In this embodiment, one data frame is one.
The case where the tape speed is divided into 0 tracks and the tape speed is 5 × has been described. However, the present invention is not limited to this, and the same applies when the phase relationship between the head scan and the data frame can be fixed, that is, in the case of integer multiple speed reproduction other than 1 × speed. Can be applied to.

Further, the sample pulse is shown only once in one scanning, but if the target scanning locus crosses the same azimuth track, it is possible to further increase the number of sample pulses. If the polarity of the sampled value is taken into consideration, it is possible to make an obvious extension, which can improve the phase lock accuracy. Further, since the ID detection and the tracking error signal can be detected from the reproduction signal of the head 3b which is not used in the embodiment,
Similarly, a sample pulse may be generated.

Further, the tracking control means is shown by means of tape speed adjustment using a capstan, but the head is directly driven to perform tracking adjustment (D
TF).

The constituent elements in the first and second embodiments may be realized in any method as long as the equivalent functions can be realized. For example, the tracking control circuit 15 is mainly composed of hardware in the embodiment, but a similar function can be realized by software. Conversely, it is also possible to configure the timing correction circuit by hardware logic instead of software. The same applies to other elements.

[0056]

As described above, in the digital signal reproducing apparatus of the present invention, the tape on which the digital signal is recorded on the diagonal track is run in the longitudinal direction thereof, and the tape is moved by the head on the rotating cylinder. A digital signal reproducing apparatus which scans and a tracking control means operates based on a reproduction signal from a head to fix the phases of head scanning and a track, wherein a digital information signal of a predetermined length is set as one data frame. A digital information signal of one data frame is divided and recorded on the tape in N tracks, and the digital information signal of one track is further divided into M sync blocks (where M and N are positive integers), Each sync block has a track number,
ID information including a sync block number is recorded together with a digital information signal, and a reproduction position detecting means for detecting the ID information from the reproduction signal is provided, and the tape speed at the time of recording-
Since the tracking control means operates so as to fix the phase between the head scan and the data frame on the basis of the output of the reproduction position detecting means when reproducing at a tape speed of 1 × speed or less or 2 × speed or more. The phase of the scan and the data frame recorded on the tape can be fixed. As a result, it becomes possible to selectively read out a specific area in the data frame.

Further, in the digital signal reproducing apparatus of the present invention, the tape in which the pilot signal and the digital signal are recorded on the diagonal track on the tape is run in the longitudinal direction, and the tape is scanned by the head on the rotating cylinder. Then, the tracking control means operates based on the pilot signal included in the reproduction signal from the head to fix the phase between the head scanning and the track, and a digital information signal of a predetermined length is generated. 1
As a data frame, a digital information signal of one data frame is divided and recorded on the tape in N tracks.
A track digital information signal is divided into M sync blocks (where M and N are positive integers), and ID information including a data frame number, a track number, and a sync block number is piloted in each sync block on the tape. A reproduction position detecting means for detecting the ID information contained in the reproduction signal, which is recorded together with the signal and the digital information signal, and the timing at which the target sync block in the data frame is reproduced from the output of the reproduction position detecting means. Sample pulse generating means for outputting a sample pulse as a result, tracking error detecting means for detecting a relative positional deviation between the head and the track from the pilot signal included in the reproduction signal, and outputting a tracking miscalculation signal corresponding thereto, and the sample pulse Sampling the tracking error signal And a sampling means, wherein the tracking control means performs head scanning based on the tracking error signal sampled by the sampling means when reproducing at a tape speed less than or equal to -1 times the tape speed during recording or more than twice the tape speed during recording. Since it operates so as to fix the phase between the data frame and the data frame, the phase between the head scanning and the data frame recorded on the tape can be accurately fixed. As a result, it becomes possible to selectively read out a specific area in the data frame.

Further, in the digital signal reproducing apparatus of the present invention, the tape on which the pilot signal and the digital signal are recorded on the oblique track on the tape is run in the longitudinal direction thereof, and the tape is scanned by the head on the rotating cylinder. Then, the tracking control means operates based on the pilot signal included in the reproduction signal from the head to fix the phase between the head scanning and the track, and a digital information signal of a predetermined length is generated. 1
As a data frame, a digital information signal of one data frame is divided and recorded on the tape in N tracks.
A track digital information signal is divided into M sync blocks (where M and N are positive integers), and each sync block on the tape has ID information including a track number and a sync block number as a pilot signal and digital information. The ID recorded with the signal and included in the reproduction signal
A reproducing position detecting means for detecting information, a timed pulse generating means for generating a sample pulse at a timing based on the rotation of the cylinder, and a relative positional deviation between the head and the track are detected from a pilot signal included in the reproducing signal. A tracking error detecting means for outputting a tracking error calculation signal in accordance with the sampling error, a sampling means for sampling the tracking error signal by the sample pulse, and a target sync block in the data frame is reproduced according to the output of the reproducing position detecting means. Timing correction means for correcting the sample pulse generation timing of the pulse generation means, the timing correction means is used when reproducing at a tape speed less than or equal to -1 times the tape speed at the time of recording or more than twice the tape speed at the time of recording. Timing-corrected sump The tracking control means operates based on the tracking error signal sampled by the sampling means by the pulse and operates so as to fix the phases of the head scan and the data frame. Therefore, the head scan and the data recorded on the tape are recorded. The phase with the frame can be fixed accurately. As a result, it becomes possible to selectively read out a specific area in the data frame.

In particular, a digital signal of one data frame is a digitized and compressed video signal L frame (L
Is a positive integer, preferably 5 to 15), the screen image quality during high-speed reproduction can be significantly improved.

[Brief description of drawings]

FIG. 1 is a block diagram of a digital signal reproducing apparatus according to a first embodiment of the present invention.

FIG. 2 is a diagram for explaining the operation of the embodiment of the present invention.

FIG. 3 is a configuration diagram of track data according to an embodiment of the present invention.

FIG. 4 is a circuit diagram showing an example of a tracking error detection circuit.

FIG. 5 is a circuit diagram showing an example of a tracking control circuit.

FIG. 6 is a signal waveform diagram of the tracking control circuit.

FIG. 7 is a block diagram of a digital signal reproducing device according to a second embodiment of the present invention.

FIG. 8 is a timing correction circuit, a tracking control circuit,
Block diagram of sample circuit and timed pulse generator

FIG. 9 is a flowchart illustrating operations of part of a timing correction circuit and a tracking control circuit.

[Explanation of symbols]

 1 Tape 2 Cylinder 3a, 3b Head 4 Capstan Motor 5 Capstan 6 Pinch Roller 7 Speed Detector 8 Capstan Drive Circuit 12 ID Detection Circuit 13 Tracking Error Detection Circuit 14 Sample Circuit 15 Tracking Control Circuit 16 Pulse Generation Circuit 17 Timed Pulse Generation circuit 18 Timing correction circuit

Claims (4)

[Claims] 1. A tape on which a digital signal is recorded on an oblique track on the tape is run in its longitudinal direction, the tape is scanned by a head on a rotating cylinder, and tracking control means is performed based on a reproduction signal from the head. Is a digital signal reproducing apparatus for fixing the phases of the head scanning and the tracks by using a digital information signal of a predetermined length as one data frame, and the digital information signal of one data frame is N tracks on the tape. , The digital information signal of one track is further divided into M sync blocks (where M and N are positive integers), and each sync block on the tape has a track number,
ID information including a sync block number is recorded together with a digital information signal, and a reproduction position detecting means for detecting the ID information from the reproduction signal is provided, and the tape speed at the time of recording-
When reproducing at a tape speed of 1 × speed or less or 2 × speed or more, the tracking control means operates based on the output of the reproduction position detecting means to fix the phases of the head scan and the data frame. Digital signal reproducing device. 2. A tape in which a pilot signal and a digital signal are recorded on diagonal tracks on the tape is run in the longitudinal direction, the tape is scanned by a head on a rotating cylinder, and is included in a reproduction signal from the head. A digital signal reproducing apparatus in which a tracking control means operates based on a pilot signal to fix the phases of a head scan and a track, wherein a digital information signal of a predetermined length is used as one data frame and a digital data frame of one data frame is used. The information signal is divided and recorded on the tape in N tracks, and the digital information signal of one track is divided into M sync blocks (where M and N are positive integers), and each sync block on the tape has data. ID information including a frame number, a track number and a sync block number is used for the pilot signal and the disc information. Recorded with Tal information signal,
Reproduction position detecting means for detecting the ID information included in the reproduction signal, and sample pulse generation for outputting a sample pulse based on the timing at which the target sync block in the data frame is reproduced from the output of the reproduction position detecting means. Means, a tracking error detecting means for detecting a relative positional deviation between the head and the track from a pilot signal included in the reproduction signal, and outputting a tracking miscalculation signal corresponding thereto, and a sampling means for sampling the tracking error signal by the sample pulse. And the head is operated by the tracking control means based on the tracking error signal sampled by the sampling means when reproducing at a tape speed less than or equal to -1 times the tape speed at the time of recording or more than twice the tape speed at the time of recording. Scan and data frame Digital signal reproducing apparatus characterized by fixing the phase. 3. A tape in which a pilot signal and a digital signal are recorded on diagonal tracks on the tape is run in the longitudinal direction thereof, and the tape is scanned by a head on a rotating cylinder, and is included in a reproduction signal from the head. A digital signal reproducing apparatus in which a tracking control means operates based on a pilot signal to fix the phases of a head scan and a track, wherein a digital information signal of a predetermined length is used as one data frame and a digital data frame of one data frame is used. The information signal is divided into N tracks on the tape and recorded, and the digital information signal of one track is divided into M sync blocks (where M and N are positive integers), and each sync block on the tape has a track. The ID information including the number and sync block number is combined with the pilot signal and the digital information signal. Playback position detecting means for detecting the ID information recorded and included in the reproduction signal, timed pulse generating means for generating a sample pulse at a timing based on rotation of the cylinder, and a head from a pilot signal included in the reproduction signal. And a tracking error detection unit that detects a relative position shift of the track and outputs a tracking miscalculation signal corresponding thereto, a sampling unit that samples the tracking error signal by the sample pulse, and a output of the reproduction position detection unit. Timing correction means for correcting the sample pulse generation timing of the pulse generation means so that the target sync block in the data frame is reproduced, and at a tape speed less than -1 times the tape speed at the time of recording or twice the tape speed. The timing when playing back Digital signal reproduction characterized in that the tracking control means operates based on the tracking error signal sampled by the sampling means by the sampling pulse whose timing is corrected by the positive means to fix the phases of the head scan and the data frame. apparatus. 4. The digital signal of one data frame includes a digitized and compressed video signal L frame (L is a positive integer), according to claim 1, 2, or 3. Digital signal reproducing device.