JPH07209665A - Spatial optical modulation device - Google Patents

Abstract

PURPOSE:To form a nondefective dielectric reflecting layer with superior flatness even if the surface of a pixel electrode layer becomes uneven when the layer is formed by a liftoff method and to prevent decreases in the reflection factor and contrast of read light and deterioration in resolution originating from a manufacture process by providing a flattening layer formed of a dielectric material between the pixel electrode layer and dielectric reflecting layer. CONSTITUTION:The flattening layer 21 is interposed between the pixel electrode layer 5 and dielectric reflecting layer 6. The flattening layer 21 flattens unevenness of the surface of the pixel electrode layer 5 on the side of the dielectric reflecting layer 6 and also forms a thin dielectric film between each pixel electrode 4 and the dielectric reflecting layer 6 to join it with the dielectric reflecting layer 6 on a complete flat surface. In the manufacture process of this device, a coating film of a coated type silicon compound as the dielectric material is formed by a spin coating method, etc., on the surface of the pixel electrode 5 which has an insulator 3 and the pixel electrodes 4 exposed after the pixel electrode layer 5 is formed, and after the formation, annealing is performed to form the cured stable flattening layer 21.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a spatial light modulator,
It is applied as a display device of a projection display or an optical information processing device in an optical computer, and prevents unevenness generated in the process of forming the pixel electrode layer from lowering the contrast or reflectance of the read light in the dielectric reflecting layer. Related to improvements, etc.

[0002]

2. Description of the Related Art Conventionally, there are various types of projection displays, but each pixel electrode provided between a photoconductor layer and a dielectric reflection layer seals the dielectric reflection layer side. There is a reflective spatial light modulator of the type that changes the state of the liquid crystal layer to obtain modulated reflected light (Japanese Patent Laid-Open No. 3-192332). As shown in FIG. 6, the spatial light modulator is a pixel electrode in which a driving electrode layer 1, a photoconductor layer 2, and a large number of pixel electrodes 4 divided by an insulator 3 are arranged at a predetermined pitch. A layer 5, a dielectric reflection layer 6, a liquid crystal layer 7, and a drive electrode layer 8 composed of a transparent electrode form a laminated structure, and the laminated structure is actually a transparent insulating substrate (glass substrate). Used in a disguised configuration between 9,10.

Here, the drive electrode layer 1 is formed by forming a high resistance N-type Si constituting the photoconductor layer 2 into an N-type low resistance layer on one side surface thereof, and also the pixel electrode layer 5 The pixel electrodes 4 made of a conductive metal (for example, platinum) are divided by an insulator (for example, silicon nitride) 3 and arranged in a matrix. On the other hand, the liquid crystal layer 7 includes the dielectric reflection layer 6 and the drive electrode layer 8
The liquid crystal is sealed between them, and the spacer 12 sets a predetermined layer thickness.

Next, the operation of the spatial light modulator having the above structure will be described. First, a rectangular wave voltage is applied from the drive power supply 11 between the drive electrode layers 1 and 8. In that case, when a negative voltage is applied to the drive electrode layer 8 side, a reverse bias is applied to the contact surface (Schottky junction surface) between the pixel electrode 4 and the photoconductor layer 2 which is a high resistance N-type Si layer. Then, the depletion layer spreads near the pixel electrode 4 side of the photoconductor layer 2. Then, in that state, when the writing light FA is incident from the transparent insulating substrate 9 side, electrons-holes are generated in the depletion layer, and the pixel electrode 4 is generated by the action of the electric field applied to the depletion layer. It moves to the side and is accumulated in the electrode 4. As a result, the writing light F is generated by the holes accumulated in the pixel electrode 4.
The voltage applied to the liquid crystal layer 7 from the pixel electrode 4 corresponding to the incident area of A through the dielectric reflection layer 6 increases. In that case, since the reverse bias leak current in the Schottky junction has the same effect as the charge photoelectrically converted by the writing light FA, it is necessary to make the leak current as small as possible.

On the other hand, conversely, when a positive voltage is applied to the drive electrode layer 8 side, the Schottky contact surface is in the forward bias state, and all the accumulated holes are released,
The voltage applied from the driving power supply 11 is applied to the entire surface of the liquid crystal layer 7 via the dielectric reflection layer 6 on average.

Therefore, in the dark state (state in which the writing light FA does not enter), the rectangular wave of the driving power supply 11 is set so that the negative voltage applied to the liquid crystal layer 7 becomes slightly smaller than the threshold voltage that causes the birefringence in the liquid crystal cell. When the voltage is set and the application time of the positive voltage is set to such an extent that the liquid crystal cell does not cause birefringence, the read light FB of the read light FB is provided only in the area where the pixel electrode 4 corresponding to the incident area of the write light FA. Since the reflected light FC has its polarization direction changed, the reflected light FC can be modulated based on the writing light FA.

Next, the manufacturing process of the above spatial modulator will be described with reference to FIGS. 8 (A) to (I). A high-concentration layer is formed by ion-implanting N-type impurities such as phosphorus (P) and arsenic (As) into one surface of the high-resistance N-type single crystal Si substrate (with a resistance value of 300 Ω · cm or more) 31. A drive electrode layer 1 that is a low resistance layer and a photoconductor layer 2 that is a high resistance N-type Si layer are formed [(A), (B)]. The photoconductor layer 2 is mirror-polished to a predetermined thickness, and plasma CVD (Chemical Vapor Depositi
The silicon nitride layer 32 is formed by depositing silicon nitride (Si ₃ N ₄ ) by the (on) method [(C)]. The silicon nitride layer 32 is formed to the thickness of the pixel electrode 4.

The photoresist 33 is applied to the surface of the silicon nitride layer 32 and pre-baked, and then the pixel electrode 4 is formed.
Exposure using a photomask on which the arrangement pattern of is formed is transferred to the photoresist 33.
[(D)], the photoresist 33 in the exposed area is removed by developing with an organic solvent, and an opening 34 is formed at a position corresponding to each pixel electrode 4.
To form [(E)]. The silicon nitride layer 32 is etched using the photoresist 33 as a mask to form an opening 35 [(F)].

While leaving the photoresist 33, a metal 36 such as platinum (Pt) is formed on the surfaces of the photoresist 33 and the opening 35 by the sputtering method or the EB vapor deposition method [(G)]. Utilizing the fact that the metal 36 formed on the side surface of the photoresist 33 is extremely thin and fragile, the photoresist 33 and the metal 36 above it are removed by the so-called lift-off method.
[(H)]. Therefore, at this stage, the insulator 3 (silicon nitride layer 3
The pixel electrode 4 (metal 36) is embedded in the opening 35 formed in 2), and the pixel electrode layer 5 in which a large number of pixel electrodes 4 are divided by the insulator 3 is configured. .

In order to improve the diode characteristics between each pixel electrode 4 and the photodielectric layer 2, annealing is performed at about 400 to 500 ° C., and then a reflective film is formed in multiple layers to form the dielectric reflective layer 6. Form [(I)]. Although not shown in FIG. 8, a liquid crystal layer 7 having a thickness set by a spacer 12 is sealed between the dielectric reflection layer 6 and the drive electrode layer 8 as shown in FIG. Transparent insulating substrates 9 and 10 on the surfaces of layers 1 and 8, respectively
The spatial modulator is completed by joining the two. still,
As the liquid crystal layer 7, a liquid crystal material of positive anisotropic 45 ° twisted nematic or vertical alignment is used.

[0011]

As described above in the manufacturing process, the lift-off method is used in the step (H) of forming the pixel electrode layer 5, but dry etching or wet etching is used in the etching step. Regardless of this, side etching tends to occur, and a V-shaped groove 15 is formed around the pixel electrode 4 as shown in FIG. When a reflective film is formed on the surface of the pixel electrode layer 5, the dielectric reflective layer 6 is formed as shown in FIG.
A V-shaped groove 16 is formed at a position corresponding to the groove 15 in the above. That is, when the adjacent portion of each pixel electrode 4 and the insulator 3 is enlarged, the state becomes as shown in FIG.
A V-shaped groove 15 is formed around side 4 by side etching, and a dielectric reflection layer 6 formed in a multilayer film on the surface side of the pixel electrode layer 5 has the shape of the groove 15. The groove 16 is formed in a V-shaped bent shape along the groove 16.

Therefore, the dielectric reflecting layer which should be flat in nature
A large number of grooves 16 are formed on the surface of 6, and when the reading light FB is incident on the dielectric reflection layer 6 having such a surface state, the incident angle is at each groove 16 portion. It becomes abnormal. On the other hand, the dielectric reflection layer 6 has a function of increasing the reflectance by interfering the reflected light FC at each interface of the multilayer film, and the reflectance is a film thickness related to the wavelength of the read light FB and the transmission direction of the light FB. It depends on the relationship with. As a result, when a large number of grooves 16 are formed as described above, the dielectric reflection layer 6 has a reflectance smaller than that when designed assuming that the dielectric reflection layer 6 is flat. Since the scattering phenomenon occurs, the brightness of the image due to the reflected light FC is significantly reduced. Furthermore, in the film forming process of the dielectric reflection layer 6, defects such as pinholes are likely to occur in each groove 16, and in such defects, the read light FB is incident in the layer direction of the dielectric reflection layer 6. In addition, the resolution of the image due to the reflected light FC is deteriorated because it is incident on the surface of the pixel electrode 4.

Further, a particular problem is that the reduction of the reflectance at each groove 16 means that the read light FB is transmitted through the dielectric reflection layer 6, and the periphery of the pixel electrode 4 is affected. When the formed V-shaped groove 15 reaches the photoconductor layer 2, the read light FB leaks to the photoconductor layer 2 side, and the charges photoelectrically converted by the leaked read light FB and write light FA. Since the light is modulated by the liquid crystal layer 7 in the state of being accumulated in the pixel electrode 4, the contrast of the image is significantly lowered, and in an extreme case, the modulation is impossible.

On the other hand, if the anisotropic etching method is adopted in the step of forming the pixel electrode layer 5 by the lift-off method, it is possible to prevent the side etching, but the method needs to be carried out by reactive ion etching. Yes,
It is difficult to adopt the anisotropic etching method because the surface of the photoconductor layer 2 which is a semiconductor is damaged by ion bombardment or the like, and if crystal defects or impurities are present on the Schottky contact surface, the diode characteristics are deteriorated.

Therefore, according to the present invention, the above-mentioned inconvenience caused by the manufacturing process is eliminated by providing a layer for flattening the surface of the pixel electrode layer 5, the reflectance of the read light FB can be kept high, and the contrast of the image can be improved. It was created for the purpose of providing a spatial light modulator with excellent resolution.

[0016]

According to a first aspect of the present invention, a first drive electrode layer composed of a transparent electrode or a low resistance layer of a photoconductor itself, a photoconductor layer, and a large number of sections divided by an insulator are provided. A pixel electrode layer provided with a pixel electrode, a dielectric reflection layer, a liquid crystal layer,
It has a laminated structure in which second driving electrode layers composed of transparent electrodes are laminated in order, and based on the writing light incident on the first driving electrode layer in a state where an alternating voltage is applied between the respective driving electrode layers. In the spatial light modulator that modulates and reflects the readout light incident on the second drive electrode layer, a flattening layer made of a dielectric material is provided between the pixel electrode layer and the dielectric reflection layer. The present invention relates to a spatial light modulator.

A second invention relates to a spatial light modulator in which an insulating film is provided between the flattening layer and the pixel electrode layer when the flattening layer in the first invention is composed of a coating type silicon compound. . The insulating film is made of SiO ₂ or Si.
A film made of N or a laminated structure of a film of SiO _{2 and} a film of SiN can be applied.

[0018]

[Action]

Regarding the first invention: According to the present invention, by providing the planarizing layer, even if irregularities such as grooves are generated on the surface of the pixel electrode layer in the manufacturing process, the film formation side surface of the dielectric reflection layer is prevented. It can be flattened and it is possible to prevent unevenness from occurring in the dielectric reflection layer. Since the flattening layer is made of a dielectric material, the insulation between the pixel electrodes is maintained.

Regarding the second invention; in manufacturing the spatial light modulator of the first invention, at a predetermined temperature in order to improve the diode characteristics between each pixel electrode of the pixel electrode layer and the photoconductor layer. When the optimum coating type silicon compound is used as the flattening layer, the curing temperature is relatively higher than the above-mentioned annealing temperature, and if the flattening layer is to be completely cured, the annealing process is performed. Roughness may occur on the pixel electrode surface or the stability of the diode characteristics may be impaired. Therefore, it is unavoidable to set the annealing temperature for the planarizing layer of the coating type silicon compound to a low range, and as a result, the solvent component or the unreacted portion of the planarizing layer is not formed on the contact surface between the pixel electrode and the photoconductor layer. Remains and causes electrical influences and diffusion of impurities, which adversely affects the light modulation characteristics. The insulating film of the present invention has a function of preventing the contact surface between the pixel electrode and the photoconductor layer from being affected even if the curing treatment of the coating type silicon compound of the flat layer is incomplete.

[0020]

Embodiments of the spatial light modulator of the present invention will be described in detail below with reference to FIGS. << Embodiment 1 >> First, FIG. 1 shows a cross-sectional structure of the device of the embodiment, in which elements shown by the same reference numerals as those in FIG. 6 are the same as those in FIG. Also, since the basic functions of the respective elements are the same as in the case of the apparatus of FIG. 6, the explanation regarding the common elements and the explanation regarding the basic operation are omitted here.

The characteristic of the device of this embodiment is that a flattening layer 21 is interposed between the pixel electrode layer 5 and the dielectric reflecting layer 6, and the flattening layer 21 corresponds to the pixel electrode layer 5. In addition to flattening the unevenness generated on the surface of the dielectric reflection layer 6 side,
A thin dielectric film is formed between each pixel electrode 4 and the dielectric reflection layer 6 and is joined to the dielectric reflection layer 6 with a completely flat surface.

Next, a method of manufacturing the device of this embodiment will be described with reference to FIG. First, steps [(A) to (H)] up to forming the pixel electrode layer 5 by the lift-off method are the same as the steps shown in FIG. 8. However, in the manufacturing process of this device, after the pixel electrode layer 5 is formed, the dielectric 3 is not directly formed as shown in FIG. 8, but the insulator 3 and the pixel electrode 4 are exposed. A coating film of a coating type silicon compound (SOG: Spin On Glass), which is a dielectric substance, is formed on the surface of the pixel electrode layer 5 which is present by a spin coating method or the like, and after the coating film is formed, annealing is performed to cure the coating film to stabilize it. The flattening layer 21 is formed [(X)]. Forming step (X) of the flattening layer 21
In, the SOG is filled up to the inside of the groove 15 generated around each pixel electrode 4 in the step (H) of forming the pixel electrode layer 5, so that the insulator 3
And the surface of the pixel electrode 4 is flatly covered with a thin film,
The surface of the flattening layer 21 does not show irregularities or bends due to the groove 15, and a perfect flat surface is formed. If necessary, the flatness can be further improved by etching back the surface of the flattening layer 21.

Next, in the same manner as in the case of FIG. 8, a multi-layered reflective film is formed on the surface of the flattening layer 21 to form the dielectric reflective layer 6
To form [(Y)]. In this case, as described above, the planarization layer 21
Due to the high flatness of the surface of the dielectric reflection layer 6
Is a flat surface having a uniform layer thickness and no unevenness or bending, and constitutes an ideal reflecting surface without causing defects such as pinholes.

Then, as in the prior art, the dielectric reflection layer
Sealing the liquid crystal layer 7 between 6 and the drive electrode layer 8 and each drive electrode layer
Although the device of this embodiment is completed by joining the transparent insulating substrates 9 and 10 to the surfaces of 1 and 8, the pixel electrode 4 and the insulator 3 adjacent to each other in the case where the planarization layer 21 is provided are enlarged. As shown in FIG. 2, the dielectric reflection layer 6 is the liquid crystal layer 7
Since it is a completely flat reflecting surface on the side, there is no decrease in reflectance or deterioration in resolution, and the dielectric reflecting layer 6 and the photoconductor layer 2 are completely separated by the planarizing layer 21. In addition, the phenomenon that the read light FB leaks to the photoconductor layer 2 side and deteriorates the contrast does not occur. Furthermore, it is possible to project with strong read light.

<Second Embodiment> In the first embodiment described above, the SOG is used.
By providing the flattening layer 21 of, the unevenness generated in the process of forming the pixel electrode layer 5 is prevented from appearing on the dielectric reflection layer 6, and a good light modulation operation is obtained by the flat dielectric reflection layer 6. I am allowed to do so. However, when the modulated image was evaluated using the spatial light modulator manufactured in Example 1, the above-mentioned improvement effect was certainly observed compared with the case where the flattening layer 21 was provided and the case where it was not provided. However, there are some points that the image resolution, contrast, etc. are still not sufficient when viewed from detailed evaluation criteria.

Then, when the cause was investigated and examined, the following facts were found. First, the coating type silicon compound, which is the main component of SOG, usually cures at 400
It starts at ℃ and completely cures at 600 ℃ or higher. Therefore,
Annealing after the formation of the planarization layer 21 in the first embodiment [step (X) in FIG. 3] is performed under such temperature conditions. On the other hand, in a step before the step of forming the planarization layer 21, in order to improve the diode characteristics between each pixel electrode 4 and the photo-dielectric layer 2 after the step (H) of forming the pixel electrode layer 5 is completed,
Annealing is performed at about 00 to 500 ° C. This annealing is to cause Pt of each pixel electrode 4 to react with Si of the photodielectric layer 2 to form PtSi near the junction surface thereof, and the reverse bias leakage current of the diode characteristic is large at the formation temperature of PtSi. Because of the dependence, it is naturally desirable to use the above-mentioned annealing conditions. Therefore, each pixel electrode 4
The annealing condition for completely curing the SOG of the planarization layer 21 is 100 ° C. or more higher than the annealing condition for improving the diode characteristic between the photo-dielectric layer 2 and the photo-dielectric layer 2. In the first embodiment, the annealing conditions for the flattening layer 21 are set to the ideal conditions as described above, and as a result, the heating temperature exceeds the PtSi formation temperature.
The ideal diode characteristics between 4 and the photodielectric layer 2 could not be obtained, and the reverse bias leak current was large. Also, when heated above 500 ° C, each pixel electrode 4
There was roughness on the surface.

Next, based on the above facts, the annealing condition for improving the diode characteristics is 400-
It was set to 500 ° C. and the annealing condition of the flattening layer 21 was set to 450 degrees. In that case, when the resistivity of the flattening layer 21 is examined, it is 1
Although the resistivity was 0 ¹⁰ Ω · cm or more and sufficient resistivity was obtained, the resolution and contrast of the image were not sufficient. As a result of investigating the cause, even if the resistivity is sufficient, the curing of the planarization layer 21 is still incomplete, and the solvent component of SOG and the unreacted part are caused in each pixel electrode 4 and the photodielectric layer. It was found that it remained at the interface of No. 2 and increased the leak current during reverse bias.

Therefore, as a countermeasure against this, as shown in FIG. 4, an insulating film 22 is further coated on the surface of the pixel electrode 4 forming the pixel electrode layer 5 and the insulator 3 separating the pixel electrode 4 and the insulation The flattening layer 21 was provided on the surface of the film 22 under an annealing condition of 450 ° C. The insulating film 22 plays a role of preventing electrical influence and impurity diffusion that the SOG of the incompletely cured flattening layer 21 has on the Schottky junction surface on the pixel electrode 4 side, and the flattening layer 21 is ideal. The above-mentioned inconvenience caused by not being cured under a typical annealing condition is solved.

The material of the insulating film 22 is a pixel electrode.
4 and Pt of the insulator 3 and Si ₃ N ₄ of the insulator 3 have good adhesion and high resistance. For example, silicon dioxide (SiO ₂ ) or silicon nitride (SiN) can be used. Is determined based on the diffusion stopping power. Further, in consideration of the film stress when the film is coated, a laminated structure of a low stress SiO ₂ film and a SiN film having a large diffusion blocking ability may be formed.

When manufacturing the spatial light modulator with the insulating film 22 interposed, the step of applying the insulating film 22 is simply incorporated into the manufacturing process shown in FIG. That is,
As shown in FIG. 5, the pixel electrode layer in the manufacturing process of FIG.
After the formation step (H) of 5 is completed, annealing (400 ° C. to 500 ° C.) for improving the diode characteristics is performed, and then a step (Z) of depositing the insulating film 22 by plasma CVD is interposed, After that, an SOG coating film is formed by spin coating (X) and annealed at 450 ° C. to flatten the layer 2
Make up 1 The annealing conditions for the planarization layer 21 are 450 ° C.
Although it is low when viewed from the ideal conditions (complete curing temperature: 600 ° C or higher), sufficient resistivity is obtained as described above, and the problem due to incomplete curing is between the pixel electrode layer 5 and the planarization layer 21. Since the insulating film 22 is interposed in the above, it is completely eliminated.

When the modulation image of the spatial light modulator manufactured in this way was evaluated, the planarization layer 21
The above-mentioned electrical influence and impurity diffusion due to insufficient annealing of No. 1 were not observed, and sufficiently satisfactory resolution and contrast were obtained.

[0032]

The spatial light modulator of the present invention has the following effects due to the above-mentioned configuration. According to the first aspect of the present invention, since the flattening layer made of a dielectric material is provided between the pixel electrode layer and the dielectric reflection layer, unevenness occurs on the surface of the layer in the process of forming the pixel electrode layer by the lift-off method. However, the defect-free dielectric reflection layer can be formed with excellent flatness, and the dielectric reflection layer and the photoconductor layer can be separated. Therefore, it is possible to effectively prevent the reduction of the reflectance and the contrast of the readout light and the deterioration of the image resolution due to the manufacturing process, and it is possible to realize a high-performance spatial light modulation function. In addition, projection with strong read light is possible. According to a second aspect of the present invention, when an optimal coating type silicon compound is used as the material of the flattening layer in the first aspect of the invention, the annealing temperature is different between the pixel electrodes of the pixel electrode layer and the photodielectric layer. The temperature is higher than the temperature of the annealing process performed to improve the diode characteristics between the two, and if the latter annealing condition is prioritized, the planarization layer cannot be completely cured, and the electrical contact to the contact surface between the pixel electrode and the photoconductor layer is not achieved. The optical influence and the diffusion of impurities bring about an unfavorable result on the light modulation characteristics, but by interposing a resistive film between the pixel electrode layer and the planarization layer, this problem is solved and more accurate spatial light modulation is possible. To The invention of claim 3 provides the resistance film of claim 2 with an optimum material in terms of the adhesiveness to the pixel electrode layer and its high resistance.

[Brief description of drawings]

FIG. 1 is a sectional view of a spatial light modulator according to a first embodiment of the present invention.

FIG. 2 is an enlarged view of a portion where a pixel electrode and an insulator are adjacent to each other in the device of Example 1.

FIG. 3 is a manufacturing process diagram of the device according to the first embodiment.

FIG. 4 is an enlarged view of a portion adjacent to a pixel electrode and an insulator in the device of Example 2.

FIG. 5 is a partial manufacturing process diagram of the device according to the second embodiment.

FIG. 6 is a sectional view of a conventional spatial light modulator.

FIG. 7 is an enlarged view of a portion where a pixel electrode and an insulator are adjacent to each other in a conventional device.

FIG. 8 is a manufacturing process diagram of a conventional device.

[Explanation of symbols]

1,8 ... Drive electrode layers (first drive electrode layer, second drive electrode layer), 2
... Photoconductor layer, 3 ... Insulator, 4 ... Pixel electrode, 5 ... Pixel electrode layer, 6 ... Dielectric reflective layer, 7 ... Liquid crystal layer, 9,10 ... Transparent insulating substrate, 11 ... Driving power supply, 12 ... Spacers, 15, 16 ... Grooves, 21 ... Flattening layer, 22 ... Insulating film, 31 ... High resistance N-type single crystal Si substrate,
32 ... Silicon nitride layer, 33 ... Photoresist, 34, 35 ... Opening, 36 ... Metal such as platinum (Pt).

Claims (3)

[Claims] 1. A first drive electrode layer composed of a transparent electrode or a low resistance layer of the photoconductor itself, a photoconductor layer, and a pixel electrode layer having a large number of pixel electrodes divided by insulators. A dielectric reflection layer, a liquid crystal layer, and a second drive electrode layer composed of a transparent electrode, which are laminated in this order, and the first voltage is applied to the first drive electrode layer with an alternating voltage applied between the drive electrode layers. In a spatial light modulator that modulates and reflects read light incident on the second drive electrode layer based on write light incident on the drive electrode layer, a dielectric material is provided between the pixel electrode layer and the dielectric reflection layer. A spatial light modulator comprising a flattening layer made of. 2. The spatial light modulator according to claim 1, wherein when the flattening layer is made of a coating type silicon compound, an insulating film is provided between the flattening layer and the pixel electrode layer. 3. An insulating film made of SiO ₂ or SiN,
Alternatively, the spatial light modulator according to claim 2, which has a laminated structure of a film of SiO _{2 and} a film of SiN.