JPH07203492A - In-band signal detection circuit - Google Patents

In-band signal detection circuit

Info

Publication number
JPH07203492A
JPH07203492A JP35149493A JP35149493A JPH07203492A JP H07203492 A JPH07203492 A JP H07203492A JP 35149493 A JP35149493 A JP 35149493A JP 35149493 A JP35149493 A JP 35149493A JP H07203492 A JPH07203492 A JP H07203492A
Authority
JP
Japan
Prior art keywords
signal
circuit
signals
band
pass filter
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP35149493A
Other languages
Japanese (ja)
Other versions
JP2929929B2 (en
Inventor
Masato Kagawa
正人 加川
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP35149493A priority Critical patent/JP2929929B2/en
Publication of JPH07203492A publication Critical patent/JPH07203492A/en
Application granted granted Critical
Publication of JP2929929B2 publication Critical patent/JP2929929B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Abstract

PURPOSE:To obtain the in-band signal detection circuit capable of distinguishing signals from external noise, comparing and collating, signals even with the same frequency component from the signal frequency in terms of potential and time and distinguishing the noise from the other signal. CONSTITUTION:A detection circuit is provided with a band pass filter 21 passing a signal band in use, a low pass filter 2 separating a low frequency and a high frequency, and a high pass filter 3. Signals of f..-f4 are extracted by circuits 6, 7 extracting only the signals. Signal block circuits 4, 5 obtain the voltage other than the signals f1-f4. Comparator circuits 8, 9 obtain the potential at the signal extraction side and the potential at the block circuit side. The signals 5, 6 extracted by the comparison control circuit are outputted via comparison control circuits 2, 10, 11.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、通信用交換網等に制御
信号として使用される帯域内信号の伝送装置に関し、特
に外来雑音、疑似信号等と信号を区別できる信号検出回
路に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a device for transmitting an in-band signal used as a control signal in a communication switching network or the like, and more particularly to a signal detection circuit capable of distinguishing a signal from an external noise or a pseudo signal.

【従来の技術】従来の帯域内信号の検出回路は、図2に
示すような構成を有している。信号が入力された場合、
f1用通過ろ波器108により抽出される。抽出された
信号は整流回路104により整流されて、直流信号とな
り比較回路106に入力される。f1阻止ろ波器101
を通り増幅器103により増幅し、整流回路105によ
り整流され直流信号となった信号は、比較回路106で
比較される。比較された信号は次段の遅延回路107に
入力される。比較回路106は、信号Eと信号Fを比較
し、信号Fよりも信号Eが大きい場合のみ次段へ出力す
る。遅延回路107は、信号Eが得られた場合のみ、一
定幅の信号を送出する。図3は信号(2周波)を使用し
ている場合である。入力された信号f1は通過ろ波器2
01によりf1のみ抽出される。抽出されたf1は次段
で必要なレベルまで増幅器203により増幅される。増
幅されたf1は整流回路205により整流され直流信号
となり次段のAND回路207へ入力される。一方、信
号f2は通過ろ波器202によりf2のみ抽出される。
抽出されたf2は次段で必要なレベルまで増幅器204
により増幅される。増幅されたf2は整流回路206に
より整流されて直流信号となり次段のAND回路207
へ入力される。AND回路207は信号Gと信号Hが到
来時のみ出力信号を次段の遅延回路208へ送出する。
遅延回路202は、信号の波形の修正を行い一定幅の信
号波形を送出している。
2. Description of the Related Art A conventional in-band signal detection circuit has a structure as shown in FIG. When a signal is input,
It is extracted by the pass filter 108 for f1. The extracted signal is rectified by the rectification circuit 104 and becomes a DC signal, which is input to the comparison circuit 106. f1 blocking filter 101
The signal that has been amplified by the amplifier 103 and has been rectified by the rectifying circuit 105 to become a DC signal is compared by the comparison circuit 106. The compared signal is input to the delay circuit 107 at the next stage. The comparison circuit 106 compares the signal E with the signal F, and outputs the signal to the next stage only when the signal E is larger than the signal F. The delay circuit 107 sends out a signal having a constant width only when the signal E is obtained. FIG. 3 shows a case where a signal (two frequencies) is used. The input signal f1 is passed through the pass filter 2
Only f1 is extracted by 01. The extracted f1 is amplified by the amplifier 203 to a required level in the next stage. The amplified f1 is rectified by the rectifier circuit 205 and becomes a DC signal, which is input to the AND circuit 207 in the next stage. On the other hand, the signal f2 is extracted by the pass filter 202 only as f2.
The extracted f2 is amplified to the level required by the amplifier 204 in the next stage.
Is amplified by. The amplified f2 is rectified by the rectifier circuit 206 and becomes a DC signal, and the AND circuit 207 of the next stage is used.
Is input to. The AND circuit 207 sends the output signal to the delay circuit 208 at the next stage only when the signals G and H arrive.
The delay circuit 202 corrects the waveform of the signal and sends out a signal waveform having a constant width.

【発明が解決しようとする課題】上述した図2の従来の
回路は、1周波方式であるため、次のような問題を有し
ている。 (a)f1、疑似信号、突発的な信号が入力されると信
号周波数として扱われ次段に対し、送出されるため、信
号と信号以外の区別がつかない。 (b)誤動作防止として、遅延回路を有しているため相
手方への信号f1及び真の信号以外の信号も、信号の時
間的調整をされてしまう。 一方図3記載の回路においては、(a)保護回路(時間
的チェック回路)が無いため信号周波数成分と同一周波
数成分が来たときに信号と区別出来ない、(b)変復調
装置等の信号で発生する周波数成分での信号検出誤動作
(2nd波、3rdによる動作)するという問題があ
る。 本発明の目的は上述の欠点を除去した帯域内信号検出回
路を提供することにある。
The above-mentioned conventional circuit of FIG. 2 has the following problems because it is of the one-frequency type. (A) When f1, a pseudo signal, or a sudden signal is input, it is treated as a signal frequency and is sent to the next stage, so it is impossible to distinguish between signals and other signals. (B) As a malfunction prevention, since the delay circuit is included, the signals f1 to the other party and signals other than the true signal are also adjusted in time. On the other hand, in the circuit shown in FIG. 3, (a) since there is no protection circuit (temporal check circuit), it cannot be distinguished from the signal when the same frequency component as the signal frequency component comes. There is a problem in that the signal detection malfunctions in the generated frequency components (operations due to the 2nd wave and 3rd wave). It is an object of the present invention to provide an in-band signal detection circuit which eliminates the above-mentioned drawbacks.

【課題を解決するための手段】上記目的を達成するた
め、本発明の検出回路は、信号周波数として4周波を用
い、かつ、保護回路及び比較制御回路を有している。具
体的には、外来雑音から妨害されないように専用の帯域
ろ波器1(f1〜f4)を備えている。また、信号周波
数と同一な周波数(3周波)を受信しても、電位的、時
間的にチェックする保護回路を備えている。
In order to achieve the above object, the detection circuit of the present invention uses four frequencies as a signal frequency and has a protection circuit and a comparison control circuit. Specifically, a dedicated bandpass filter 1 (f1 to f4) is provided so as not to be disturbed by external noise. Moreover, even if the same frequency as the signal frequency (three frequencies) is received, a protection circuit for checking the potential and time is provided.

【実施例】次に、本発明について、図を参照して説明す
る。図1は本発明の一実施例を示す回路図である。図に
おいて、本発明の検出回路は、使用する信号の帯域を通
過させる帯域フィルタ1及び低域と高域を分割するフィ
ルタ(低域通過フィルタ2、高域通過フィルタ3)を備
えている。信号のみを抽出する回路6、7によりf1〜
f4の信号を抽出する。信号阻止回路4、5により、信
号(f1〜f4)以外の電位値を求める。比較回路8、
9により、信号抽出側電位と阻止回路側の電位求める。
比較制御回路より抽出された信号(矢印5、6)は、比
較制御回路2(10、11)を経て出力される。次に、
図1の回路の動作を説明する。帯域通過フィルタ1で、
使用する帯域を確保し、帯域以外周波数を阻止する。確
保された周波数帯域をさらに二分割する(低域通過フィ
ルタ2及び高域通過フィルタ3)。低域通過フィルタ2
は、信号周波数f1及びf2関係、高域通過フィルタ3
は、信号周波数f3及びf4関係のものである。以下
に、低域通過フィルタ2を通過し、比較回路8の出力信
号を得るまでを説明する(回路5、7も同様)。信号周
波数f1は、f1専用の帯域通過フィルタ601によっ
て得られ増幅回路603で増幅され、整流回路605で
直流信号となる。信号周波数f2についても同様で、整
流回路606で直流信号となる。信号阻止回路4は、信
号周波数f1及びf2を阻止する帯域阻止フィルタ40
1によりf1及びf2以外の周波数帯を増幅する。増幅
された帯域は、整流器403により直流信号となり、比
較制御回路の比較回路8に導かれる。(図5(a)は、
帯域通過フィルタ1、低域フィルタ2、帯域通過フィル
タ601、602の関係、(b)は、低域通過フィルタ
2、帯域阻止フィルタ401の関係) 前記で得られたf1用直流信号及びf2用直流信号は、
比較制御回路の制御回路607により、3通りにAによ
り制御される。上記の3通りについてf1のみの信号
を使用する。f2のみの信号を使用する。f1の信
号とf2の信号の合成値を使用する。得られた信号は、
比較制御回路1内比較回路で閾値回路で、比較を行い、
G=n±1以内の信号が次段へ送出する(図4
(a))。得られた信号は、比較制御回路2(10、1
1)に導かれる。比較制御回路2の10は、選択回路で
3通りの選択が可能(機能としては、607と同様)で
Bで制御を行う。得られた信号を比較器11で閾値回路
で、比較を行い、(H=n±1)以内の信号が送出され
る。(図4(b))
Next, the present invention will be described with reference to the drawings. FIG. 1 is a circuit diagram showing an embodiment of the present invention. In the figure, the detection circuit of the present invention includes a bandpass filter 1 that passes a band of a signal to be used and a filter that divides a low band and a high band (a low pass filter 2 and a high pass filter 3). F1 through the circuits 6 and 7 for extracting only signals
The signal of f4 is extracted. The signal blocking circuits 4 and 5 determine potential values other than the signals (f1 to f4). Comparison circuit 8,
9, the potential on the signal extraction side and the potential on the blocking circuit side are obtained.
The signals (arrows 5 and 6) extracted by the comparison control circuit are output via the comparison control circuit 2 (10 and 11). next,
The operation of the circuit of FIG. 1 will be described. With bandpass filter 1,
Secure a band to use and block frequencies outside the band. The secured frequency band is further divided into two (low pass filter 2 and high pass filter 3). Low pass filter 2
Is the relationship between the signal frequencies f1 and f2, and the high pass filter 3
Are related to the signal frequencies f3 and f4. The following is a description of how the output signal of the comparison circuit 8 is obtained after passing through the low pass filter 2 (the same applies to the circuits 5 and 7). The signal frequency f1 is obtained by the band-pass filter 601 dedicated to f1, amplified by the amplifier circuit 603, and becomes a DC signal by the rectifier circuit 605. The same applies to the signal frequency f2, and the rectifier circuit 606 produces a DC signal. The signal stop circuit 4 includes a band stop filter 40 for stopping the signal frequencies f1 and f2.
1 amplifies frequency bands other than f1 and f2. The amplified band becomes a DC signal by the rectifier 403 and is guided to the comparison circuit 8 of the comparison control circuit. (Fig. 5 (a)
Relationship between band-pass filter 1, low-pass filter 2, band-pass filters 601, 602, (b) relationship between low-pass filter 2 and band-stop filter 401) f1 DC signal and f2 DC obtained above The signal is
The control circuit 607 of the comparison control circuit controls A in three ways. Only the signal of f1 is used for the above three ways. Only the signal of f2 is used. The combined value of the f1 signal and the f2 signal is used. The resulting signal is
The comparison circuit in the comparison control circuit 1 compares with a threshold circuit,
Signals within G = n ± 1 are sent to the next stage (Fig. 4
(A)). The obtained signal is used as a comparison control circuit 2 (10, 1).
Guided to 1). The selection control circuit 10 of the comparison control circuit 2 allows three types of selection (the same function as 607), and B control is performed. The obtained signal is compared by the threshold circuit in the comparator 11, and the signal within (H = n ± 1) is transmitted. (Fig. 4 (b))

【発明の効果】以上説明した本発明は次のような効果を
有する。 (1)使用する帯域ろ波器1〜3を備えていることによ
り使用しない帯域からの妨害波を軽減できる。 (2)信号検出回路(6、7)、阻止回路(4、5)を
備えることにより (a)瞬時に発生する妨害波から影響を受けない。 (b)疑似信号成分から離脱したf1〜f4が得られ
る。 (c)阻止回路(4、5)が有るためリアルタイムで帯
域の状態値を求め比較対照に対応できる。 (d)帯域ろ波器(601、602)を使用している
為、精度の高い高速の信号の受信ができる。 (3)比較制御回路607(検出回路6の場合)、10
を備えている為、伝送路の状況・使用目的・競合メーカ
ーに合せた使用が可能である。 (4)保護回路(閾値回路8、11)を具備している
為、真の信号か誤信号かを精度の高い区別できる。 (5)共通のブロック・回路構成になっているので、切
分試験が容易。 (6)ろ波器回路(1、2、3)、阻止回路(4、
5)、信号検出回路(6、7)及び比較制御回路(8、
9、10、11)がデジタル信号処理(DSP)されて
いるので組立製作時間の短縮(従来と比べて1個の集積
回路)が可能である。 (7)比較制御回路により下記が可能になった。 (a)伝送路に合った設定が可能である。 (b)回線品質に合った設定が可能である。 (c)他社の装置との接続(対向)が可能である。
The present invention described above has the following effects. (1) Since the band pass filters 1 to 3 to be used are provided, the interference wave from the band not used can be reduced. (2) Since the signal detection circuit (6, 7) and the blocking circuit (4, 5) are provided, (a) It is not affected by an interfering wave generated instantaneously. (B) f1 to f4 separated from the pseudo signal component are obtained. (C) Since the blocking circuits (4, 5) are provided, the state value of the band can be obtained in real time and can be used for comparison. (D) Since the bandpass filters (601, 602) are used, highly accurate and high-speed signal reception can be performed. (3) Comparison control circuit 607 (in the case of detection circuit 6), 10
Since it is equipped with, it can be used according to the situation of the transmission line, purpose of use, and competing manufacturers. (4) Since the protection circuit (threshold circuits 8 and 11) is provided, it is possible to accurately distinguish between a true signal and an erroneous signal. (5) The common block and circuit configuration makes it easy to perform a cut test. (6) Filter circuit (1, 2, 3), blocking circuit (4,
5), the signal detection circuit (6, 7) and the comparison control circuit (8,
Since 9, 10, 11) are subjected to digital signal processing (DSP), the assembly and manufacturing time can be shortened (one integrated circuit compared with the conventional one). (7) The comparison control circuit enables the following. (A) It is possible to make settings that match the transmission path. (B) Settings that match the line quality can be made. (C) It is possible to connect (opposite) the device of another company.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の一実施例を示す回路図。FIG. 1 is a circuit diagram showing an embodiment of the present invention.

【図2】従来の検出回路図。FIG. 2 is a conventional detection circuit diagram.

【図3】従来の検出回路図。FIG. 3 is a conventional detection circuit diagram.

【図4】(a)、(b)は本発明の動作を説明する図。4A and 4B are views for explaining the operation of the present invention.

【図5】(a)、(b)は本発明の動作を説明する図。5A and 5B are diagrams for explaining the operation of the present invention.

【符号の説明】[Explanation of symbols]

1 帯域通過フィルタ 2 低域通過フィルタ 3 高域通過フィルタ 4、5 信号阻止回路 6、7 信号検出回路 8、9 比較制御回路1 10、11 比較制御回路2 101 帯域阻止フィルタ 102、103 増幅回路 104、105 整流回路 106 比較回路 107 遅延回路 108 帯域通過フィルタ 201 f1用通過ろ波器 202 f2用通過ろ波器 203、204 増幅回路 205、206 整流回路 207 AND論理回路 208 遅延・波形補正回路 1 band pass filter 2 low pass filter 3 high pass filter 4, 5 signal blocking circuit 6, 7 signal detection circuit 8, 9 comparison control circuit 1 10, 11 comparison control circuit 2 101 band rejection filter 102, 103 amplification circuit 104 , 105 rectifier circuit 106 comparator circuit 107 delay circuit 108 band pass filter 201 f1 pass filter 202 f2 pass filter 203, 204 amplifier circuit 205, 206 rectifier circuit 207 AND logic circuit 208 delay / waveform correction circuit

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】 使用する信号の帯域を通過させる帯域フ
ィルタと、帯域フィルタの出力を低域信号と高域信号に
分割する低域通過フィルタおよび高域通過フィルタと、
前記低域および高域信号の中の信号のみを抽出する第1
および第2の信号抽出回路と、前記低域および高域信号
の中の通過すべき信号以外の信号を阻止する第1および
第2の阻止回路と、前記第1および第2の信号抽出回路
の出力と前記第1および第2の阻止回路の出力とを比較
する第1および第2の比較回路と、これら第1および第
2の比較回路の出力を比較する第3の比較回路とから構
成されたことを特徴とする帯域内信号検出回路。
1. A band pass filter for passing a band of a signal to be used, a low pass filter and a high pass filter for dividing an output of the band filter into a low pass signal and a high pass signal,
First to extract only signals from the low-pass and high-pass signals
And a second signal extraction circuit, first and second blocking circuits for blocking signals other than the signals to be passed in the low-frequency and high-frequency signals, and the first and second signal extraction circuits It is composed of first and second comparison circuits for comparing an output with the outputs of the first and second blocking circuits, and a third comparison circuit for comparing the outputs of the first and second comparison circuits. An in-band signal detection circuit characterized by the above.
JP35149493A 1993-12-29 1993-12-29 In-band signal detection circuit Expired - Lifetime JP2929929B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP35149493A JP2929929B2 (en) 1993-12-29 1993-12-29 In-band signal detection circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP35149493A JP2929929B2 (en) 1993-12-29 1993-12-29 In-band signal detection circuit

Publications (2)

Publication Number Publication Date
JPH07203492A true JPH07203492A (en) 1995-08-04
JP2929929B2 JP2929929B2 (en) 1999-08-03

Family

ID=18417680

Family Applications (1)

Application Number Title Priority Date Filing Date
JP35149493A Expired - Lifetime JP2929929B2 (en) 1993-12-29 1993-12-29 In-band signal detection circuit

Country Status (1)

Country Link
JP (1) JP2929929B2 (en)

Also Published As

Publication number Publication date
JP2929929B2 (en) 1999-08-03

Similar Documents

Publication Publication Date Title
JPH05505296A (en) Method and apparatus for optimizing performance of power amplifier circuits
US5432854A (en) Stereo FM receiver, noise control circuit therefor
JPH0730930A (en) Dual tone detector allowing operation under presence of voice or background noise and its method
KR100265671B1 (en) Bandpass filter
EP3158651B1 (en) Appliance for receiving radio frequency signals, usable in particular for the management of uplink signals
JPH07203492A (en) In-band signal detection circuit
JP2687692B2 (en) Signal receiving circuit for in-band signal transmission device
US4191850A (en) Interferences reduction for use in an FM radio receiver
US4742570A (en) Multipath noise detecting circuit
JPS58206238A (en) Detecting circuit for noise within receiving band
US4535460A (en) Method and apparatus to filter pulsed RF signals
CN114337707B (en) Harmonic/intermodulation signal judging circuit and method of superheterodyne receiver
JPH0661891A (en) Signal detector
KR19990026445A (en) Receiver for remote control
JP2910601B2 (en) In-band signal detector
JP2000183784A (en) Narrow band interference wave suppression device and communication unit using it
JPH03930B2 (en)
JPH0591547A (en) Signal detection system for intra-band signal device
JPS58147256A (en) Fm receiver
JPS6246352Y2 (en)
JP3264188B2 (en) Spread spectrum communication equipment
JPS6246348Y2 (en)
JPH0522014A (en) Signal detecting system for in-band signal device
JPS63190433A (en) Output muting circuit for fm receiver
JPH03171994A (en) Push-button dial signal receiving system

Legal Events

Date Code Title Description
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 19990420