JPH07203346A - Data recording/reproducing device - Google Patents

Abstract

PURPOSE:To provide a data recording/reproducing device capable of quickly moving or copying data between devices. CONSTITUTION:The device is provided with a data bus 5 for transferring data to a main memory part 4 and a bus interface part 7 connected between the bus 5 and a bus line cable C and the interface part 7 is provided with a function for writing data on the bus 5 in a dual port memory 77, reading out the data from the memory 77 and sending the read data to the cable C at the time of receiving a sending command from a control processing part 1 and a function for writing data from the cable 5 in the memory 77, reading out the data from the memory 77 and sending the read data to the bus 5 at the time of receiving a receiving command from the processing part 1.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a data recording / reproducing apparatus having a semiconductor memory as a recording medium, which is used for recording, reproducing and editing data having a relatively large amount of information such as video and audio. Move data between recording and playback devices,
Regarding technology for making copies.

[0002]

2. Description of the Related Art Recently, in a data recording / reproducing apparatus for continuously recording / reproducing data such as video and audio, a semiconductor memory is being used as a recording medium. This is because any address area can be accessed at high speed, so recording and playback can be done instantaneously. By speeding up such access, human work time can be shortened, and when it is used for broadcasting, it can be controlled by time. This is because the advantage that it becomes easy is enormous.

FIG. 3 shows the configuration of a conventional video data recording / reproducing apparatus using a semiconductor memory as a recording medium.

Reference numeral 1 denotes a CPU which controls the entire apparatus as a whole.
The (control processing circuit) units 1 and 2 generate a write / read control signal W / R and an address signal ADD based on a command transferred from the CPU unit 1 through the CPU bus 3, and a memory control unit 4 stores a semiconductor memory. This is a main memory unit that is used as a medium and writes the video data input through the video data bus 5 to the semiconductor memory when the write control signal is input and reads the video data from the semiconductor memory when the read control signal is input and sends the video data to the video data bus 5. .

Reference numeral 6 designates predetermined video data between external input / output lines of a plurality of channels (4 channels in the figure) and the video data bus 5 based on a command transferred from the CPU section 1 through the CPU bus 3. It is a video data interface unit that inputs and outputs in a format format.

Here, the video data bus 5 has a structure in which four types of video data can be written simultaneously and four types of video data are read out simultaneously.

In the above structure, first, when a recording mode is designated through an operation panel (not shown), the CPU section 1
A recording command is output from the memory controller 2, and a write control signal and a write address are sent from the memory control unit 2 to the main memory unit 4. As a result, the main memory unit 4 enters the video data writing state, and at the same time, the video data transferred to the video data bus 5 by the video data interface unit 6 is recorded.

When the reproduction mode is designated, the CPU
A reproduction command is output from the unit 1, and a read control signal and a read address are sent from the memory control unit 2 to the main memory unit 4. As a result, the main memory unit 4 enters the video data read state, and the read video data is transferred to the video data bus 5
Also, it is output to the external transmission line as reproduction data via the video data interface unit 6.

Now, in such a video data recording / reproducing apparatus, when an editing operation is performed in combination with another video data recording / reproducing apparatus, a large amount of data is often moved or copied. Such processing is conventionally realized by connecting the video data output line of the device on the data reproducing side and the video data input line of the data recording side and transmitting / receiving as a video signal.

However, in such a processing method,
Since data is transferred at the data rate of the video signal, when transferring a large amount of video data, processing time corresponding to the video playback time is required. That is, it takes one hour to transfer the moving image signal for one hour, and the efficiency of the editing work is very poor. This also applies to the audio data recording / reproducing apparatus.

[0011]

As described above, in the conventional data recording / reproducing apparatus using the semiconductor memory as the recording medium, the data is moved or copied between the apparatuses at the reproduction speed, so that it takes time to perform the processing. It takes much time and the efficiency of editing work is very poor.

The present invention has been made to solve the above problems, and an object thereof is to provide a data recording / reproducing apparatus capable of moving or copying data between apparatuses at high speed.

[0013]

SUMMARY OF THE INVENTION In order to solve the above problems, the present invention relates to a main memory unit having a semiconductor memory as a recording medium for data transfer to and from an external device in response to a command from a control processing unit. In a data recording / reproducing apparatus having a function of moving or copying data, a data bus for transferring data to the main memory unit and a bus line cable connected to the external bus are connected to the data bus. , A bus interface section having a dual port memory capable of reading at the same time as writing,
The bus interface unit writes the data on the data bus to the dual port memory when receiving a transmission command from the control processing unit and simultaneously reads the data from the memory and transmits the data to the bus line cable; And a function for writing data from the bus line cable to the dual port memory and receiving the data from the memory and sending the data to the data bus when receiving a reception command from the control processing unit. To do.

[0014]

In the data recording / reproducing apparatus having the above structure, the data read from the main memory section is stored in the dual port memory of the bus interface section, the data stored in the memory is sent to the external apparatus through the bus line cable, and the reverse operation is performed. By storing the data sent from the external device through the bus line cable in the dual port memory of the bus interface unit and writing the data stored in the memory to the main memory unit through the data bus, the data interface unit The data can be moved and copied without the intervention of the data, thereby speeding up the processing.

[0015]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings. However, in FIG. 1, the same parts as those in FIG. 3 are denoted by the same reference numerals, and the different parts will be mainly described here.

FIG. 1 shows a system configuration in which the present invention is applied to a video data recording / reproducing apparatus and an editing operation is performed by using two apparatuses A and B having the same configuration.

In FIG. 1, each of the video data recording / reproducing devices A and B further includes a bus interface section 7 in addition to the configuration shown in FIG. These bus interface units 7 have external input / output terminals, and are connected to each other by a bus line cable C between the A and B devices.
Then, based on a command from the CPU unit 1 in each device, data is input / output between the internal video data bus 5 and the external bus line cable C.

FIG. 2 shows a specific structure of the bus interface unit 7, in which the terminal 71 is a video data bus 5.
, And the terminal 72 becomes an external input / output terminal. Terminal 71
Is connected to the input / output buffer circuit 73, and the other end is connected to the b terminal (fixed) of the first changeover switch 75 and the a terminal (fixed) of the second changeover switch 76. Similarly, the input / output buffer circuit 74 is connected to the terminal 72, and the other end is connected to the b terminal (fixed) of the second changeover switch 76 and the a terminal (fixed) of the first changeover switch 75. To be done.

The c terminal (movable) of the first changeover switch 75 is connected to the data input end of the dual port memory 77, and the c terminal (movable) of the second changeover switch 76 is the data output end of the dual port memory 77. Connected to.

In this dual port memory 77, for example, one line of video data (or an integral multiple thereof or 1
A FIFO (first-in first-out) buffer memory having a capacity of (field) is used.
The memory 77 writes input data in response to a write address signal from the write address generation circuit 79, and reads out and outputs data in response to a read address signal from the read address generation circuit 710.

The first and second changeover switches 75, 76
The write address generating circuit 79 and the read address generating circuit 710 are driven and controlled by the interface control circuit 78.

This interface control circuit 78 is CP
When it is connected to the U bus 3 and receives a transmission command from the CPU section 1, the first and second changeover switches 75 and 76 are respectively set to b.
Switching control is performed to the terminal side, the write address generation circuit 79 is activated to write the video data from the video data bus 5 to the dual port memory 77, and the read address generation circuit 710 is activated to read the written data in order. It is controlled so as to be sent from 72 to the external input / output line C.

Further, when receiving a reception command from the CPU section 1, the first and second changeover switches 75 and 76 are respectively set to a.
Switching control is performed to the terminal side, the write address generation circuit 79 is activated to write the video data from the external input / output line C in the dual port memory 77, and the read address generation circuit 710 is activated to read the written data in order.
The terminal 71 is controlled to send it to the video data bus 5.

In the above configuration, the operation operation in the case of transferring and recording the video data recorded in the video data recording / reproducing apparatus A to the video data recording / reproducing apparatus B will be described below.

First, for the device A side, the transfer of image data is instructed from the operation panel (not shown) and the range is specified, and for the device B side, reception recording is performed from the operation panel (not shown). Give instructions.

The CPU unit 1 on the side of the apparatus A causes the memory control unit 2 to transfer the video data in the designated range from the main memory unit 4 onto the video data bus 5 and take it into the bus interface unit 7. Bus interface unit 7 is CP
In response to a command from the U unit 1, the transmission state, that is, the first and second changeover switches 75 and 76 are both set to the b terminal side, and the video data from the video data bus 5 is written in the dual port memory 77.

On the other hand, the CPU unit 1 on the device B side sets the main memory unit 4 to the recording state through the memory control unit 2, and at the same time sends a reception command to the bus interface unit 7,
The second changeover switches 75 and 76 are both set to the a terminal side, and a receivable signal is sent to the device A.

Receiving the receivable signal, the bus interface section 7 on the device A side reads the video data from the dual port memory 77 in the order of recording, and the bus line cable C
To the bus interface section 7 on the device B side. The bus interface unit 7 on the device B side sequentially writes the video signals from the bus line cable C in the dual port memory 77, sequentially reads them, and records them in the main memory unit 4.

Since the video data transfer process from the device B to the device A may be set in the opposite manner to the above operation, the description thereof will be omitted.

As described above, the video data bus 5 has a structure in which four types of video data are simultaneously written and four types of video data are simultaneously read out. Can handle rates. Therefore, by using this as it is, it becomes possible to transfer data at 8 times speed.

Therefore, the data recording / reproducing apparatus having the above-mentioned configuration sends the data on the video data bus directly to another data recording / reproducing apparatus, and the video data from the other data recording / reproducing apparatus directly on the video data bus. Since it can be loaded, data can be moved or copied between devices at high speed.

It is needless to say that the present invention is not limited to the above-mentioned embodiments, and can be similarly implemented even if various modifications are made without changing the gist of the present invention.

[0033]

As described above, according to the present invention, it is possible to provide a data recording / reproducing apparatus capable of moving or copying data between apparatuses at high speed.

[Brief description of drawings]

FIG. 1 is a block circuit diagram showing a configuration when data is moved or copied between two video data recording / reproducing devices to which the present invention is applied, as an embodiment of a data recording / reproducing device according to the present invention.

FIG. 2 is a block circuit diagram showing a specific configuration of a bus interface unit used in the video data recording / reproducing apparatus of the embodiment.

FIG. 3 is a block circuit diagram showing a configuration of a video data recording / reproducing apparatus using a conventional semiconductor memory.

[Explanation of symbols]

1 ... CPU part, 2 ... Memory control part, 3 ... CPU bus, 4
... main memory section, 5 ... video data bus, 6 ... video data interface section, 7 ... bus interface section, 7
1, 72 ... Data input / output terminals, 73, 74 ... Input / output buffer circuit, 75, 76 ... Changeover switch, 77 ... Dual port memory, A, B ... Video data recording / reproducing device, C ...
Bus line cable.

Claims (2)

[Claims] 1. A data recording / reproducing apparatus having a function of moving or copying data to / from an external device in response to a command from a control processing unit with respect to a main memory unit having a semiconductor memory as a recording medium, A bus interface unit including a data bus for transferring data to the main memory unit and a dual port memory interposed between the data bus and a bus line cable connected to an external device and capable of reading and writing simultaneously The bus interface unit writes the data on the data bus to the dual port memory at the same time when it receives a transmission command from the control processing unit and simultaneously reads the data from the memory and transmits the data to the bus line cable. And a bus line cable when receiving a reception command from the control processing unit. The data recording / reproducing apparatus has a function of writing the data from the memory to the dual port memory and simultaneously reading the data from the memory and sending the data to the data bus. 2. The data recording / reproducing apparatus according to claim 1, wherein the data is video data, and the dual port memory has a data storage capacity of video data in units of lines or fields.