JPH07177122A - Time division multiplex signal transmitter - Google Patents

Time division multiplex signal transmitter

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Publication number
JPH07177122A
JPH07177122A JP5321602A JP32160293A JPH07177122A JP H07177122 A JPH07177122 A JP H07177122A JP 5321602 A JP5321602 A JP 5321602A JP 32160293 A JP32160293 A JP 32160293A JP H07177122 A JPH07177122 A JP H07177122A
Authority
JP
Japan
Prior art keywords
signal
time division
control signal
time
clock
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP5321602A
Other languages
Japanese (ja)
Other versions
JP2933480B2 (en
Inventor
Shunichi Kajitani
俊一 梶谷
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP32160293A priority Critical patent/JP2933480B2/en
Publication of JPH07177122A publication Critical patent/JPH07177122A/en
Application granted granted Critical
Publication of JP2933480B2 publication Critical patent/JP2933480B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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  • Time-Division Multiplex Systems (AREA)

Abstract

PURPOSE:To attain multiplex transmission to a signal plural kinds of transmission speeds by using a clock frequency as a control signal switching and selecting a time division multiplexer or a time division demultiplexer in matching with a transmission speed. CONSTITUTION:When a digital input signal is applied to an input terminal in a serial form respectively, the route of the signal is selected by changeover devices 3-1 to 3-n corresponding to a control signal selecting and instructing an output route given from a control signal input terminal 2 and the signal is subjected to time division multiplexing by any of time division multiplexers 4-1 to 4-n. In this case, the control signal is used to selected the time division multiplexer suitable for the transmission speed of the input signal and a changeover device 5 is used to select the transmission signal and it is subjected to electrooptic conversion. Then a clock identification circuit 10 extracts a clock included in the signal converted by a photoelectric converter 8 and generates a control signal used to select any of time division demultiplexers 12-1 to 12-n. Then the signal demultiplexed by the selected time division demultiplexer is outputted from changeover device 13-1 to 13-n to an output terminal.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、信号伝送系に用いられ
る時分割多重信号伝送装置に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a time division multiplexing signal transmission device used in a signal transmission system.

【0002】[0002]

【従来の技術】従来のこの種の時分割多重信号伝送装置
は、図2に例示するように、入力端子1−1ないし21
−nに接続された時分割多重器22、電気光変換器2
3、光ファイバ24、光電気変換器25ならびに出力端
子27−1ないし27−nに接続された時分割分離器2
6を縦続に接続して構成されている。
2. Description of the Related Art A conventional time division multiplex signal transmission device of this type is, as illustrated in FIG. 2, input terminals 1-1 to 21.
-N connected to the time division multiplexer 22, the electro-optical converter 2
3, the optical fiber 24, the photoelectric converter 25, and the time-division separator 2 connected to the output terminals 27-1 to 27-n
6 are connected in cascade.

【0003】このような構成において、入力端子21−
1ないし21−nにそれぞれ入力信号が供給されると、
時分割多重器22で時分割多重化され、電気光変換器2
3で光信号に変換されて、光ファイバ24を経由し伝送
された後、光電気変換器25で再び電気信号に戻され、
時分割分離器26で多重化信号の分離が行われ、出力端
子27−1ないし27−nにそれぞれ出力される。
In such a structure, the input terminal 21-
When an input signal is supplied to each of 1 to 21-n,
The time-division multiplexer 22 time-division multiplexes the electric-optical converter 2
3 is converted into an optical signal, transmitted through the optical fiber 24, and then converted back into an electric signal by the photoelectric converter 25,
The time division demultiplexer 26 demultiplexes the multiplexed signals and outputs the demultiplexed signals to the output terminals 27-1 to 27-n, respectively.

【0004】[0004]

【発明が解決しようとする課題】上述した従来の時分割
多重信号伝送装置では、予め決められた一種類の伝送速
度の信号しか多重化伝送ができないという欠点がある。
The above-mentioned conventional time-division multiplex signal transmission device has a drawback in that only signals of one predetermined transmission rate can be multiplexed and transmitted.

【0005】[0005]

【課題を解決するための手段】本発明の時分割多重信号
伝送装置は、おのおのシリアル形式のディジタル入力信
号を受けて、複数の送出端のうちの一つを表わす第1の
制御信号に応じ切り換え送出する複数の第1の切換器
と、その第1の切換器の各出力信号を受けて時分割多重
化する周波数の異なる複数の時分割多重器と、前記時分
割多重器の各出力信号のうちの一つを選択し送出する第
2の切換器と、該切換信号が送出する電気信号を光信号
に変換する電気光変換器と、その光信号を伝送する光フ
ァイバと、前記光信号を電気信号に変換する光電気変換
器と、その変換された電気信号からクロック成分を取り
出すクロック抽出器と、前記光電気変換器からの電気信
号を複数の送出端のうちの一つに切り換える第3の切換
器と、前記抽出したクロックの周波数に応じて前記第3
の切換器を切り換えるための第2の制御信号を発生する
クロック識別回路と、前記第3の切換器の出力信号を受
けて時分割多重を分離する複数の時分割分離器と、前記
第2の制御信号に応じて前記時分割分離器の各出力信号
のうちの一つを切り換え選択して出力する複数の第4の
切換器とを備えている。
The time division multiplex signal transmission apparatus of the present invention receives a serial-type digital input signal for each and switches in response to a first control signal representing one of a plurality of transmission ends. A plurality of first switching devices to be transmitted, a plurality of time-division multiplexers of different frequencies for time-division-multiplexing each output signal of the first switching device, and output signals of the time-division multiplexer. A second switch for selecting and sending one of the signals, an electro-optical converter for converting an electric signal sent by the switching signal into an optical signal, an optical fiber for transmitting the optical signal, and the optical signal A photoelectric converter for converting into an electric signal, a clock extractor for extracting a clock component from the converted electric signal, and a third for switching the electric signal from the photoelectric converter to one of a plurality of sending ends. Switcher of the above and extracted Wherein according to the frequency of the locking third
A clock discriminating circuit for generating a second control signal for switching the switch, a plurality of time division separators for receiving the output signal of the third switch to separate the time division multiplex, and the second. And a plurality of fourth switching devices for selectively selecting and outputting one of the output signals of the time division separator according to the control signal.

【0006】[0006]

【実施例】次に、本発明について図面を参照して説明す
る。
DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, the present invention will be described with reference to the drawings.

【0007】図1は、本発明の一実施例を示すブロック
図である。図1において、参照符号1−1ないし1−n
は入力端子、2は制御信号入力端子、3−1ないし3−
nは切換器、4−1ないし4−nは時分割多重器、5は
切換器、6は電気光変換器、7は光ファイバ、8は光電
気変換器、9はクロック抽出器、10はクロック識別回
路、11は切換器、12−1ないし12−nは時分割分
離器、13−1ないし13−nは切換器、14−1ない
し14−nは出力端子を、それぞれ示す。
FIG. 1 is a block diagram showing an embodiment of the present invention. In FIG. 1, reference numerals 1-1 to 1-n
Is an input terminal, 2 is a control signal input terminal, 3-1 to 3-
n is a switch, 4-1 to 4-n is a time division multiplexer, 5 is a switch, 6 is an electro-optic converter, 7 is an optical fiber, 8 is an opto-electric converter, 9 is a clock extractor, 10 is A clock discrimination circuit, 11 is a switch, 12-1 to 12-n are time division separators, 13-1 to 13-n are switchers, and 14-1 to 14-n are output terminals.

【0008】動作時に、入力端子1−1ないし1−nに
それぞれシリアル形式でディジタル入力信号が供給され
ると、制御信号入力端子2から与えられる出力ルートを
選択指示する制御信号に応じて切換器3−1ないし3−
nで切り換えられ、おのおの時分割多重器4−1ないし
4−nのいずれか1つに接続されて、時分割多重化され
る。このとき制御信号は、入力信号の伝送速度に適合す
る時分割多重器4−1ないし4−nの1つを選択し、ま
た時分割多重化器4−1ないし4−nの1つの送出信号
を切換器5で選択して電気光変換器6へ送らせる。その
送出信号は、電気光変換器6で光信号に変換され、光フ
ァイバ7で伝送される。光電気変換器8はその光信号を
電気信号に戻し、クロック抽出器9はその電気信号に含
まれているクロックを抽出し、クロック識別回路10で
時分割分離器12−1ないし12−nのいずれか1つを
選択するための制御信号を発生させて切換器11,13
−1ないし13−nに与え、時分割分離器12−1ない
し12−nのうちの1つで分離された信号を切換器13
−1ないし13−nから出力端子14−1ないし14−
nへ出力させる。
In operation, when a digital input signal is supplied in serial form to each of the input terminals 1-1 to 1-n, the switching device is selected according to the control signal for selecting the output route from the control signal input terminal 2. 3-1 to 3-
n, and each of them is connected to any one of the time division multiplexers 4-1 to 4-n and time division multiplexed. At this time, the control signal selects one of the time division multiplexers 4-1 to 4-n that matches the transmission rate of the input signal, and also outputs one of the time division multiplexers 4-1 to 4-n. Is selected by the switch 5 and sent to the electro-optical converter 6. The transmitted signal is converted into an optical signal by the electro-optical converter 6 and transmitted by the optical fiber 7. The opto-electric converter 8 returns the optical signal to an electric signal, the clock extractor 9 extracts the clock contained in the electric signal, and the clock discriminating circuit 10 operates the time division demultiplexers 12-1 to 12-n. A control signal for selecting any one is generated to switch the switches 11 and 13.
-1 to 13-n, and the signal separated by one of the time division separators 12-1 to 12-n is switched by the switch 13
-1 to 13-n to output terminals 14-1 to 14-
output to n.

【0009】このように時分割多重器4−1ないし4−
n、ならびに時分割分離器12−1ないし12−nを複
数種の伝送速度のいずれか1つに適合するように選定し
て設けておくことにより、複数種の伝送速度の信号に対
し多重化伝送できる装置が得られる。
As described above, the time division multiplexers 4-1 to 4-
n and time division separators 12-1 to 12-n are selected and provided so as to be suitable for any one of a plurality of types of transmission rates, so that signals of a plurality of types of transmission rates are multiplexed. A device that can be transmitted is obtained.

【0010】[0010]

【発明の効果】以上説明したように本発明によれば、ク
ロック周波数を制御信号として使い、時分割多重器およ
び分離器を切り換えて選択させることによって、複数種
の伝送速度の信号を多重化伝送できる。
As described above, according to the present invention, a clock frequency is used as a control signal, and a time division multiplexer and a separator are switched and selected, whereby signals of a plurality of transmission rates are multiplexed and transmitted. it can.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の一実施例を示すブロック図。FIG. 1 is a block diagram showing an embodiment of the present invention.

【図2】従来の時分割多重信号伝送装置を例示するブロ
ック図。
FIG. 2 is a block diagram illustrating a conventional time division multiplex signal transmission device.

【符号の説明】 1−1ないし1−n 入力端子 2 制御信号入力端子 3−1ないし3−n 切換器 4−1ないし4−n 時分割多重器 5 切換器 6 電気光変換器 7 光ファイバ 8 光電気変換器 9 クロック抽出器 10 クロック識別回路 11 切換器 12−1ないし12−n 時分割分離器 13−1ないし13−n 切換器 14−1ないし14−n 出力端子[Description of Reference Signs] 1-1 to 1-n input terminal 2 control signal input terminal 3-1 to 3-n switcher 4-1 to 4-n time division multiplexer 5 switcher 6 electro-optical converter 7 optical fiber 8 photoelectric converter 9 clock extractor 10 clock identification circuit 11 switcher 12-1 to 12-n time division separator 13-1 to 13-n switcher 14-1 to 14-n output terminal

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】 おのおのシリアル形式のディジタル入力
信号を受けて、複数の送出端のうちの一つを表わす第1
の制御信号に応じ切り換え送出する複数の第1の切換器
と、その第1の切換器の各出力信号を受けて時分割多重
化する周波数の異なる複数の時分割多重器と、前記時分
割多重器の各出力信号のうちの一つを選択し送出する第
2の切換器と、該切換信号が送出する電気信号を光信号
に変換する電気光変換器と、その光信号を伝送する光フ
ァイバと、前記光信号を電気信号に変換する光電気変換
器と、その変換された電気信号からクロック成分を取り
出すクロック抽出器と、前記光電気変換器からの電気信
号を複数の送出端のうちの一つに切り換える第3の切換
器と、前記抽出したクロックの周波数に応じて前記第3
の切換器を切り換えるための第2の制御信号を発生する
クロック識別回路と、前記第3の切換器の出力信号を受
けて時分割多重を分離する複数の時分割分離器と、前記
第2の制御信号に応じて前記時分割分離器の各出力信号
のうちの一つを切り換え選択して出力する複数の第4の
切換器とを備えていることを特徴とする時分割多重信号
伝送装置。
1. A first input for receiving each serial-type digital input signal and representing one of a plurality of output terminals.
A plurality of first switchers for switching and transmitting according to the control signal, a plurality of time-division multiplexers of different frequencies for time-division-multiplexing each output signal of the first switcher, and the time-division multiplexer. Second switch for selecting and sending one of the output signals of the converter, an electro-optical converter for converting the electric signal sent by the switching signal into an optical signal, and an optical fiber for transmitting the optical signal An opto-electric converter for converting the optical signal into an electric signal, a clock extractor for extracting a clock component from the converted electric signal, and an electric signal from the opto-electric converter among a plurality of sending ends. A third switch for switching to one, and the third switch according to the frequency of the extracted clock
A clock discriminating circuit for generating a second control signal for switching the switch, a plurality of time division separators for receiving the output signal of the third switch to separate the time division multiplex, and the second. A time-division multiplex signal transmission device, comprising: a plurality of fourth switching devices for selectively switching and outputting one of the output signals of the time-division separator according to a control signal.
【請求項2】 前記第1の制御信号は、前記ディジタル
入力信号のクロック成分である請求項1記載の時分割多
重信号伝送装置。
2. The time division multiplexed signal transmission device according to claim 1, wherein the first control signal is a clock component of the digital input signal.
JP32160293A 1993-12-21 1993-12-21 Time division multiplex signal transmission equipment Expired - Fee Related JP2933480B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP32160293A JP2933480B2 (en) 1993-12-21 1993-12-21 Time division multiplex signal transmission equipment

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP32160293A JP2933480B2 (en) 1993-12-21 1993-12-21 Time division multiplex signal transmission equipment

Publications (2)

Publication Number Publication Date
JPH07177122A true JPH07177122A (en) 1995-07-14
JP2933480B2 JP2933480B2 (en) 1999-08-16

Family

ID=18134371

Family Applications (1)

Application Number Title Priority Date Filing Date
JP32160293A Expired - Fee Related JP2933480B2 (en) 1993-12-21 1993-12-21 Time division multiplex signal transmission equipment

Country Status (1)

Country Link
JP (1) JP2933480B2 (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2012529817A (en) * 2009-06-12 2012-11-22 アルカテル−ルーセント Variable bit rate equipment
CN111092618A (en) * 2019-12-23 2020-05-01 珠海全志科技股份有限公司 Frequency adjusting method and device of system-on-chip frequency modulation equipment

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2012529817A (en) * 2009-06-12 2012-11-22 アルカテル−ルーセント Variable bit rate equipment
CN111092618A (en) * 2019-12-23 2020-05-01 珠海全志科技股份有限公司 Frequency adjusting method and device of system-on-chip frequency modulation equipment

Also Published As

Publication number Publication date
JP2933480B2 (en) 1999-08-16

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