JPH07174584A - Optical absolute scale - Google Patents

Abstract

PURPOSE:To provide an optical absolute scale having various resolutions by using one kind LPF of. CONSTITUTION:A clock from a clock generator 41 is frequency-divided by a carrier-wave generation circuit 27, and carrier waves are generated. The clock from the clock generator 41 is frequency-divided in a frequency-dividing ratio which is set by a programmable frequency divider 42 in such a way that it is used as the counting clock of a counter 25 and that it is used as the counting clock of a cycle measuring counter for a phase division part 36. Then, the number of pulses which are counted by the counter 25 in one cycle of the carrier waves is decided by the frequency-dividing ratio of the programmable frequency divider 42. As a result, the resolution of the optical absolute scale can be changed by a frequency-dividing value which is set by a setting means 43.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an optical absolute scale for measuring the amount of relative movement between two objects, and more particularly to an optical absolute scale whose resolution can be changed.

[0002]

2. Description of the Related Art In a machine tool or the like, it is extremely important to accurately measure the relative movement amount of a tool with respect to a workpiece, and various measuring devices for this purpose have been commercialized. . As one of them, an optical scale using a moire fringe obtained by superimposing two optical gratings has been conventionally known. This optical scale is a transparent glass scale 10 as shown in FIG.
0 has a main scale 101 provided with a grid so that light-transmitting parts and non-light-transmitting parts are arranged at a predetermined pitch, and transparent glass scale 102 has one surface having light-transmitting parts and non-light-transmitting parts at a predetermined pitch. And an index scale 103 provided with a grid so as to be arranged. As shown in FIG. 7A, the index scale 103 is opposed to the main scale 101 with a minute interval, and shown in FIG. As described above, the grid of the index scale 103 is arranged so as to be tilted at a minute angle with respect to the grid of the main scale 101.

The lattices provided on the main scale 101 and the index scale 103 are the glass scale 1
00 and 102 are formed by scribed lines having the same pitch formed by vacuum-depositing chromium on 00 and 102 and etching. With this arrangement, the moire fringes shown in FIG. 12 occur. The interval between the moire fringes is W, and a dark portion or a bright portion is generated at each interval W. This dark part or bright part is
The index scale 103 moves from the top to the bottom or from the bottom to the top according to the direction in which the index scale 103 relatively moves to the left and right. In this case, when the pitch of the grids of the main scale 101 and the index scale 103 is P and the mutual inclination angle is θ [rad], the moire fringe interval W is expressed as W = P / θ, and the moire fringe interval W Means that the grating interval P is optically expanded by 1 / θ times. Therefore, when the lattice moves P, the moire fringes move W, and by reading the enlarged change in W, the amount of movement of the lattice can be accurately measured.

Therefore, the index scale is provided with a photoelectric conversion element 110 for optically detecting a change in moire fringes.
A light source is provided on the opposite side of the main scale so that the index scale 103
When the change in the current flowing through the photoelectric conversion element 110 is read while moving the relative distance, the result is as shown in FIG. That is, when the index scale 103 is in the state of A with respect to the main scale 101, the photoelectric conversion element 110 is irradiated with the largest amount of light, and the current flowing through the photoelectric conversion element 110 has the maximum value I ₁ . Next, when relatively moving to the state B, the amount of light applied to the photoelectric conversion element 110 is slightly reduced, and the current becomes I ₂ ,
Furthermore, when the photoelectric conversion element 110 is moved to the C state, the photoelectric conversion element 110 is irradiated with the smallest amount of light and the current thereof is also the smallest.
It becomes ₃ . Then, when further moving to the state of D, the amount of light applied to the photoelectric conversion element 110 slightly increases, and the current becomes I ₂ , and when moving to the state of E, it becomes the position with the largest amount of light again. The current has a maximum value I ₁ . In this way, the current flowing through the photoelectric conversion element 110 changes in a sine wave shape, and when one cycle of the change has elapsed, the main scale 101 and the index scale 103 relatively move by the lattice spacing P.

In FIG. 13, only one photoelectric conversion element 110 is provided, but as shown in FIG. 14, two photoelectric conversion elements 1 are shifted by 90 ° from one period (interval W).
By providing 11, 112, the B-phase photoelectric conversion element 11 with respect to the current flowing in the A-phase photoelectric conversion element 111.
The current flowing in 2 is a current shifted by 90 ° as shown in FIG. That is, assuming that the current flowing in the A-phase photoelectric conversion element 111 is a sine wave, the B-phase photoelectric conversion element 11
The current flowing through 2 becomes a cosine wave. In this case, depending on the relative moving directions of the main scale 101 and the index scale 103, the phase of the current flowing through the B-phase photoelectric conversion element 112 with respect to the current flowing through the A-phase photoelectric conversion element 111 is advanced by 90 ° or 90 °. 9 because it is late
Providing two photoelectric conversion elements that are arranged 0 ° apart,
By detecting the phase between the two, the relative movement direction can be detected.

FIG. 16 shows an outline of a perspective view of an optical scale using the principle described above. In this figure, one surface of the elongated main scale 101 is engraved with a grid of the same pitch formed by vapor-deposited chrome,
U-shaped holder 1 for holding the main scale 101
The index scale 103 is fixedly attached to one surface of 04. On the surface of the index scale 103 facing the main scale, a grid of the same pitch formed by chromium deposited in the same manner as the main scale 101 is engraved, and on the back side of the index scale 103 is a photoelectric conversion element. 113 is provided.

Further, as shown in FIG. 17, a light source 105 is fixed to the surface of the U-shaped holder 104 opposite to the main scale 101.
01 and the index scale 103 are movable with respect to each other. As mentioned above, the main scale 1
The grid of the index scale 103 is opposed to the grid of No. 01 with a minute interval as shown in FIG. 17, and is tilted by a minute angle.

FIG. 17 shows a cross-sectional view of the principle structure of the optical scale thus constructed. The light emitted from the light source 105 passes through the glass main scale 101, and the main scale and the index scale 103. After passing through the moire fringes formed by the grid engraved with, and further through the glass index scale 103, the light is received by the photoelectric conversion element 113. The photoelectric conversion elements 113 are connected to each other as shown in FIG.
An A-phase signal and a B-phase signal having a phase difference of ° are output, and the moving direction and the moving distance can be measured from the two signals as described above. The photoelectric conversion element 11
Three photoelectric conversion elements are provided in 3, but two of them output the A-phase signal and the B-phase signal, and the other one outputs a reference level signal. The reason is that the light received by the photoelectric conversion element changes sinusoidally, but the signal at the reference level (zero level) is not clear. Therefore, the average signal level of the received light is output from the third photoelectric conversion element as a reference level signal.

Next, FIG. 18 shows a block diagram of a processing circuit for a signal output from the optical scale shown in FIG.
In this figure, the light emitted from the light emitting diode 120, which is a light source, passes through the grids of the main scale and the index scale as described above, and the photoelectric conversion element 113.
Is received by the photodiode 121. A-phase signal and B received by the photodiode 121
The phase signal is amplified by the photoelectric conversion amplifier 122 and applied to the interpolation circuit 123. The interpolation circuit 123 generates an interpolation pulse for finely dividing the grid interval P, and the interpolation pulse is added or subtracted by the position data backup counter 124 depending on the moving direction to be used as position data. It is supplied to a processing circuit (not shown).

Further, the output pulse of the interpolation circuit 123 is supplied to a numerical control (NC) device as position data indicating the position data by the number of pulses. This data usually consists of an A-phase pulse signal and a B-phase pulse signal, and is data indicating the moving direction and the moving amount. When the interval P between the gratings provided on the main scale and the index scale is 40 μm, the interpolation circuit 123 interpolates 40 pulses in one cycle of the A-phase signal or the B-phase signal. Then, the resolution can be on the scale of 1 micron.

The optical scale configured as described above is
It is mounted on the NC machine tool to measure the relative movement amount of the work piece and the tool. Generally, when numerically controlling, it is programmed as the movement amount from the origin, so this relative movement amount is from the origin. It is necessary to measure it as the amount of movement. Therefore, an origin position is usually provided in advance on the main scale, the origin is detected when the index scale passes through this origin position, and this origin detection signal is supplied to the NC device to reset the origin position by resetting the NC device. The NC device was set up. Therefore, the setting of the origin must be performed every time the power of the NC device is turned on.

However, since the work of setting the origin each time the power is turned on is complicated, an optical absolute scale that always backs up the position of the scale has been commercialized. As shown in FIG. 18, a backup power supply is supplied to this optical absolute scale, and the position data of the scale is backed up by this backup power supply even when the power of the NC device is turned off. Further, since the tool or the work table may be moved even when the NC power is turned off, the optical scale needs to continuously measure its position data. Therefore, as shown in FIG. 18, the backup power supply supplies power to the entire optical absolute scale.

[0013]

In such an optical absolute scale, in order to change the resolution, it is necessary to change the number of pulses for interpolation within the reference period. In this case, the reference period is generated by dividing the clock from the clock generator by the frequency divider, and the interpolation pulse is generated directly from the clock generator,
The resolution is changed by changing the reference period by changing the division ratio of the frequency divider. Then, since the reference period changes depending on the resolution, it is necessary to change the LPF constant for smoothing the signal of the reference period. Therefore, it is necessary to prepare various LPFs having different constants, which is complicated and the cost cannot be reduced. Therefore,
An object of the present invention is to provide an optical absolute scale in which the LPF is commonly used regardless of the resolution.

[0014]

In order to achieve the above object, the present invention is such that when the resolution is changed, the reference period is kept constant and the frequency of the interpolating pulse is changed instead of the reference period. . Further, according to the present invention, an interpolating pulse is generated by dividing a clock by a programmable frequency divider which can have an arbitrary frequency division number.

[0015]

According to the present invention, the resolution can be set by the division ratio of the programmable frequency divider. Further, since the reference cycle is constant even if the resolution is changed, the LPF can be shared regardless of the resolution.

[0016]

1 is a block diagram of an optical absolute scale which is a premise of the present invention. In the optical absolute scale shown in FIG. 1, light emitted from a light emitting diode 1 which is a light source passes through a grating having a pitch P engraved on a main scale and an index scale, and a photodiode 2 which is a photoelectric conversion element. Is received by. The A-phase signal and the B-phase signal received by the photodiode 2 are amplified by the photoelectric conversion amplifier 3 and applied to the comparator 4 to be binary data. The binary data is counted by the position data backup counter 5 every time the pitch P is moved, and is added or subtracted according to the moving direction to be position data in units of the pitch P.

Further, the A-phase signal and the B-phase signal from the photoelectric conversion amplifier 3 are supplied to the absolute interpolation circuit 6,
With this absolute interpolation circuit 6, the lattice pitch P
The interpolation data obtained by dividing the pitch P is output to a processing device (not shown) so as to count the interpolating pulses for finely dividing. Further, based on the signal applied from the absolute interpolation circuit 6, the phase division circuit 7 has a pitch P.
An output pulse signal in which the interpolation data obtained by dividing the inside is indicated by the number of pulses is generated and supplied to a numerical control (NC) device. The output pulse signal is usually composed of an A-phase pulse signal and a B-phase pulse signal, and is data indicating the moving direction and the moving amount.

When the interval P between the gratings provided on the main scale and the index scale is 40 μm, 40 A-phase signals or B-phase signals input to the absolute interpolation circuit 6 have 40 periods. By counting the pulses, an optical scale having a resolution of 1 micron can be obtained. Then, at the time of backup, power is supplied from the backup power supply to the position data backup counter 5, the comparator 4, the photoelectric conversion amplifier 3 and the light emitting diode 1, but not to the absolute interpolation circuit 6 and the phase division circuit 7. And, the power consumption has been reduced. Further, by switching the terminals provided in the photoelectric conversion amplifier 3 to reduce the speed, the power consumption of the photoelectric conversion amplifier 3 is reduced and the power source for driving the light emitting diode 1 is sampled by the sampling circuit 8 and a low current is supplied. Power consumption is reduced by dynamically driving with a low current. Since the comparator 4 and the position data backup counter 5 have a CMOS structure, power consumption is reduced.

Further, the signals input to the comparator 4 and the position data backup counter 5 are not interpolated signals, that is, the position data backup counter 5 counts every 40 microns when the grating pitch P is 40 microns. Therefore, the power consumption will be further reduced. That is, in the optical absolute scale shown in FIG. 1, only position data in units of the lattice spacing P is detected and held in the position data backup counter 5 at the time of backup, and when the power is turned on, the position within the lattice pitch P is kept. The divided interpolation data is generated by the absolute interpolation circuit 6 and the phase division circuit 7, and the count data of the position data backup counter 5 and the interpolation data obtained by dividing the pitch P by the absolute interpolation circuit 6 are processed. The present position is calculated by setting the present position data to the NC device by the processing by. Therefore, low power consumption backup can be achieved without lowering the resolution.

The absolute interpolation circuit 6 includes a phase modulation circuit 21 which gives a carrier a phase shift corresponding to the levels of the input A-phase signal and B-phase signal, and the phase modulation circuit 2.
A low-pass filter (LPF) 22 for smoothing the phase-shifted staircase-shaped output signal of 1;
A comparator 23 that binarizes the output signal of 2 and a counter 25 that starts counting at the edge of the carrier wave and stops counting at the edge of the output signal of the comparator 23.
And a clock generator 24 that generates a clock for the counter 25 to count and a clock for creating a carrier wave,
Divider 26 that divides the clock of clock generator 24
And a carrier wave generator 27 which generates a carrier wave from the output of the frequency divider 26, and is a circuit having a function of dividing the lattice pitch P in order to improve the resolution.

The phase modulator 21 is, for example, Japanese Patent Laid-Open No. 62-1.
The configuration is described in Japanese Patent No. 32104,
As shown in FIG. 2, the detailed configuration is such that the input A-phase signal is supplied to the resistance network RT via the operational amplifier OP1 that operates as a buffer, and also inverted by the operational amplifier OP2 and supplied to the resistance network RT. . The B-phase signal is supplied to the resistance network RT via the operational amplifier OP3 that operates as a buffer, and also inverted by the operational amplifier OP4 and supplied to the resistance network RT.

That is, the A-phase signal, the inverted A-phase signal, the B-phase signal, and the inverted B-phase signal are mixed and added by the resistance network RT to create a mixed signal divided into eight with opposite phases and the same voltage. 8 input terminals (0) ~
Supply to (7) respectively. This multiplexer A
The selection signals A, B and C shown in FIG. 3C are input to the input terminals C1, C2 and C3 of the M, and the selection signals A, B and C are input.
Thus, the input terminals (0) to (7) of the multiplexer AM are sequentially selected, and the staircase-shaped output signal S shown in FIG. 3A is output from the output terminal to. This multiplexer A
The frequency of the signal S output from M is the same as the cycle of the selection signal C as shown in FIG. 3, and in the end, the selection signal C is used as a carrier and its phase is changed to that of the A phase signal (B phase signal). The output signal S balanced-balanced according to the level is output from the multiplexer AM. That is, the carrier wave whose phase is shifted according to the level of the A-phase signal (B-phase signal) is output.

The carrier thus balanced-balanced is an LPF.
It is applied to 22 to form a smooth sine wave as shown in FIG. 3B, and the zero level point is converted into a binary signal by the comparator 23 as an edge. FIG. 4 shows the relationship between the phase of the binary signal output from the comparator 23 and the levels of the A-phase signal and the B-phase signal input to the absolute interpolation circuit 6. The sinusoidally changing signals shown on the left side of this figure are the A-phase signal and the B-phase signal, and the pulse waveform shown on the right side is the binary signal of the carrier wave from the comparator 23 that has undergone the phase shift. The position of the broken line is the position of the zero phase of the carrier wave supplied to the phase modulation circuit 21.

Then, as shown in (a) of this figure, when the A-phase signal is at the maximum positive level and the B-phase signal is at the zero level, 90
In the case of the phase B in which the A-phase signal is at the zero level and the B-phase signal is at the maximum positive level, the phase-shifted binary signal is regarded as a 180 ° phase-shifted binary signal. In the case of C in which the B-phase signal is at the negative maximum level and is at the zero level, it is regarded as a binary signal phase-shifted by 270 °, and the A-phase signal is at the zero level and B
In the case where the phase signal has a negative maximum level in the same figure, it is phase-shifted by 360 ° and becomes a binary signal returned to the original state in which the phase is not shifted.

In this way, the phase modulation circuit 21 and LPF2
2. Since the comparator 23 is configured, it is possible to obtain the interpolation data in which the lattice pitch P is divided. For example, the clock can be counted from the zero phase position of the carrier wave until the output of the comparator 23 rises to obtain interpolated data obtained by dividing the lattice pitch P. Therefore, when the counting of the counter 25 is started by the edge of the carrier wave from the carrier wave generating circuit 27 and stopped by the rising edge of the binary output of the comparator 23, the counter 25 divides the lattice pitch P. The inserted data can be detected. The counting pulse in this case is shown in FIG. However, in this figure, the clock generated by the clock generator is 40 times the frequency of the carrier wave generated by the carrier wave generator 27 (the frequency divider 26 divides the frequency by 1/40).

FIG. 5A shows the clock generated from the clock generator 24, and FIG. 5B shows the case shown in FIG. 4A, in which the counter 25 counts 10 clocks. Further, FIG. 4C shows the case shown in FIG.
The counter 25 counts 20 clocks. further,
4D shows the case shown in FIG. 4C, in which the counter 25 counts 30 clocks. Further, FIG.
2), and the phase shift is set to 360 °, so that the counter 25 has no clock to count. In this way, if the frequency of the clock counted by the counter 25 is 40 times the carrier frequency, the counter 25 counts pulses every time the lattice pitch P is moved by 40. Therefore, the resolution is increased. Can be multiplied by 40. Therefore, when the grating pitch is 40 μm, the resolution can be 1 μm. That is,
The number of pulses to be interpolated is “40”. At this time, the carrier generation circuit 27 has a division ratio of "40".
The clock divided by the frequency divider 26 set to is supplied, but the frequency division ratio of the frequency divider 26 is set to, for example, "2.
When set to "00", a resolution of 0.2 micron can be obtained.

Next, a block diagram of the phase division circuit 7 is shown in FIG.
Shown in. As shown in FIG. 6, the phase division circuit 7 includes a cycle counter 31 that measures the cycle of the output signal of the comparator 23 of the absolute interpolation circuit 6, and a cycle measurement counter 31.
32 for subtracting a predetermined set value from the count value of
And the up-down counter 33 that counts the feedback pulse FB generated from the AB-phase pulse generator 34 until the subtracted value from the subtractor 32 is preset and the count value becomes zero, and the equal value from the up-down counter 33. In response to the signal EQ and the direction signal DIR,
A feedback pulse FB is generated one pulse at a time until the equal signal EQ disappears, and an A-phase pulse signal and a B-phase pulse signal are generated by the feedback pulse FB and the direction signal DIR and supplied to an NC device or the like. It is composed of a phase pulse generator 34 and a reference clock generator 35 for generating a clock counted by the cycle measuring counter 31.

The period measuring counter 31 is a counter for measuring the period of the carrier wave phase-modulated by the phase modulating circuit 21 in the absolute interpolation circuit 6, and when the main scale and the index scale are relatively stationary. , The period of the phase-modulated carrier wave is not changed, and 40 reference clocks are counted as shown in FIG. However, at this time, the number of interpolation pulses in the absolute interpolation circuit 6 is set to "40", and the resolution is improved 40 times. That is, the reference clock and the clock from the clock generator 24 in the absolute interpolation circuit 6 have the same frequency. Therefore, the clock generated from the clock generator 24 in the absolute interpolation circuit 6 is usually the reference clock. The period measurement counter 31 also counts as the same.

Further, when the main scale and the index scale relatively move leftward by 1 μm, for example, the period of the phase-modulated carrier becomes short as shown in FIG. 39 clocks
When the pulse moves, and conversely moves 1 μm to the right, for example, the period of the phase-modulated carrier wave becomes long as shown in FIG. 7C, and the count clock number of the period measuring counter 31 becomes 41 pulses. . As described above, the pulse width of the phase-modulated carrier input to the period measurement counter 31 changes while moving, because the phase of the carrier modulated by the phase modulator 21 continuously shifts as the carrier moves. This is because it is the same as the frequency changing.

In this way, the data of the period of the phase-modulated carrier measured by the period measuring counter 31 is supplied to the subtractor 32, and the set value "40" is subtracted.
Therefore, in the case of FIG. 7A, “0” is output from the subtractor 32 and “0” is preset in the up / down counter 33. Further, in the case of FIG. 7B, "-1" is output from the subtractor 32, and "-1" is preset in the up / down counter 33. Further, in the case of (c), "1" is output from the subtractor 32, and the up-down counter 33 is preset with "1". The subtractor 32
Since the set value set to is the same as the number of pulses to be interpolated within the grating pitch P, “40” was set as the set value, but the number of pulses to be interpolated in the absolute interpolation circuit 6 was “200”. In this case, the set value is "200".

Next, the operation of the up / down counter 33 and the AB phase pulse generator 34 will be described with reference to FIG. 8. In this figure, as an example, the up / down counter 33 is labeled with "3" or "-3". It shows the case of presetting. First, as shown in FIG. 8A, when “3” is preset in the up / down counter 33, an equal signal EQ which becomes “L” level from the counter 33 when the count value is not “0”, An "H" level direction signal DIR indicating the moving direction is output as shown in FIGS. Then, the AB phase pulse generator 3
4 receives the signal EQ and the signal DIR, generates one pulse (A1) of the feedback pulse FB and supplies it to the up / down counter 33, as shown in FIG.

At this time, since the signal DIR is at "H" level, the up / down counter 33 counts down by the feedback pulse FB and the counted value becomes "2", but the "L" level state of the signal EQ is maintained. Therefore, one pulse (A2) of the feedback pulse FB is further generated, and the up / down counter 33 is further down-counted by this feedback pulse FB, and the count value becomes “1”. However, since the “L” level state of the signal EQ is maintained, the feedback pulse F
One pulse (A3) of B is generated, and the up / down counter 33 counts down by this feedback pulse FB, and the count value becomes “0”, and the equal signal EQ.
Becomes "H". Therefore, the feedback pulse FB output from the AB phase pulse generator 34 is stopped.

On the other hand, in the AB phase pulse generator 34,
As shown in FIGS. 8 (e) and (f), the A-phase pulse signal is inverted to the “H” level at the falling edge of the feedback pulse FB of A1, and the B-phase pulse signal is changed to B at the falling edge of the feedback pulse FB of A2. The phase pulse signal is inverted to “H” level, and further, the A phase pulse signal is inverted to “L” level at the falling edge of the feedback pulse FB of A3. When the count value of the up-down counter 33 is "0" and the moving direction is reversed, the direction signal DIR is inverted to "L" level as shown in FIG. 8C, and the moving amount is, for example, "-3".
However, as shown in FIG.
Suppose it was preset to 3. Then, this counter 3
From FIG. 3, the equal signal EQ which becomes the “L” level when the count value is not “0” and the direction signal DIR of the “L” level which indicates the moving direction are output as shown in FIGS. It Then, the AB phase pulse generator 34
By receiving the signal EQ and the signal DIR, the feedback pulse FB is converted into one pulse (B1) as shown in FIG.
It is generated and supplied to the up / down counter 33.

At this time, since the signal DIR is at "L" level, the up / down counter 33 counts up by the feedback pulse FB and the counted value becomes "-2", but the signal EQ is at "L" level. Is maintained,
Further, one pulse (B2) of the feedback pulse FB is generated, and the up / down counter 33 is further counted up by this feedback pulse FB, and the count value becomes “−1”. However, since the "L" level state of the signal EQ is maintained, one pulse (B3) of the feedback pulse FB is further generated, and the up / down counter 33 counts up by this feedback pulse FB, and the count value is "0". Next, equal signal EQ
Becomes "H". Therefore, the feedback pulse FB output from the AB phase pulse generator 34 is stopped. On the other hand, in the AB phase pulse generator 34, the A phase pulse signal is inverted to the “H” level by the falling edge of the feedback pulse FB of B1 as shown in FIGS. Pulse F
At the falling edge of B, the B-phase pulse signal is inverted to the “L” level, and the feedback pulse of B3 F
The falling edge of B inverts the A-phase pulse signal to the “L” level.

The A-phase pulse signal and the B-phase pulse signal thus generated are supplied to the NC device, and the NC device moves by detecting the edges of the supplied A-phase signal and B-phase signal. In addition to detecting the quantity pulse, the moving direction is detected from the phase relationship between the A and B phase pulse signals. Further, the position data from the position data backup counter 5 shown in FIG. 1 and the interpolation data obtained by dividing the lattice pitch P by the absolute interpolation circuit 6 are supplied to the processing device, and the position data backup counter 5 outputs the position data. The data is multiplied by 40 and added to the interpolation data from the absolute interpolation circuit 6 to calculate the position data when the power is turned on and set in the NC device. As a result, it becomes possible to perform backup when the power is turned off without consuming a small amount of power without reducing the resolution.

By the way, in the optical absolute scale shown in FIG. 1, when the resolution is changed, the frequency divider 2 is used.
The resolution was changed by changing the number of interpolation pulses by changing the division ratio of 6. That is, the division ratio is set to "4
If it is set to "0", 40 clocks can be interpolated within one cycle of the carrier wave, so that the resolution can be obtained by dividing the grating pitch P into 40, and if the division ratio is set to "200", The resolution can be obtained by dividing the grating pitch P into 200. When the resolution is changed in this way, the frequency of the carrier wave changes according to the resolution. Therefore, the constant of the LPF 22 that smoothes the output of the stepped phase modulation circuit 21 must be changed according to the frequency, that is, the resolution. However, the above-mentioned problems will occur.

Therefore, the present invention is configured such that the absolute interpolation circuit 6 and the phase division circuit 7 are configured as shown in FIG. 9 so that the resolution can be changed while keeping the frequency of the carrier wave constant. is there. The present invention will be described with reference to FIG. 9 and FIG. 10 showing a timing chart. The phase modulation circuit 21 uses a carrier wave according to the levels of the input A-phase signal and B-phase signal from the photoelectric conversion amplifier 3. The carrier wave from the generating circuit 27 is phase-shifted and output to the LPF 22. The output of the LPF 22 is converted by the comparator 23 into a pulse signal whose phase is shifted as shown in FIG. 4, and becomes a signal for controlling the counter 25.

The carrier generation circuit 27 receives the clock shown in FIG. 10A and receives the carriers A, B and C shown in FIG. 10C.
To occur. For example, the carrier wave A is generated by dividing the clock pulse shown in FIG. 7B by dividing the clock by 50, the carrier wave B is generated by dividing the carrier wave A by 2, and the carrier wave C is generated by dividing the carrier wave B. It is generated by dividing the frequency by two. In other words, the carrier A is the cycle of the clock divided by 100,
The carrier wave B has a cycle of a clock divided by 200, and the carrier wave C has a cycle of divided by 400. These carrier waves A, B, and C are supplied to the phase modulation circuit 21, and the carrier wave C is a signal for controlling the counter 25. The clock from the clock generator 41 that generates the clock supplied to the carrier wave generator circuit 27 is also supplied to the programmable frequency divider 42, and is set by the setting means 43 by the programmable frequency divider 42. It is divided by the dividing ratio and supplied to the counter 25 as a clock pulse.

Then, when the frequency division ratio of the programmable frequency divider 42 is set to "10", the clock pulse is 40 times as large as the carrier wave C as shown in FIG. The number of clock pulses counted in one cycle of the carrier wave C output from the carrier wave generator 27 is “40”. Therefore, a resolution that divides the grating pitch P into 40 can be obtained. Further, when the frequency division ratio of the programmable frequency divider 42 is set to "2", the frequency becomes 200 times the carrier wave C as shown in FIG. 10 (d), so the counter 25 counts in one cycle of the carrier wave C. The number of clock pulses is “200”. Therefore, the grid pitch P
It is possible to obtain a resolution that divides into 200.

The clock pulse output from the programmable frequency divider 42 is also supplied to the phase division circuit 7.
The phase division circuit 7 is composed of a phase division unit 36 and an AB phase pulse generator 34, and the constitution thereof is almost the same as the constitution shown in FIG. That is, the phase division unit 36
Is composed of a cycle measuring counter 31, a subtractor 32, and an up / down counter 33. The cycle measuring counter 31 is supplied with a clock pulse whose frequency is divided by a programmable frequency divider 42 as a reference clock signal.
The operation of the phase division circuit 7 is the same as that described above, so the description thereof will be omitted. However, as shown in FIG.
The phase pulse signal outputs the number of pulses and the moving direction information according to the phase shift of the carrier wave.

The A-phase pulse signal and the B-phase pulse signal are supplied to the NC device, and the NC device detects the movement amount pulse by detecting the edges of the supplied A-phase signal and B-phase signal. , The A, B phase pulse signals are used to detect the moving direction. Further, the position data from the position data backup counter (not shown) in units of the lattice pitch P and the interpolation data indicating the position within the lattice pitch P from the absolute interpolation circuit 6 are supplied to the processing device, and the position data backup is performed. The position data from the counter is multiplied by 40 and added to the interpolation data from the absolute interpolation circuit 6, and the current position data is calculated and set in the NC device. As described above, according to the present invention, the resolution can be variably set while the frequency of the phase-modulated carrier wave is kept constant. Therefore, it is possible to provide optical absolute scales having various resolutions by using one type of LPF. You can

[0042]

Since the present invention is configured as described above, the resolution can be changed by changing the set value of the frequency division ratio of the programmable frequency divider. Further, since it is possible to provide optical absolute scales with various resolutions by using one type of LPF, it is possible to reduce the cost.

[Brief description of drawings]

FIG. 1 is a block diagram of an optical absolute scale of the present invention.

FIG. 2 is a circuit diagram of a phase modulation circuit.

FIG. 3 is a timing diagram of a phase modulation circuit.

FIG. 4 is a timing diagram of an absolute interpolation circuit.

FIG. 5 is a timing diagram of interpolation pulses.

FIG. 6 is a block diagram of a phase division circuit.

FIG. 7 is a timing diagram of a cycle measurement counter.

FIG. 8 is an operation timing chart of the AB-phase pulse generator.

FIG. 9 is a block diagram of an optical absolute scale of the present invention.

FIG. 10 is a timing diagram of the optical absolute scale of the present invention.

FIG. 11 is a principle view of an optical scale.

FIG. 12 is a diagram showing moire fringes.

FIG. 13 is a diagram showing movement of moire fringes.

FIG. 14 is a diagram showing a position where a photoelectric conversion element is installed.

FIG. 15 is a waveform diagram of an A-phase signal and a B-phase signal.

FIG. 16 is a perspective view of an optical scale.

FIG. 17 is a sectional view of an optical scale.

FIG. 18 is a block diagram of an optical scale.

[Explanation of symbols]

 1,120 Light emitting diode 2,121 Photodiode 3,122 Photoelectric conversion amplifier 4,23 Comparator 5,124 Position data backup counter 6 Absolute interpolation circuit 7 Phase division circuit 21 Phase modulation circuit 22 LPF 24,41 Clock generator 25 Counter 26 frequency divider 31 period measurement counter 32 subtractor 33 up-down counter 34 AB phase pulse generator 36 phase divider 42 programmable frequency divider 43 setting means 101 main scale 103 index scale 104 U-shaped holder 105 light source 110, 111, 112,113 Photoelectric conversion element 123 Interpolation circuit

Claims (1)

[Claims] 1. An index scale movably arranged with respect to a main scale, and a sine wave-shaped A having a phase difference of 90 ° which changes by one cycle each time a unit length is relatively moved between the scales. A scale unit that generates a phase signal and a B phase signal, and a position in which the unit length is a unit by detecting the relative movement amount and the movement direction between the scales from the sinusoidal A phase signal and the B phase signal. A detection unit that outputs data, and an interpolation pulse signal that generates an interpolation pulse signal according to a predetermined phase shift of the sinusoidal A-phase signal and B-phase signal and outputs interpolation data that interpolates within the unit length. In the optical absolute scale, which is provided with an insertion means, and obtains the current position data from the position data output from the detection means and the interpolation data output from the interpolation means, The interpolation means includes a phase modulation circuit that gives a phase shift to a carrier wave according to the levels of the A-phase signal and the B-phase signal, and a comparator that converts the phase-shifted carrier wave from the phase modulation circuit into a binary signal. A counter that starts counting from the edge of the carrier wave and counts up to the edge of the binary signal; a carrier wave generator that divides the clock from the clock generator to generate the carrier wave; and A programmable frequency divider that generates a clock pulse that the counter counts by dividing the clock by an arbitrary dividing ratio that is set, and shifts the period of the carrier wave phase-shifted from the output from the comparator. A clock pulse from the programmable frequency divider is supplied to a phase division circuit that detects a shift and generates a pulse number according to the detected shift. Optical absolute scale.