JPH07169739A - Dry etching method - Google Patents

Abstract

PURPOSE:To prevent the undercut of a lower-layer resist pattern by dividing the etching of a lower resist layer into two stages and making the condition of the second etching process to be performed after an upper resist layer is etched off different from that of the first etching process. CONSTITUTION:An Al-Si-Cu alloy layer 2, lower resist layer 3, and SiO2-based intermediate layer 4 are formed on an SiO2-based interlayer insulating film 1 having a step. In addition, an upper-layer resist pattern 5 which is patterned to a prescribed shape is formed on the layer 4. Then the layers 4 and 3 of this substrate to be etched are etched by using the pattern 5 as a mask. As a result of the above-mentioned first etching process, the pattern 5 is also etched off and an intermediate-layer pattern 4a is exposed. However, the remaining part 3b of the lower resist layer 3 still exists in this stage. Therefore, the remaining part 3b is etched by changing the etching condition.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a dry etching method, and in particular, for example, in a multi-layer resist process, undercutting is prevented when anisotropically processing a lower layer resist which is an organic material layer to form a resist pattern, The present invention relates to a method of forming a lower layer resist pattern having no conversion difference.

[0002]

2. Description of the Related Art As semiconductor device design rules such as LSI are miniaturized from a level of half micron to quarter micron, requirements for fine processing technologies such as photolithography and dry etching are becoming more severe. . In photolithography technology, in recent years, in order to achieve fine design rules, the exposure wavelength has been shortened in order to obtain high resolution, and since the multilayer wiring structure has been adopted, the surface step of the underlying substrate has increased. The adoption of a multi-layer resist process is becoming essential. The multi-layer resist process includes a lower layer resist having a sufficient thickness to absorb a surface step of a base substrate and form a flat surface,
A thin intermediate layer made of an inorganic material for constituting a substantial mask pattern when etching the lower layer resist,
JM Morran et al., J. Vac. Sci. Technol., 16 , 1620, introduced the concept of a so-called three-layer resist process, which is used in combination with an upper layer resist that is thin enough to achieve high resolution.
(1979). Further, regarding the dry etching method of the multi-layer resist, a detailed commentary article is published in the monthly semiconductor world magazine, November 1987, pages 101 to 106.

A method of forming a resist pattern by the three-layer resist process will be described with reference to FIG.

FIG. 2A shows a sectional shape of the substrate to be etched on which the upper layer resist pattern 5 is formed in the three-layer resist process. That is, first, for example, Al which has this step on the interlayer insulating film 1 having the step is formed.
A base material layer 2 made of an alloy or the like is formed, a lower resist layer 3 having a sufficient thickness to absorb the step and form a flat surface, and a SiO ₂ -based intermediate layer made of, for example, spin coating glass (SOG). Layer 4, and then this middle layer 4
A thin upper resist layer is sequentially formed thereon in this order. The upper resist layer is patterned by photolithography and development to obtain the resist pattern 5 described above. Since the photolithography at this time is exposure on a flat surface, the resolution is high, and the upper layer resist pattern 5 has, for example, a density of 0.
It has a clear rectangular shape with a width of 35 μm.

Next, the intermediate layer 4 is patterned by RIE using the upper layer resist pattern 5 as a mask, as shown in FIG.
As shown in (b), the intermediate layer pattern 4a is formed. This intermediate layer pattern 4a also has a clear rectangular shape with a width of 0.35 μm.

Next, by using the upper resist pattern 5 and the intermediate layer pattern 4a as a mask, the lower resist layer 3 is anisotropically etched using O ₂ gas to obtain the desired lower layer as shown in FIG. 2 (c). A resist pattern 3a is formed. In this etching process, the thin upper resist pattern 5 is etched off and disappears midway.

Thereafter, the underlying material layer 2 is patterned by anisotropic etching such as RIE using the lower resist pattern 3a as a mask to obtain a desired Al alloy wiring pattern (not shown). At this time, the lower layer material layer may be etched while leaving the intermediate layer pattern 4a, or may be separately removed and the lower layer material layer 2 may be etched only by the lower layer resist pattern 3a. By performing such a multi-layer resist process, it becomes possible to form a base material layer having good controllability even on a stepped substrate, for example, an Al alloy wiring pattern.

By the way, as described above, RIE using O ₂ gas is generally used for etching the lower resist layer 3. The lower resist layer 3 is a layer formed to have a film thickness sufficient to absorb the step difference on the surface of the substrate to be etched based on the purpose of the three-layer resist process, and therefore high speed etching is required. Therefore, when a high gas pressure condition is set with the intention of improving the etching rate and oxygen radicals (hereinafter referred to as O ^* ) are increased to perform etching mainly by a radical reaction, O ^* wraps around to the lower portion of the intermediate layer pattern 4a, Undercutting occurs due to the isotropic oxidation reaction, and the shape of the lower layer resist pattern 3a deteriorates.

On the other hand, in order to prevent undercutting of the lower layer resist and achieve high anisotropic etching, conditions such as low gas pressure and high bias power that increase the mean free path of ions and the substrate bias are adopted. Will be required. In other words, high anisotropic etching is performed by utilizing the normal incidence of oxygen ions (hereinafter, referred to as O ⁺ ) and large kinetic energy to perform ion mode etching while simultaneously using sputtering. However,
Adopting such etching conditions makes it difficult to obtain a high etching rate and lowers the selection ratio with respect to the underlying material layer, and the underlying material layer is sputtered and a part of it is reused on the sidewall of the lower resist pattern 3a. Adhere to. This problem will be described with reference to FIG.

FIG. 3 shows a state where the lower layer resist pattern 3a is completed by the strong ion mode etching. Since the lower resist pattern on the step is thin, it is formed early. Then, the exposed underlying material layer 2 on the upper part of the step is continuously subjected to the undesired irradiation of O ⁺ until the lower resist pattern on the lower part of the step is formed. Therefore, the base material layer 2 is sputtered, and a part thereof adheres to the side wall of the lower layer resist pattern 3a to form the redeposited material layer 2a. Particularly when the underlying material layer 2 is a metal wiring material layer containing Cu, the redeposited material layer 2a is difficult to remove and remains on the substrate to become a particle contamination source.
Further, since the redeposited material layer increases the substantial line width of the lower resist pattern 3a, a dimensional conversion difference is likely to occur during etching of the base material layer.

The problem of the redeposited layer described above is, for example, the third one.
It is pointed out in Proceedings of the 3rd Joint Lecture on Applied Physics (Spring Annual Meeting 1986) p.542, Lecture No. 2p-Q-8, and is well known. It is clear that reducing the incident ion energy is effective in suppressing the formation of the redeposited layer, but this makes the aforementioned isotropic reaction predominant,
Anisotropy decreases and undercut occurs.

Therefore, the incident ion energy is reduced, and
A dry etching method for a lower resist layer that can achieve both high anisotropy and compatibility has been earnestly desired.

As a technique for responding to such a demand, the present applicant has not hitherto achieved it only by reducing the radical component and enhancing the ionic component, but rather by actively forming a side wall protective film by a reaction product of etching. We have applied for an invention based on the idea of utilizing this to achieve a highly anisotropic shape. That is, if the side wall protective film is also used, it is possible to reduce the ion incident energy while covering the O ^* attack and ensuring the etching rate to the extent that there is no practical problem.

For example, Japanese Unexamined Patent Publication No. 2-244625 discloses O₂
Use an etching gas with Cl-based gas added to
C, which is a reaction product of the resist and Cl-based gas
Cl _xAs a sidewall protection film while depositing a lower resist layer
The technique for performing anisotropic etching of is shown.

Further, Japanese Patent Application Laid-Open No. 4-084414 proposes a technique of controlling the substrate temperature at 50 ° C. or lower and etching the resist material layer using an etching gas mainly containing NH ₃ . According to this method, the reaction product containing N, C and O as constituent elements plays the role of a sidewall protective film.

Further, Japanese Patent Laid-Open No. 4-171726 discloses an O₂
Use an etching gas with a Br-based gas added to
C, which is a reaction product of the resist and the Br-based gas,
Br _xAs a sidewall protection film while depositing a lower resist layer
A technique for performing anisotropic etching of the above has been disclosed.

[0017]

The above-mentioned dry etching methods previously filed by the applicant of the present invention ensure that a practical etching rate is ensured and that anisotropic etching by low ion energy is carried out in a practical temperature range. This is an epoch-making technology in that By these techniques, reattachment of the base material layer to the side wall of the lower resist pattern by sputtering has been greatly suppressed.

However, when the device is highly integrated in the future and anisotropic processing of a finer lower resist pattern is performed, there is a concern that the processing size conversion difference may become apparent. This problem will be described with reference to FIG.

FIG. 4A shows a state in which the lower layer resist is etched halfway using the upper layer resist pattern and the intermediate layer pattern 4a as a mask, and the carbon-based side wall protective film 6 is formed on the side wall of the unfinished lower layer resist pattern. Are formed. The side wall protective film 6 contains carbon supplied from the upper layer resist pattern and the lower layer resist 3,
It is a reaction product with etching gas and prevents undercutting of the lower layer resist pattern and contributes to anisotropic processing. However, after the upper resist pattern is once etched off and the intermediate layer 4a is exposed, the supply of the reaction product is significantly reduced, so that the side wall protective film necessary for anisotropic processing of the lower resist layer is formed. However, when the etching of the remaining portion 3b of the lower resist layer is continued, a phenomenon that an undercut 7 occurs often occurs. The generation of the difference in processing dimension conversion of the lower layer resist pattern 3a due to such an undercut 7 is becoming an obstacle to the practical application of the multilayer resist process.

Therefore, an object of the present invention is to prevent undercutting in the patterning of the lower layer resist in the multi-layer resist process due to a decrease in the supply amount of the etching reaction product before and after the etching off of the upper layer resist, and to prevent a difference in size conversion. It is to provide a dry etching method excellent in directionality.

Another object of the present invention is to provide a clean dry etching method which prevents reattachment of the underlying material layer to the side wall of the lower resist pattern by sputtering and is free from particle contamination.

Still another object of the present invention is to achieve the above object while ensuring a practical etching rate.

[0023]

The dry etching method of the present invention was devised to solve the above-mentioned problems. The dry etching process of the lower resist layer is divided into two steps, and the upper resist pattern is etched off. The first dry etching step up to the above is performed and the second dry etching step after the upper layer resist pattern is etched off. The second dry etching step is different from the first dry etching step. The conditions were used.

In the dry etching method of the present invention, a mixed gas containing oxygen gas and a halogen-based gas is used, and the mixing ratio of the halogen-based gas is increased in the second etching step.

Further, the dry etching method of the present invention is
Using a mixed gas containing oxygen gas and halogen-based gas,
In the etching process, the etching pressure was reduced.

Furthermore, the dry etching method of the present invention uses a mixed gas containing an oxygen gas and a halogen-based gas,
A rare gas was added in the second etching step.

The dry etching method of the present invention is
Using a mixed gas containing oxygen gas and halogen-based gas,
In the etching process, the substrate bias voltage is increased.

[0028]

The point of the present invention is that the etching of the lower resist layer is divided into two stages, the first etching step until the upper resist is etched off, and the second etching step after the upper resist is etched off. And the condition of the second etching step is different from the condition of the first etching step. As a result, even after the upper layer resist pattern is etched off, the weakening of the side wall protective film forming function due to insufficient supply of the etching reaction product can be compensated for, and the undercut of the lower layer resist pattern can be prevented.

Further, in the present invention, the etching reaction product is etched by using a mixed gas of, for example, oxygen gas and halogen-based gas, which contributes to the formation of the side wall protective film, and the halogen is used in the second etching step. By increasing the mixing ratio of the system gases, it is possible to prevent the excessive presence of unreacted etching active species O ^* . At the same time, etching reaction products CCl _x , CBr
_It promotes the generation of _{x and the} like and strengthens the side wall protective film. This can prevent undercut of the lower layer resist pattern.

Further, in the present invention, etching is performed using a mixed gas of oxygen gas and halogen-based gas, and the etching pressure is lowered in the second etching step to increase the mean free path of O ⁺ , The high kinetic energy of the ions is used to achieve anisotropic etching and prevent undercut.

Further, in the present invention, etching is performed using a mixed gas of oxygen gas and halogen-based gas, and a rare gas is added in the second etching step so that the concentration of O ^* which is an etching active species is increased. Is relatively lowered, whereby undercut of the lower layer resist pattern can be prevented.

In the present invention, etching is performed using a mixed gas of oxygen gas and halogen-based gas, and in the second etching step, the substrate bias voltage is increased to increase the kinetic energy of ions and increase the anisotropy. It achieves etching and prevents undercutting.

By the way, as a technical idea of dividing the etching condition into two stages when patterning the lower layer resist in the three-layer resist process, as an example, a method of changing the etching condition after a part of the underlying material layer is exposed is known. . That is, the overetching conditions are made different to prevent, for example, damage to the underlying material layer. The conventional two-step etching described here is different from the technical idea of the present invention, which compensates for the decrease in the reaction products involved in the formation of the sidewall protective film when the upper resist layer is etched off.

[0034]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Specific embodiments of the present invention will be described below with reference to the drawings.

Example 1 In this example, Al-1 was used in a three-layer resist process.
When the lower layer resist layer formed on the base material layer made of% Si-0.5% Cu alloy is patterned using a mixed gas of O ₂ and Cl ₂ , the etching is divided into two steps to form an upper layer resist pattern. C after being etched off
This is an example in which etching is performed with a higher mixing ratio of l ₂ .
This dry etching method will be described with reference to FIG.
In the figure, the same parts as those described in the related art are designated by the same reference numerals.

First, as shown in FIG. 1A, as a substrate to be etched, a stepped SiO ₂ -based interlayer insulating film 1 is formed on a Si wafer having a diameter of 5 inches, for example.
The Al-1% Si-0.5% Cu alloy layer 2 having this step difference is formed by O.D. It is formed to a thickness of 7 μm and is used as a base material layer. It should be noted that the lower layer wiring and the like below the interlayer insulating film 1 are omitted here. Next, as an example, a novolac-based positive photoresist (manufactured by Tokyo Ohka Kogyo Co., Ltd., trade name OFPR-800) is applied thereon to form the lower resist layer 3. Here, the thickness of the lower resist layer 3 corresponding to the lower part of the step is about 1.0 μm, and the surface is formed so as to absorb the step and become a flat surface. On the lower resist layer 3, SOG (trade name OCD-Type2 manufactured by Tokyo Ohka Kogyo Co., Ltd.) was spin-coated to a thickness of about 0.
A 2 μm SiO ₂ -based intermediate layer 4 is formed. Further, an upper layer resist pattern 5 patterned into a predetermined shape is formed on the intermediate layer 4. The upper resist pattern 5 is, for example, a negative chemically amplified resist (made by Shipley, trade name SAL-601) and has a thickness of about 0.7 μm.
The coating film of m is subjected to KrF excimer laser exposure and development processing to be formed. The pattern width of the upper layer resist pattern 5 is 0.35 μm, for example.

Next, the substrate to be etched is set in, for example, a hex type dry etching apparatus, and the intermediate layer 4 is etched using the upper layer resist pattern 5 as a mask. The etching conditions at this time are as follows, for example. CHF ₃ 75 sccm O ₂ 8 sccm Gas pressure 6.5 Pa RF bias power 1350 W (13.56 MH
z) As a result, as shown in FIG. 1B, the intermediate layer pattern 4a was formed immediately below the upper layer resist pattern 5.

Next, this substrate to be etched was transferred to an RF bias application type ECR plasma etching apparatus, and the lower resist layer 3 was etched under the following conditions as an example. O ₂ 40 sccm Cl ₂ 10 sccm Gas pressure 2.0 Pa Microwave power 900 W (2.45 GHz) RF bias power 200 W (2 MHz) Substrate temperature Room temperature

In the above etching process, the lower resist layer 3 is etched by a mechanism in which isotropic oxidation reaction by O ^* is assisted by ions such as O ⁺ and Cl ⁺ , and at the same time, the upper resist pattern 5 is etched. proceed. In addition, the etching gas and the upper resist pattern 5
Further, a reaction product CCl _x is generated due to the carbon-based decomposition product supplied from the lower resist layer 3, which is polymerized in plasma to form a carbon-based plasma polymer. This carbon-based plasma polymer is deposited on the side wall of the pattern to form the side wall protection film 6 and contributes to anisotropic etching. As a result, as shown in FIG. 1C, the lower resist pattern having an anisotropic shape was formed halfway.

In the first etching step, the upper layer resist pattern 5 is also etched off and the intermediate layer pattern 4a is exposed. However, at this stage, the remaining portion 3b of the lower resist layer still exists.

Therefore, the etching conditions are switched as follows by way of example, and the remaining portion 3b of the lower resist layer is etched. O ₂ 20 sccm Cl ₂ 30 sccm Gas pressure 2.0 Pa Microwave power 900 W (2.45 GHz) RF bias power 200 W (2 MHz) Substrate temperature Room temperature In the second etching step, the mixing ratio of O ₂ is lowered. The mixing ratio of Cl ₂ was increased, and the other etching conditions were the same. That is, it is possible to prevent the unreacted O ^{* from} being excessively present due to the etching-off of the upper layer resist pattern, and at the same time, to promote the formation of CCl _{x that} functions as a sidewall protective film. As a result, as shown in FIG.
The lower resist pattern 3a was formed without undercutting while maintaining its anisotropic shape.

Example 2 In this example, when the lower resist layer is similarly etched using a mixed gas of O ₂ and HCl, the etching is divided into two steps, and the etching pressure is adjusted after the upper resist pattern is etched off. This is an example in which the microwave power is also lowered and the second stage etching is performed at the same time.
Similarly, description will be made with reference to FIG.

Example 1 up to formation of the intermediate layer pattern 4a
The description is omitted because it is the same as. The substrate to be etched shown in FIG. 1B was set in a magnetic field microwave etching apparatus, and as an example, the lower resist layer 3 was etched under the following conditions. O ₂ 40 sccm HCl 10 sccm Gas pressure 2.0 Pa Microwave power 900 W (2.45 GHz) RF bias power 200 W (2 MHz) Substrate temperature Room temperature

In the above etching process, O^*Isotropic by
Oxidative reaction is H⁺, Cl⁺And O ⁺Reed on ions such as
While etching is progressed due to strike, etching reaction
Product CCl_xBecomes a plasma polymer and forms the side wall protective film.
Contribute to growth. As a result, as shown in FIG.
Lower layer resist pattern maintaining anisotropic shape is formed halfway
Was done.

In the first etching step, the upper layer resist pattern 5 is also etched off at the same time to expose the intermediate layer pattern 4a. However, at this stage, the remaining portion 3b of the lower resist layer still exists.

Therefore, the etching conditions are switched as follows, for example, and the remaining portion 3b of the lower resist layer is etched. O ₂ 40 sccm HCl 10 sccm Gas pressure 1.0 Pa Microwave power 450 W (2.45 GHz) RF bias power 200 W (2 MHz) Substrate temperature Room temperature In the second etching step, the upper resist pattern 5 is etched off. The amount of the reaction product CCl _x decreased from that point, and the amount of O ^* , which was a relative excess, was decreased by the decrease in the microwave power. ⁺ , Cl ⁺ and O
Due to the straightness of ions such as ⁺ , a good anisotropic shape was achieved without causing an undercut in the lower resist pattern 3a as shown in FIG. 1 (d).

Example 3 In this example, when the lower resist layer is similarly etched using a mixed gas of O ₂ and HBr, the etching is divided into two steps, and Ar gas is used after the upper resist pattern is etched off. This is an example in which the substrate bias is increased and the second stage etching is performed at the same time as the addition.
Will be described with reference to.

Example 1 up to formation of the intermediate layer pattern 4a
The description is omitted because it is the same as. The substrate to be etched shown in FIG. 1B was set in a magnetic field microwave etching apparatus, and as an example, the lower resist layer 3 was etched under the following conditions. O ₂ 40 sccm HBr 10 sccm Gas pressure 2.0 Pa Microwave power 900 W (2.45 GHz) RF bias power 200 W (2 MHz) Substrate temperature Room temperature

In the above etching process, O^*Isotropic by
Oxidative reaction is H⁺, Br⁺And O ⁺Reed on ions such as
While etching is progressed due to strike, etching reaction
Product CBr_xIs the shape of the side wall protective film as plasma polymer
Contribute to growth. As a result, as shown in FIG.
Lower layer resist pattern maintaining anisotropic shape is formed halfway
Was done.

Therefore, the etching conditions are switched as follows by way of example, and the remaining portion 3b of the lower resist layer is etched. O ₂ 40 sccm HBr 10 sccm Ar 90 sccm Gas pressure 2.0 Pa Microwave power 900 W (2.45 GHz) RF bias power 300 W (2 MHz) Substrate temperature Room temperature In the second etching step, the upper resist pattern 5 is formed. Although the amount of the reaction product CCl _x that contributes to the formation of the sidewall protection film 6 decreases from the time of etching off, the addition of Ar as a diluent gas reduces the unreacted O ^*.
Was prevented from being present in excess. Further, as the RF bias power was increased, the incident intensity of ions such as H ⁺ , Br ^+, and O ⁺ was increased, and Ar ⁺ was also added to this, and the ion assisted etching proceeded. Due to these synergistic effects, a good anisotropic shape was achieved without causing an undercut in the lower layer resist pattern 3a as shown in FIG. 1 (d).

In particular, in this embodiment, by using a Br-based chemical species having a large atomic radius and a low reactivity as compared with Cl, the selection ratio of the intermediate layer pattern 4a and the Al—Si—Cu base material layer 2 to the layer is selected. There was also an effect of improving.

By the way, the timing of switching to the second etching step in each of the above-described embodiments is that the production amount of CO ₂ gas, which is a reaction product, decreases after the upper layer resist pattern is etched off. Then 4
It may be set at the time when the emission spectrum intensity of CO ^* at 83.5 nm starts to decrease.

Although the present invention has been described with reference to the three examples, the present invention is not limited to these examples.

For example, although the process conditions for the second etching are switched after the upper resist pattern 5 is etched off in the above embodiment, it is not necessary to strictly limit the time after the upper resist pattern disappears. Absent. According to the basic principle of the present invention, the effect of preventing undercut of the lower layer resist can be sufficiently obtained by setting the switching timing in the vicinity of where the upper layer resist pattern is etched off.

Although Cl ₂ , HCl, and HBr are used as the halogen-based gas in the above embodiment, other gases that contribute to the formation of the side wall protective film, such as BCl ₃ and CC, are used.
It is possible to widely use a gas containing a halogen atom such as l ₄ , SiCl ₄ , Br ₂ , BBr ₃ , and HI.

The intermediate layer is SiO using SOG.₂Based materials
I used Si₃N_FourSystem, Al₂O ₃System, a-Si and each
It is possible to use an inorganic thin film such as a seed metal.
Sputtering, vapor deposition, various CVD, etc. are used as the film forming method.
be able to.

As the organic material layer on the base material layer, the novolac-based positive photoresist was used in the above-mentioned embodiments, but various other resist materials can be used. The organic material layer does not need to be photosensitive because it suffices to flatten the step underlayer, and various organic materials such as polyimide can be used.

Further, the structure of the substrate to be etched, etching conditions, etching apparatus, etc. can be changed as appropriate. Other etching gas compositions include N ₂ , H ₂ , CO, and CO.
₂ , NO _x -based gas, SO _x- based gas or the like may be added.

In addition, the present invention is not limited to the above-mentioned embodiment, and the effect of the present invention can be obtained by appropriately introducing the second etching having the function of preventing the undercut of the lower layer resist pattern after the etching off of the upper layer resist pattern. It goes without saying that it will appear.

[0060]

As is apparent from the above description, in the present invention, in the etching of the organic material layer such as the lower resist in the three-layer resist process, the function of the side wall protective film is lowered due to the decrease of the reaction products after the etching off of the upper resist. It is possible to effectively prevent undercut of the lower layer resist pattern due to, and to realize a dry etching method of a multilayer resist excellent in anisotropic shape with no dimensional conversion difference.

Further, according to the present invention, it is possible to perform a dry etching method for a clean multi-layer resist which prevents the redeposition on the side wall of the lower resist pattern due to the sputtering of the underlying material layer and prevents the pattern shift and particle contamination.

Furthermore, according to the present invention, it is possible to achieve a dry etching method for a clean multi-layered resist which eliminates the undercut of the lower layer resist pattern and the dimensional conversion difference while ensuring a practical etching rate.

Due to the above effects, for example, the practicability of the three-layer resist process can be improved, and in the manufacturing process of a semiconductor device having a multilayer wiring structure based on a fine design rule, which requires high integration and high reliability. It is valid. The present invention is not limited to the above semiconductor device,
OEI that requires patterning on high step substrates
C, Bubble domain storage device, and also exhibits a high effect in patterning thin film magnetic head coils and the like.

[Brief description of drawings]

FIG. 1 is a schematic cross-sectional view illustrating Examples 1, 2 and 3 to which the present invention is applied, in the order of steps, in which (a) is a lower resist layer on an Al—Si—Cu alloy base material layer having steps. , A state where the intermediate layer and the upper layer resist pattern are sequentially formed, (b) is a state where the intermediate layer pattern is formed,
(C) is a state in which the underlying resist pattern is formed halfway by performing the first etching process on the lower resist layer using the upper resist pattern and the intermediate layer pattern as a mask, and the upper resist pattern is etched off and disappears. The state (d) is a state where the lower layer resist pattern is completed by performing the second etching process on the remaining portion of the lower layer resist using the intermediate layer pattern as a mask.

FIG. 2 is a schematic cross-sectional view for explaining a conventional three-layer resist technique in the order of steps, in which (a) shows a lower resist layer, an intermediate layer and an upper resist pattern which are sequentially formed on a base material layer having a step. The state, (b) is a state in which the intermediate layer pattern is formed, and (c) is the state in which the lower layer resist pattern is completed by etching the lower layer resist layer using the upper layer resist pattern and the intermediate layer pattern as a mask.

FIG. 3 is a schematic cross-sectional view showing a problem of the conventional multi-layer resist technology, in which a lower-layer resist pattern side wall above a step is
This is a state in which the spatter reattachment layer of the base material layer is formed.

FIG. 4 is a schematic cross-sectional view illustrating the problems of the conventional multi-layer resist technology in the order of the steps, in which (a) is an etching of the lower resist layer with the upper resist pattern and the intermediate layer as a mask, and the upper resist pattern is etched. Immediately after being turned off, (b) shows a state where the lower layer resist pattern is completed by etching the remaining portion of the lower layer resist using the intermediate layer pattern as a mask.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Interlayer insulating film 2 Underlayer material layer (Al-Si-Cu alloy layer) 3 Lower resist layer 3a Lower resist pattern 3b Remaining part of lower resist layer 4 Intermediate layer 4a Intermediate pattern 5 Upper resist pattern 6 Side wall protective film

Claims (5)

[Claims] 1. An organic material layer, an intermediate layer, and an upper layer resist pattern are sequentially formed on a base material layer, the intermediate layer is patterned using the upper layer resist pattern as a mask, and then the organic layer is formed using at least the intermediate layer pattern as a mask. In the dry etching method of a multilayer resist for patterning a material layer, the patterning of the organic material layer includes a first etching step until the upper layer resist pattern is etched off and a step after the upper layer resist pattern is etched off. And a second etching step under different etching conditions from the first etching step. 2. The dry etching method according to claim 1, wherein a mixed gas containing oxygen gas and a halogen-based gas is used, and a mixing ratio of the halogen-based gas is increased in the second etching step. 3. The dry etching method according to claim 1, wherein a mixed gas containing oxygen gas and a halogen-based gas is used, and the etching pressure is lowered in the second etching step. 4. The dry etching method according to claim 1, wherein a mixed gas containing oxygen gas and a halogen-based gas is used, and a rare gas is added in the second etching step. 5. The dry etching method according to claim 1, wherein the substrate bias voltage is increased in the second etching step by using a mixed gas containing oxygen gas and a halogen-based gas.