JPH07160230A - Display device - Google Patents

Abstract

PURPOSE:To reduce power consumption by shortening a lighting time of a back light and to reduce the deterioration in picture quality by shortening the display time of the same picture. CONSTITUTION:This device is provided with a liquid crystal display panel 18 provided with a scan electrodes group and an information electrodes group, the back light 52 irradiating it from a rear, an image information storage means 9 storing image information to be displayed on the liquid crystal display panel 18, a revision detection means 7 detecting ing the revision of the image information stored in the means 9 or an input signal to a device providing the image information to the image information storage means 9, driving means 13-17 applying a scan signal to the scan electrodes group based on the image information stored in the image information storage means 9 and applying an information signal to the information electrodes group and drive control means 12, 15 controlling the driving means 13-17 according to the detection result by the revision detection means 7 and stopping the application of the scan signal and the information signal and turning off the back light after a fixed time of the stoppage and turning on the back light and re-starting the application of the scan signal and the information signal.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a display device, and in particular, for displaying image information by arranging scanning signal lines and information signal lines in a matrix and applying and driving scanning signals and information signals respectively. The present invention relates to a display device in which the liquid crystal has a memory property.

[0002]

2. Description of the Related Art Conventionally, a refresh scan type CRT has been mainly used as a computer terminal device, and 60H is used from the viewpoint of preventing flicker (flicker of screen).
A non-interlaced method is adopted to improve the visibility of the frame frequency of z or higher and the movement display (movement of mouse, icon, etc.) of the information on the screen (Note: TV
The interlace system has a field frequency of 60 Hz and a frame frequency of 30 Hz in order to simplify the moving image display and drive control system. For this reason, the higher the display resolution, the higher the power required, and the larger the drive control section becomes, resulting in higher cost.

In recent years, flat panel displays have attracted attention due to the inconvenience of increasing the size and power of CRTs. Among them, the display using liquid crystal is thin,
It has many advantages over CRTs such as low power consumption.

Since the liquid crystal display device is a non-emissive display, it generally has a light source called a backlight, which is not found in a CRT, on the back side to display image information.

As a driving method, a high time division method typified by twisted nematic liquid crystal is often adopted at present, and this method adopts the same method as CRT as an image data transfer method, and a screen updating method has a frame frequency of 60 Hz or more. The non-interlaced method is adopted. The reason for this is that these display panels do not have a memory property in view of the display principle, and therefore a refresh cycle of a frame frequency of 60 Hz or higher is required from the viewpoint of flicker prevention. In addition, a method of incorporating a switching transistor or a non-linear element in each pixel of twisted nematic liquid crystal (TF
(T, MIM, TFD, etc.), the maximum amount of image information that can be stored is 1 frame.
Similar to the above methods, a refresh cycle of 60 Hz or higher is required.

On the other hand, since the ferroelectric liquid crystal display device has a feature that it can hold image information once displayed (memory property), it has a large screen and high definition display far surpassing the above-mentioned various display devices. It is possible. However, since it is driven at a low frame frequency, in order to support a display device of a man-machine interface, a partial rewriting scanning method (scanning (driving) only a scanning line in which image information changes) is utilized. is necessary. Regarding this partial rewriting scanning method, for example, U.S. Pat.
5,561 or JP-A-63-285141
Japanese Patent Laid-Open No. 63-65494 or Japanese Patent Laid-Open No. 63-65494 attempts to realize the method of "low frame frequency driving (multi-interlaced scanning) + partial rewriting scanning" for high resolution display in a display device having a memory property. Has been.

[0007]

As described above, the liquid crystal display has a backlight not provided in the CRT. The power consumed by the backlight occupies a large proportion of the total power consumed by the liquid crystal display. And it is always lit while the display is operating. For example, even when the operator stands up and does not perform key input or mouse operation for a long time, the operator continues to light up and consume power.

In the conventional control method of the ferroelectric liquid crystal display element, partial rewriting scanning is performed when the image information is changed, and full refresh scanning by multi-interlacing is performed when the image information is not changed.
For this reason, the display panel is continuously performing refresh scanning by multi-interlacing or the like even in a state where no key input or mouse operation is performed for a long time. Therefore, if scanning is not performed and the same image is continuously displayed for a long time, image quality deterioration such as image sticking on the display screen and a reduction in drive margin will occur.

Therefore, an object of the present invention is to reduce the power consumption by shortening the lighting time of the backlight in the display device, and to reduce the image quality deterioration by shortening the same display time, thereby improving the reliability of the device. It is to improve sex.

[0010]

In order to achieve the above-mentioned object, a display device of the present invention comprises a liquid crystal display panel in which pixels are arranged in a matrix by a scanning electrode group and an information electrode group, and arranged in the liquid crystal display panel. A liquid crystal such as a ferroelectric liquid crystal that is driven by an electric field applied through the scanning electrode group and the information electrode group and maintains an optical state even when no electric field is applied, and a backlight that illuminates the liquid crystal display panel from the back surface. And image information storage means for storing image information to be displayed on the liquid crystal display panel and change detection of image information stored in the image information storage means, or change detection for detecting an input signal to a device providing image information. Means, a driving means for applying a scanning signal to the scanning electrode group based on the image information stored in the image information storage means, and an information signal for the information electrode group, and a change detection. The driving means is controlled according to the detection result by the means to stop the application of the scanning signal and the information signal to the display panel, and after a certain period of time, the backlight is turned off, and the backlight is turned on to turn on the scanning signal and the information signal. Drive control means for resuming the application of.

The drive control means controls the drive means such that the voltages applied to the scanning electrodes and the information electrodes are equipotential, or the scanning electrodes and the information electrodes are in a high impedance state. The application of the scanning signal and the information signal is stopped by.

[0012]

In this structure, image display according to image information that changes every moment is usually performed by partial rewriting scanning, full-screen refresh scanning by multi-interlacing, and the like. However, if it is found from the detection result by the change detection means that the image information has not been changed for a certain period of time, or if there is no input to the device that provides the image information for a certain period of time, the drive control means scans. The application of the signal and the information signal is stopped, and the backlight is turned off after a certain period of time set separately from the previous one without changing the image information or without input to the device for providing the image information. After that, when the change detection means detects that the image information has been changed, the drive control means turns on the backlight and restarts the application of the scanning signal and the information signal, whereby the normal display is performed again. . In this way
By reducing the lighting time of the backlight, power consumption is reduced, and by shortening the same display period that causes image quality degradation, image quality degradation is prevented and the reliability of the device is enhanced.

[0013]

1 is a block diagram showing the configuration of a display device according to an embodiment of the present invention. 1 in the figure is the system bus,
Reference numeral 2 is a driver for address signals, access request signals, response signals, etc., 3 is a data buffer, 4 is a host interface which is an interface circuit between the host CPU and the processor in the control circuit, and 5 supports VGA registers and the like. Dedicated LSI, 6 is a graphics processor that performs drawing and data transfer, 10 is a program memory including a dynamic RAM that stores programs for the graphics processor 6, 9 is a video memory that stores display information, and 7 is a video Memory 9
Access sampling counter which is reset by an access signal to the video memory, 8 a memory controller which generates a control signal to the video memory 9, and 11 an exchange of video data and sync signals with the FLC display unit 50 and the backlight unit 60. Is a video interface that does. These constitute the control circuit 40 of the FLC display unit 50.

Reference numeral 20 is an address signal, an access request signal and a response signal, 21 is an access signal to the VGA support chip 5 and the graphics processor 6, 23 is data transmitted and received between the graphics processor 6 and the program memory 10, and 22 is Data transmitted and received between the data buffer 3 and the VGA support chip 5, the graphics processor 6 and the video memory 9, 24 is an access request from the VGA support chip 5 to the memory controller 8, and 25 is from the graphics processor 6. Video memory 9 for memory controller 8
Access request, 26 is a control signal to the video memory 9, 27 is display data read from the video memory 9, 28 is data to be sent to the FLC display unit 50, and 29 is synchronization with the FLC display unit 50. Signals and control signals, 30 are synchronization signals and control signals, 3
Reference numeral 1 is a synchronizing signal input to the access sampling counter 7, 32 is a notification signal (A) that the video memory 9 has not been accessed for a certain period of time, and 37 is set separately from the notification signal (A) 32. A notification signal (B) 38 indicating that the video memory 9 has not been accessed for a certain time or longer is a control signal to the backlight unit 60.

A display controller 12 controls the display unit 50 as a whole, such as an interface with the display control circuit 40 and control of both the segment and common drivers, and 13 transfers one line of the video data 34 from the display controller 12. A shift register, 14 is a line memory for storing one line of video data, and 15 is a line memory 1
A segment driver for outputting a predetermined drive waveform to the information electrode of the display panel at a predetermined timing according to the video data in 4, a display panel 18 using a ferroelectric liquid crystal,
Reference numeral 16 is a line address decoder that selects one scanning line according to the scanning line address data 35 from the display controller 12, and 17 is a common driver that outputs a predetermined driving waveform to the selected scanning line (scan electrode) at a predetermined timing. , 33, and 36 are control lines to the segment and common drivers, respectively, and constitute the FLC display unit 50.

Reference numeral 51 is a backlight controller for controlling the entire backlight unit 60 such as an interface with the display control circuit 40, and 52 is a backlight composed of a fluorescent tube, an inverter, etc., and the backlight unit 60 is constituted by these. .

Next, the basic operation of screen display in the apparatus of FIG. 1 will be described. First, the case where the host CPU updates the display screen (when the operator performs a normal operation) will be described.

In a general CRT control circuit, the host CPU can directly access the video memory at random, whereas
In the FLC display control circuit 40 in the present embodiment, the host CPU cannot directly access the video memory 9 at random, and the host CPU rewrites display data via the graphics processor 6. For example, in the case of displaying a straight line, the host CPU issues a straight line drawing command to the graphics processor 6 to give necessary information such as a start point and an end point. The graphics processor 6 determines an access address and the like according to the given information and accesses the video memory 9. In addition, display of other figures and characters, and VGA related commands are also performed by the command from the host CPU (V
In the case of GA, it is executed by the graphics processor 6 and the VGA support chip 5 accessing the video memory 9, respectively (as a BIOS command).

The access sampling counter 7 monitors the access state to the video memory 9, and when the access (writing) to the video memory 9 is not performed for a predetermined time, a notification signal (A) to that effect. 32 to the FLC display unit 50. Graphics processor 6 and VGA support chip 5 are video memory 9
Access sampling counter 7 is reset and starts counting from the beginning. When the operator is performing a normal operation, since the video memory 9 is continuously accessed, the access sampling counter 7 sends a notification signal (A) 32.
Is never output.

The display data in the video memory 9 is read line by line from the video memory 9 in accordance with an instruction from the graphics processor 6, and the video interface together with the scanning line address data (not shown on the control circuit side in FIG. 1). FLC display unit 5 via 11
It is output to 0. At this time, it is determined from the drawing command given by the graphics processor 6 whether or not the data is the data for which responsiveness is required, that is, the image information that requires partial rewriting, or the host CPU instructs the graphics processor 6 to perform partial rewriting. A drawing event is determined by either of the methods of providing identification information as to whether or not the data is necessary data, and display data for which display responsiveness is required for the FLC display is preferentially transferred.
The display controller 12 in the FLC display unit 50 receives the scanning line address data and display data (video data) from the FLC display control circuit 40, and the scanning line address data 35 is the line address of the scanning line electrode driving circuit (16, 17). In the decoder 16,
The video data 34 are transferred to the shift registers 13 of the information signal drive circuits (13-15), respectively.

The line address decoder 16 of the scan electrode drive circuit selects one scan line based on the scan line address data 35. The common driver 17 outputs a predetermined drive waveform to the selected scanning line (scanning electrode) during the selection period (one horizontal scanning period). On the other hand, when the shift register 13 of the information electrode driving circuit finishes shifting the video data for one line, the video data is transferred to the line memory 14 and held for one horizontal scanning period. The segment driver 15 outputs a drive waveform corresponding to the video data of the line memory 14 in synchronization with the selection period of the common driver 17. As described above, the writing operation to the display panel 18 during the normal operation is performed by the generally well-known line-sequential scanning, and at that time, as a man-machine interface such as cursor movement, character input, screen scrolling, etc. Particular rewriting scanning is performed for drawing information that requires responsiveness, and full-screen refresh scanning is performed for other drawing information by multi-interlacing.

Here, the access sampling counter 7
Is a counter that uses an access (write) signal to the video memory 9 as a reset (or preset) signal and a synchronization signal 31 (for example, a horizontal synchronization signal) from the FLC display unit 50 as a clock, and this counter overflows (carries). ) Signal to video memory 9
The notification signal (A) 32 and the notification signal (B) 37 indicate that there has been no access for a certain period of time.
Actually, one frame time (for example, horizontal synchronizing signal x 1024 when the number of scanning lines is 1024) is calculated from the synchronizing signal 31 (horizontal synchronizing signal), and the frequency divided by 64 is used as a clock for the 8-bit counter (access. Input to the sampling counter). Assuming that the standard horizontal scanning time of the FLC display panel is 100 μs, the detection time can be set from about 6 seconds to about 27 minutes depending on the preset value of the counter. When the access to the video memory 9 does not occur during the set detection time, the access sampling counter 7 outputs the notification signal (A).
32 is asserted (enabled) to notify the display controller 12 that access to the video memory 9 is stopped (no change in screen). The notification signal (A) 32 is output asynchronously with the driving of the display panel 18.

When the display controller 12 recognizes that the notification signal (A) 32 is asserted, it waits for the driving of the scan electrode which is currently being scanned to end (in order to receive the notification signal (A) 32 asynchronously). A drive waveform output stop signal (included in signals 33 and 36) is sent to both the segment and common drivers.

After that, when the drive stop period is entered, the segment driver 15 and the common driver 17 both output terminals to the FLC display panel 18 and the like while the drive waveform output stop notification signal (A) 32 is asserted. The potential is maintained and the panel is controlled to a non-scanning state (a state in which a voltage is applied but not scanning). Further, here, the segment driver 15 and the common driver 17 also have a function of controlling the output terminals to a high impedance (electrically disconnected) state. Therefore, F
As a method of bringing the LC display panel 18 into the memory state, it is possible to control it to a completely non-driving state other than the method of keeping the information electrodes and the scanning electrodes at the same potential. Note that which method is used to control the display panel to the memory state can be selected by control from the display controller 12.

Further, when the access to the video memory 9 does not occur during the detection time set separately from that of the notification signal (A), the access sampling counter 7 asserts the notification signal (B) 37 (enable state). When the backlight controller 51 recognizes that the notification signal (B) 37 is asserted, the backlight controller 51 sends an extinguishing signal (not shown) to the backlight 52 to extinguish it.

At this time, the segment driver 15 applies erase signals to all the bits at once. When the erase signal is applied, the scanning signal maintains the voltage level Vc shown in FIG. 2 during the application period. That is, after the scanning is completed, the screen erase signal 90 is asserted so that all the bits of the segment driver 15 output the voltage level V4 shown in FIG. Further, here, it is also possible to turn off the backlight in the display state without applying the erase signal. Which method is used to shift to the non-driving state can be selected by control from the display controller 12.

Next, the operation of returning from the memory state to the normal drive state will be described. The access sampling counter 7 immediately notifies the notification signal (A) 32 and the notification signal (B) 37 when the video memory 9 is accessed at least once.
Are negated (disabled state), and the display controller 12 and the backlight controller 51 are informed that there is an access (write request) to the video memory 9. Since the notification signal (A) 32 is output asynchronously with the driving (scanning) of the display panel 18 as in the assertion, the display controller 12
Waits for the drive of the scan electrode being scanned at the end (synchronously with the scan of the display panel), and negates the drive waveform output stop signals 33 and 36 to both the segment and common drivers to drive the normal drive. The state, that is, the above-described "partial rewriting scan + whole surface refresh scan" state is restored. When the notification signal (B) 37 is negated, the backlight controller 51 sends a lighting signal (not shown) to the backlight 52 to light it.

The access sampling counter 7 monitors the access state to the video memory 9, and when the video memory 9 is not accessed (written) for a predetermined time or longer, a notification signal (A) to that effect is given. 32 to the FLC display unit 50.

In these series of operations, instead of the access sampling counter 7 monitoring the access state to the video memory 9 and outputting the notification signal (A) 32 or the notification signal (B) 37, an operator such as a keyboard or a mouse operates it. Input device 43 which is an input device to the host CPU
41 for receiving signals from the input device 43 and input device 43
External input counter 42 reset by a signal from
In addition, the external input counter 42 monitors the input state from the input device 43 to the host CPU, and when there is no input for a predetermined time, a notification signal to that effect is output, and the notification signal (A ) 32 and the notification signal (B) 37.

FIG. 2 shows a scanning signal (driving waveform) applied to the scanning electrode group and an information signal (driving waveform) applied to the information electrode group when the display panel 18 shifts to the memory state and then returns to the normal driving state. ) Is shown. The scan electrode drive waveform output from the common driver 17 erases all lines (one scan line) once with an erase pulse on the positive electric field side (voltage level: V1), and then on the negative electric field side (voltage level: V2). ) Writing pulse is used for writing. Here, the write pulse is synchronized with the information electrode drive waveform (voltage level: V3, V4) output from the segment driver 15, and when the combined waveform of them exceeds the write threshold, the erased state to the other state. If the threshold value is not exceeded, the erased state is maintained. In this way, by writing two states in the selection period (horizontal scanning period) and repeating this for all scanning lines,
Get the desired drawing. After the normal operation drive output is stopped,
While the screen erasing signal 90 is at the high level, the segment driver 15 for all bits outputs a signal of level V4, and at the same time, the scanning driver 17 maintains the Vc level to erase the display state. After that, in order to enter the memory state, the outputs of the common and segment drivers are brought to the equipotential (Vc level here) or high impedance state (displayed as Z in FIG. 2) to hold the display panel in the erase memory state. .

[0031]

As described above, according to the present invention, the means for detecting the change of the image information or the change detecting means for detecting the input signal to the device for providing the image information, and the detection result thereof. In response to this, when the application of the drive signal is stopped, the backlight is turned off, the backlight is turned on, and the application of the drive signal is restarted, the image information is not changed for a certain period of time or the like. In, the display can be stopped and the backlight can be turned off. Therefore, it is possible to reduce power consumption, suppress image quality deterioration, and improve device reliability.

[Brief description of drawings]

FIG. 1 is a block diagram of a display device according to an exemplary embodiment of the present invention.

FIG. 2 is a timing chart when the display panel is controlled to a memory state in the device of FIG.

Claims (12)

[Claims] 1. A liquid crystal display panel in which pixels are arranged in a matrix by a scanning electrode group and an information electrode group, and is arranged in the liquid crystal display panel and driven by an electric field applied via the scanning electrode group and the information electrode group. Liquid crystal, a backlight for illuminating the liquid crystal display panel from the back, image information storage means for storing image information to be displayed on the liquid crystal display panel, and image information stored in the image information storage means has been changed The change detecting means for detecting the change of the number of electrodes, the driving means for applying the scanning signal to the scanning electrode group based on the image information stored in the image information storing means, and the information signal for the information electrode group, and the change detecting means. The drive means and the backlight are controlled according to the detection result to stop the application of the scanning signal and the information signal to the liquid crystal display panel, and after a certain period of time, the backlight is turned off. And a drive control unit for turning on a backlight and turning on a backlight to restart application of a scanning signal and an information signal. 2. The drive control means controls the drive means and the backlight according to the detection result of the change detection means to stop the application of the scanning signal and the information signal to the liquid crystal display panel, and after a certain period of time, the display is performed. 2. The display device according to claim 1, wherein a signal for erasing the display on the panel is applied, the backlight is turned off, and the backlight is turned on to restart the application of the scanning signal and the information signal. 3. The drive control means controls the drive means and the backlight according to the detection result of the change detection means to stop the application of the scanning signal and the information signal to the liquid crystal display panel based on the image information, The display device according to claim 1, wherein the backlight is turned off and the backlight is turned on to restart application of the scanning signal and the information signal after a certain period of time in the display state at that time. 4. The drive control means stops the application of the scan signal and the information signal by controlling the drive means so that the voltages applied to the scanning electrode and the information electrode are equipotential. Display device described. 5. The display according to claim 1, wherein the drive control means controls application of the scan signal and the information signal by controlling the drive means so that the scan electrode and the information electrode are in a high impedance state. apparatus. 6. The display device according to claim 1, wherein the liquid crystal is a ferroelectric liquid crystal. 7. A liquid crystal display panel in which pixels are formed in a matrix by a scanning electrode group and an information electrode group, and is arranged in the liquid crystal display panel and driven by an electric field applied via the scanning electrode group and the information electrode group. Liquid crystal, a backlight that illuminates the liquid crystal display panel from the back, an image information storage unit that stores image information to be displayed on the liquid crystal display panel, and an external input signal to a device that provides image information to the image information storage unit. Change detection means for detecting the presence or absence of a scan signal, drive means for applying a scan signal to the scan electrode group based on the image information stored in the image information storage means, and for applying an information signal to the information electrode group, and a change detection means. The driving means and the backlight are controlled according to the detection result by the means to stop the application of the scanning signal and the information signal to the liquid crystal display panel, and after a certain period of time, the backlight is driven. And a drive control means for turning on the backlight and turning on the backlight to restart the application of the scanning signal and the information signal. 8. The drive control means controls the drive means and the backlight in accordance with the detection result of the change detection means to stop the application of the scanning signal and the information signal to the liquid crystal display panel, and after a certain period of time, the display is performed. 8. The display device according to claim 7, wherein a signal for erasing the display on the panel is applied, the backlight is turned off, and the backlight is turned on to restart the application of the scanning signal and the information signal. 9. The drive control means controls the drive means and the backlight according to the detection result of the change detection means to stop the application of the scanning signal and the information signal to the liquid crystal display panel based on the image information, The display device according to claim 7, wherein the backlight is turned off and the backlight is turned on to resume application of the scanning signal and the information signal after a certain period of time in the display state at that time. 10. The drive control means stops the application of the scan signal and the information signal by controlling the drive means so that the voltages applied to the scan electrode and the information electrode are equipotential. Display device described. 11. The display according to claim 7, wherein the drive control means controls application of the scan signal and the information signal by controlling the drive means such that the scan electrode and the information electrode are in a high impedance state. apparatus. 12. The liquid crystal is a ferroelectric liquid crystal, 7.
Display device described.