JPH0715390A - Information processor equipped with radio communications means - Google Patents

Abstract

PURPOSE:To prevent interference due to the spurious electromagnetic wave of a clock higher harmonic from occurring and for best performances of a radio communications system by changing the fundamental frequency of an operating clock only when communication is performed. CONSTITUTION:When a power source is applied and a reset signal 92 is outputted, the frequency of PLL circuit output 24 is set so as to be equal to the frequency of square wave generator output 23 at the maximum frequency. When radio communication is used, a judged result representing the presence/ absence of communication can be set on a targeted communications area. When a higher harmonic component exists, the frequency of the output 24 is shifted in a direction to make the frequency small so as to prevent the higher harmonic component in the communications area. In such a case, a CPU 10 sets the required number of frequency division on a shift register 22 via an I/O bus controller 12. When it is set, ordinary communications processing is performed, and when it is completed, another ordinary processing is performed, then, processing is shifted to the one to judge whether or not the radio communications is used.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for preventing interference in wireless communication by a harmonic of an operation clock of the digital apparatus (information processing apparatus) having a wireless communication means.

[0002]

2. Description of the Related Art As a digital device (information processing device) having a wireless communication means, "mobile communication in the ISDN era"
There is a terminal device compatible with the teleterminal system as described on page 50 of (Ohmsha, 1992). From these, for example, the wireless personal computer R of NEC Corporation
Focusing on C9801, the frequency used in the radio of the teleterminal system is 800 MHz band.
Since the interference does not occur unless the 70th harmonic and the higher harmonic of the clock of the (Central Processing Unit) are about 12 MHz, no particular problem of interference due to the harmonic seems to have occurred.

Further, as a conventional example for preventing radio wave interference from a data processing device to a television, a radio, etc.,
There is a technique described in Japanese Patent Laid-Open No. 61-86824. In the conventional example, a personal computer has a clock generation circuit whose frequency can be changed minutely and a mechanism capable of adjusting the oscillation frequency of the clock generation circuit from the outside. By adjusting the oscillation frequency of the clock generation circuit, a television This reduces the radio interference to radios and radios.

Next, FIG. 2 shows a block diagram of a conventional information processing apparatus. In FIG. 2, the information processing device includes a wireless communication unit. The wireless communication means 3 built in the information processing apparatus main body 1 includes an antenna 30 for wireless communication and a transmission / reception circuit 31, and a transmission / reception signal is input / output (I / O) device 16 via a transmission / reception circuit connection line 32. Send and receive with. I
The / O device 16 controls transmission / reception of wireless communication means. Further, a plurality of I / O devices can be provided, which means not only control of wireless communication means but also general I / O devices.
An external storage device may be connected via the external storage device bus 86 like the device 17. As the external storage device 70, a floppy desk, a hard disk, or the like can be provided. In addition, the information processing apparatus main body 1 includes a CPU 10 that processes information, a square wave generator 20 that oscillates a square wave and outputs the square wave from a square wave generator output line 23, and a clock signal output from the square wave generator 20. I / O for connecting the I / O device to the clock driver 11 for amplifying the clock signal and outputting the clock signal via the clock signal lines 83 to 85
An I / O bus controller 12 that controls the bus 81;
A memory 14 as a storage means for storing programs and the like, a ROM 15 (Read Only Memory) as a storage means, a memory controller 13 for controlling the storage means, a display device 71 such as a CRT or a liquid crystal display, and a display output to the display device 71. Display circuit 18, input means keyboard 72, input means mouse 73, output means speaker 74, voice input means microphone 75, and keyboard controller 19 for controlling input and output means. Have. The reset signal 92 is a signal that becomes active when the power is turned on.

The information processing apparatus as shown in FIG. 2 operates by a fixed frequency clock output from the square wave generator 20.

[0006]

When wireless communication is performed by the wireless communication means provided in the information processing apparatus, there are the following problems. FIG. 10 shows an explanatory diagram of problems in a mobile communication system of a terminal image. In FIG. 10, reference numerals 1-1 and 1-2 denote information processing apparatuses, which operate as mobile stations here. Reference numeral 4 is a base station, and 5 is a network such as a telephone network or a LAN. In FIG. 10, arrows indicate radio waves, 6 is a radio wave emitted from a base station, 7 is a radio wave emitted from a mobile station, and 8 is a communication between the information processing device 1-1 which is a mobile station and the base station 4-1. Although it is a channel radio wave, it is an interfering wave to other base stations. Reference numeral 9 is an unnecessary radiation electromagnetic wave, which is due to an operation clock in the information processing device.

In FIG. 10, a pair of an information processing device 1-1 and a base station 4-1 which are mobile stations, and an information processing device 1-
2 and the base station 4-2 are in the range of radio wave reach each other, even if they try to communicate on the same channel,
One pair (information processing device 1-1-base station 4-1) uses the channel that is being used earlier by another pair (information processing device 1-2).
Then, the base station 4-2) detects the interference wave 8. As a result, the other pair starts communication using another channel. If this time (focusing on the information processing device 1-1 and the base station 4-1), there is only one channel that can be used, and unnecessary radiation due to harmonics of the operating clock of the information processing device 1-1 is present in the band of that channel. When the electromagnetic wave 9 exists, it is detected as an interfering wave, and although one channel should be used originally, there is a problem in that there is no free channel (for reception) due to its own noise and communication cannot be performed.

At present, the clock frequency of the CPU is about 100 MHz even in a relatively small-sized information processing apparatus, and even in the 800 MHz band, interference is generated by lower harmonics such as the eighth harmonic. In addition, these digital devices are FCC (Federal Commun
ication Commission) and VCCI (V
oluntary Control Council
for Interference by Data
Processing Equipment & Elec
In an organization such as tronic office machines, the electric field strength of unnecessary radiated electromagnetic waves due to harmonics of a clock is regulated. However, these regulations are based on the premise that the digital device and the wireless device are used with a certain distance from each other. In that case, there is a problem that interference occurs even if the regulation value is satisfied.

An object of the present invention is to prevent the occurrence of interference by unnecessary radiated electromagnetic waves of clock harmonics in an information processing apparatus having a built-in wireless device, and maximize the performance of the wireless communication system.

[0010]

In order to solve the above problems, the present invention comprises a wireless communication means for performing wireless communication and a clock circuit for generating a clock signal, and operates based on the clock signal. In the information processing device, a detection unit that detects whether or not there is a wireless connection request in the wireless communication unit, and a frequency of the clock signal of the clock circuit when the detection unit detects that there is a wireless connection request. , And a clock variable means for changing to a frequency in which a harmonic component of the clock signal does not exist in the communication band of the wireless communication means. Further, further comprising end detection means for detecting the end of the wireless communication, the clock variable means, when the frequency of the clock signal is changed, when the end detection means detects the end of wireless communication, The frequency of the clock signal may be returned to the original frequency.

Further, the wireless communication means includes a plurality of channels, and further has an empty channel detection means for detecting whether or not there is an empty channel of the channels, and the clock variable means is provided by the empty channel detection means. When it is detected that there is no empty channel, the frequency of the clock signal of the clock circuit can be changed so that the harmonic component of the clock signal does not exist in at least one communication band of the channel in the wireless communication means. .

Further, the clock varying means is a judging means for judging whether or not a harmonic component of the clock signal exists in at least one communication band of the channel in the wireless communication means, and the judging means. When it is determined that there is a harmonic component of the clock signal, a determining unit that determines the frequency of the clock signal in which the harmonic component of the clock signal does not exist in at least one communication band of the channel, and the determining unit determines And a changing means for changing the frequency of the clock signal.

Communication in an information processing apparatus that has a wireless communication means that has a plurality of channels and that performs wireless communication when receiving a wireless connection request, and a clock circuit that generates a clock signal, and that operates based on the clock signal. A method for detecting whether or not there is a wireless connection request in the wireless communication means, and detecting a wireless connection request, detecting a vacant channel, and detecting a vacant channel as a result of the detection. , The frequency of the clock signal of the clock circuit is determined so that the harmonic component of the clock signal does not exist in the communication band of the one channel in the wireless communication means, and the frequency of the clock signal is set to the determined frequency. After the change, the empty channel is detected, and the wireless communication can be performed when the empty channel is detected.

[0014]

The electromagnetic noise that forms the background of the present invention will be described with reference to FIGS. FIG. 8 shows a spectrum of an electromagnetic wave radiated from a circuit having only a clock (observation points 3 m apart). In this way, the electromagnetic wave of the harmonic of the square wave is observed at an integral multiple of the fundamental frequency (36 MHz). In FIG. 8, only components up to 500 MHz are displayed, but there are components exceeding 1 GHz. Further, FIG. 9 shows a spectrum of an electromagnetic wave emitted from a general information processing apparatus (observation point 3 m away). As shown in FIG. 9, although the information processing apparatus has a plurality of types of clocks, the 16 MHz harmonic of the CPU clock shows a particularly large level. Therefore, in general, CP
It can be said that a low noise level electromagnetic environment can be realized by focusing on the U clock.

It can be considered that the intensity level of the electromagnetic wave is inversely proportional to the distance in a region where the distance from the source is sufficiently larger than the wavelength. However, in the region of a distance of about a wavelength, a component inversely proportional to the square or cube of the distance cannot be ignored, and the wavelength of the electromagnetic wave is 30 cm even at 1 GHz. In the case of built-in or direct connection, the intensity level of unnecessary radiated electromagnetic waves of clock harmonics of digital equipment becomes considerably large. When the unwanted radiated electromagnetic waves exist in the frequency band of the wireless communication system, it is difficult to lower the intensity level of the unwanted radiated electromagnetic waves of interest. Reduce the noise level existing in the frequency band. As a result, it is possible to secure the communication distance, improve the reliability of information transmission, and secure the communication quality.

Further, when the distance between the two devices that perform wireless communication is sufficiently large, the unwanted radiated electromagnetic waves of the devices themselves have a large effect, but the unwanted radiated electromagnetic waves generated from the communication partner have a small effect, so By shifting the frequency of the unnecessary radiated electromagnetic wave only with respect to the reception frequency, the communication distance is secured, information transmission reliability is improved, and communication quality is secured.

That is, the present invention operates as follows. In the information processing device, the clock circuit generates a clock signal and operates based on the clock signal.

The detecting means detects whether or not there is a wireless connection request in the wireless communication means. When the detecting means detects that there is a wireless connection request, the clock varying means determines the frequency of the clock signal of the clock circuit such that a harmonic component of the clock signal exists in the communication band of the wireless communication means. Change to a frequency that does not. After that, wireless communication is performed by wireless communication means.

When the end detection means is further provided, the peripheral charge detection means detects the end of the wireless communication.
The clock varying unit may return the frequency of the clock signal to the original frequency when the end detecting unit detects the end of wireless communication when the frequency of the clock signal is changed.

Since the unwanted radiated electromagnetic waves in question are mainly harmonics of 10 to 20 times the fundamental frequency of the clock, the fundamental frequency of the clock to be changed is 1/10 to 1/1 of the frequency band of the wireless communication system. Since about 20 is sufficient, the capacity of the information processing device is not significantly reduced.

When the wireless communication means has a plurality of channels and further has a free channel detecting means, the free channel detecting means detects whether or not there is a free channel of the channels. When the clock variable means detects that there is no free channel by the free channel detection means, there is no harmonic component of the clock signal in at least one communication band of the channel in the wireless communication means, The frequency of the clock signal may be changed. in this case,
The determining means of the clock varying means determines whether or not a harmonic component of the clock signal exists in at least one communication band of the channel in the wireless communication means. The determining means, when the determining means determines that there is a harmonic component of the clock signal, determines the frequency of the clock signal in which the harmonic component of the clock signal does not exist in at least one communication band of the channel. The changing unit changes the frequency of the clock signal determined by the determining unit.

As a result, the basic frequency of the biased clock can be further suppressed to about 1/10 to 1/100 by suppressing the amount of change to one channel of the communication channel instead of the entire frequency band of the wireless communication system. It will be possible.

[0023]

Embodiments of the present invention will be described below with reference to FIGS. 1 to 14 as appropriate.

FIG. 1 shows a block diagram of an embodiment of the present invention. In FIG. 1, reference numeral 1 denotes an information processing apparatus main body, which includes a wireless communication unit. Such information processing devices include mobile terminal devices such as wireless communication systems. The variable clock circuit 2 can change the oscillating frequency, and oscillates a square wave to output the square wave generator 20 that outputs the square wave from the square wave generator output line 23 and the square wave output from the square wave generator 20. A PLL circuit 21 that outputs a clock signal by dividing the frequency by the instructed frequency division number and an instruction for the frequency division number to the PLL circuit 21 via the deviation register output line 25 to change (bias) the frequency of the clock signal. And a bias register 22 which is a setting means for Variable clock circuit 2
Has the hardware features of this embodiment. The variable clock circuit 2 and the CPU 10 function as clock variable means. The clock variable means comprises a judging means for judging whether or not a harmonic component of the clock signal exists in at least one communication band of the channel in the wireless communication means, and a harmonic signal of the clock signal by the judging means. When it is determined that a component is present, the determining means determines the frequency of the clock signal in which at least one communication band of the channel does not have a harmonic component of the clock signal, and the frequency of the clock signal determined by the determining means And changing means for changing. The wireless communication means 3 built in the information processing apparatus main body 1 includes an antenna 3 for wireless communication.
0 and a transmission / reception circuit 31, and a transmission / reception circuit connection line 32
A transmission / reception signal is transmitted / received to / from the input / output (I / O) device 16 via the. The wireless communication unit includes a plurality of channels, and further includes an empty channel detection unit that detects whether or not there is an empty channel of the channels. The input / output device 16 may be included in the wireless communication means 3. The I / O device 16 controls transmission / reception of wireless communication means. Also, I /
A plurality of O devices can be provided, which means not only control of wireless communication means but also general I / O devices.
As described above, the external storage device may be connected to the external storage device bus 86. As the external storage device 70,
It can be equipped with a floppy desk or hard disk. Further, the information processing apparatus main body 1 includes a CPU 10 that processes information, a clock driver 11 that amplifies a clock signal output from the PLL circuit 21 and outputs a clock signal via the clock signal lines 83 to 85, and an I / O O
An I / O bus controller 12 that controls an I / O bus 81 that connects devices, a memory 14 that is a storage unit that stores programs, and a ROM 15 (Read Only Me) that is a storage unit.
mory) and a memory controller 13 for controlling the storage means
A display device 71 such as a CRT or a liquid crystal display device
The display circuit 18 for displaying and outputting to, a keyboard 72 of input means, a mouse 73 of input means, a speaker 74 of output means, and a microphone 75 of voice input means.
And a keyboard controller 19 for controlling input means and output means. The reset signal 92 is a signal that becomes active when the power is turned on.

FIG. 7 is a block diagram of the variable clock circuit 2 which is a hardware feature of this embodiment. In FIG. 7, the square wave generator 20 outputs a square wave having a frequency f0. Reference numeral 201 denotes an N frequency divider, which has an instructed frequency division number N.
The square wave output from the square wave generator 20 is divided by (N is a natural number). Reference numeral 202 denotes an M frequency divider, which divides the clock output from the VCO by an instructed frequency division number M (M is a natural number). A phase comparator 203 compares the phases of the frequency-divided signals output from the N frequency divider 201 and the M frequency divider 202. Reference numeral 204 is a charge pump, 205 is a loop filter, and 206 is a VCO (Volt
age Control Oscillator). Bias register 22
Is a N division register 207 and an M division register 208
And a register control circuit 2 for setting the frequency division number in each register
And 11. The register control circuit 211 controls each register via the frequency division register data bus 209 and the register control signal 210.

In FIG. 7, the fundamental frequencies of the clocks output from this circuit have the following relationship.

[0027]

## EQU1 ## (frequency f0 of square wave generator output 23) / N =
(Frequency f′0 of PLL circuit output 24) / M Therefore, if this equation is modified, it becomes as follows.

[0028]

## EQU00002 ## (frequency f'0 output from PLL circuit output 24) =
(M / N) × (frequency f0 of the square wave generator output 23) As shown in the above equation, only the desired value is obtained by the data of M and N written in the N division register 207 and the M division register 208. It is possible to obtain a frequency with the operating clock biased.

In this embodiment, the fundamental frequency of the operation clock is lowered only when communication is performed to prevent an interference wave. The method is to set the operating clock so that the entire frequency band allocated to the communication system to be used does not become an interference wave, and to overlap with any channel in the allocated frequency band, but the device itself There is a method of setting the operation clock so that it does not become an interfering wave only when using. The former process is simpler. Therefore, in order to avoid the entire allocated frequency band, the basic frequency of the operating clock can be set with a smaller deviation amount (here, the frequency difference when the reference frequency of the normal operating clock is changed to another frequency). In that case, the former method is advantageous, and when the amount of deviation is large, the latter method of dynamically performing deviation in channel units is advantageous because the amount of deviation is small. By deviating the basic frequency of the clock to a smaller extent, it is possible to prevent deterioration of processing performance, simplify the margin calculation when designing a circuit system, and prevent an increase in design man-hours and quantity.

First, FIG. 13 shows a flowchart in the case of shifting the harmonics from the entire allocated frequency band of the former. This method shifts harmonics from the entire allocated frequency band when using wireless communication, and is processed by the CPU 10 of the control unit according to the flowchart shown in FIG.

In FIG. 13, the power supply of the information processing device is turned off.
N and the reset signal 92 is output (step 13).
0), the frequency f'0 of the PLL circuit output 24 is set to be equal to the frequency f0 of the square wave generator output 23, which is the maximum frequency (step 131). According to the equation shown in the above-mentioned equation 2, f′0 = f0 when M = N. It is determined whether or not the wireless communication is used (step 132). When the wireless communication is used, these communication bands are usually determined in advance as the target communication band. Therefore, step 133 is performed in advance. You may set the result of the determination in. If there is a harmonic component, the PLL is set so that the harmonic component does not enter the communication band.
The frequency f'0 of the circuit output 24 is shifted (step 134). The direction of shifting should be such that the frequency decreases. For example, in the case of f0 = 10 MHz, if f′0 = 8 MHz and harmonic components are not included in the communication band, set M = 4 and N = 5 from the formula shown in Formula 2. . In this case, the CPU 10
The values of M and N are set in the bias register 22 via the / O bus controller 12. When set, normal communication processing is performed (step 135), and when the communication processing ends (step 136), other normal processing is performed (step 137) and the process loops to step 132. When the wireless communication is not used and when the frequency f′0 × n of the PLL circuit output 24 does not exist in the target communication band, the normal processing is performed and then the process loops to step 132.

By performing the processing as described above, it is possible to prevent interference during communication due to the frequency of the operating clock of the system. Also, in the above process, at the end of communication,
You may reset so that it may become f'0 = f0. In this case, the frequency can be shifted only during communication. As described above, in the above processing, if there is information about the clock frequency of the device itself and the frequency used for wireless communication, the processing can be performed by a simple calculation. Further, although it is assumed that the frequency received by the own device is targeted, the transmission / reception frequency may be targeted depending on the form of the wireless communication system due to the reason described above.

Next, FIG. 14 shows a flowchart for shifting harmonics in units of channels in the latter case.

In FIG. 14, the power supply of the information processing device is turned on.
Then, the reset signal 92 is output (step 14).
0) and the frequency f'0 of the PLL circuit output 24 is set to the frequency f0 (maximum fundamental frequency) of the square wave generator output 23 that maximizes the processing performance of the system (step 1).
41). In this case, the initial reception channel band is f′0 ×
It is set except for n (step 142). However,
This does not apply to a wireless system dedicated device having a fixed control channel. Also, the frequency f′0 of the PLL circuit output 24
Is prepared in advance, and the flag is reset in the initial stage. Next, ROM15
The above boot program and the initialization program on the external storage device 70 perform the following processing. First, the detection means determines whether or not there is a wireless connection request (step 143), and if there is, a carrier sense is performed (step 144). In this case, the channel for which carrier sensing is performed first may be preferentially selected so as not to hit a harmonic of the clock frequency. If the selected channel is in use, the channel is incremented or decremented to select the next channel.
When the channel is selected, it is determined whether or not the flag F = 0 (step 146). If the flag F = 0, the frequency f′0 × n (n is a natural number) of the PLL circuit output 24 is included in the frequency band of either channel. ) Is determined by the determining means (step 147). If there is a harmonic component, the determining means determines the frequency f'0 of the PLL circuit output 24 so that the harmonic component does not enter the communication band, and the changing means shifts the frequency (step 148). In this case, the frequency f′0 of the PLL circuit output 24 is set lower by the frequency β (the changed frequency is g), and the flag F is set. Carrier sensing is performed again (step 144) to detect an empty channel. This processing is performed because it may be determined that a channel that is not actually in use is in use due to the influence of harmonic components of the operating clock of the system currently used, and the operation clock is changed. This eliminates the effect and detects a free channel. Also,
In steps 144 and 145, if there are no empty channels and all channels are in use, the processing of step 146 and subsequent steps may be performed. If flag F = 1,
The PLL circuit output 24 in the frequency band of either channel
The determining means determines whether or not the frequency g × n (n is a natural number) is present (step 149). If there is a harmonic component, the frequency g of the PLL circuit output 24 is shifted to the original frequency f'0 so that the harmonic component does not enter the communication band (step 150).
Further, the flag F is reset. Carrier sensing is performed again (step 144) to detect an empty channel. In this case, since the frequency β of the shift amount is set so as to avoid only the frequency band of the channel in which the harmonic component exists, the changed frequency g may interfere in other channels. Performs various processing. After detecting an empty channel, a normal communication protocol is executed (step 151), and the process ends (step 152).

As described above, the control is always performed so that the harmonic of the clock frequency of its own does not collide with the channel for carrier sensing. Further, in the above process, it may be reset so that f′0 = f0 at the end of communication. Further, when the processing is time-consuming when changing the frequency, a wait time may be inserted before performing the carrier sensing, and carrier sensing may be performed after the frequency is changed.

Next, FIG. 11 shows a list of frequencies used in an actual communication system. Among them, taking a teleterminal system as an example, a concrete relationship between the harmonics of the clock and the communication frequency will be described with reference to the explanatory diagram shown in FIG.

In FIG. 12, one information processing device is
It is assumed that the 28 MHz clock f0 is used. In this case, the seventh harmonic of the clock, 896 MHz, collides with the channel of the mobile station side frequency of the teleterminal system. In the processing shown in FIG. 13 described above, in order to shift this harmonic from the entire frequency band on the mobile station side of the teleterminal system, it is necessary to lower the harmonic frequency by about 3 MHz (the expression of lowering is the upper limit of the system design). This is because it is almost impossible to raise since it should be using a clock, but it does not limit the present invention). In this case, the frequency of the system clock can be shifted to 3 MHz / 7 = about 428 kHz so that harmonics are not included in the communication band.

Further, in the processing shown in FIG.
If only shifting one channel, the channel spacing is 1
All you have to do is lower it by 2.5 KHz. Looking at the frequency of the system clock, if only one channel is shifted, β = 1
A deviation of 2.5 KHz ÷ 7 = about 1.8 KHz is sufficient. Therefore, changed g = 128MHz-1.8KHz
= About 127.9 MHz, and in this case, M = 04FF _(H) and N = 0500 _(H) are set according to the following equation. As a result, in the initial state, M = 0500 _(H) , N =
0500 _(H) , and then, in step 148 shown in FIG. 14, M = 04FF _(H) , N = 050
This can be handled by changing the value of M by setting it to 0 _(H) .

[0039]

## EQU00003 ## g / f0 = 127.9 / 128 = 1279/1280 = M / N With this amount of deviation, the former method gives 0.3% and the latter method gives 0.0014%. There is no problem in terms of performance, the margin design is simple, and the clock for the display device operates without any problem if the bias amount is in this range.

The system clock f0 is 64 MHz.
In the case of, since the 14th harmonic hits,
To shift from the entire frequency band on the mobile station side, β = 3 MHz / 1
A deviation of 4 = approximately 214.3 kHz is sufficient. Therefore,
Changed g = 64 MHz-214.3 KHz = about 63.
Since it is 7857 MHz, it is set to 63.5 MHz, and in this case, M = 00 EF _(H) and N = 0080 _(H) are set.

In the future, it is expected that a wireless system having a wide band such as a wireless LAN cannot be dealt with by the method of shifting from the entire frequency band. At present, the allocated frequency band is not fixed in Japan, but in the wireless LAN system, the band of one channel is 10 MHz, and the total band is 140 MHz.
Expected to be around. Assuming that the frequency is 2 GHz and the clock is assumed to be 100 MHz, the harmonics are 100 MHz by the method of shifting from the entire frequency band and 10 M by the channel unit.
In the case of Hz, the former method is 5% and the latter method is 0.
It will be 5%. In the case of a wireless system having a wide band such as a wireless LAN, a method of dynamically controlling each channel is very advantageous.

According to the present embodiment, there is an effect of improving the communication performance of the entire wireless system while minimizing the deterioration of the system processing performance. Further, by minimizing the shift of the basic clock frequency, it is possible to facilitate margin design, that is, reduce the number of design steps. Moreover, since it is not necessary to suppress radiated electromagnetic waves unnecessarily, cost reduction of the shield housing and the like can be expected.

Further, from the viewpoint of the wireless communication system, there is an effect that it is possible to provide a system which can effectively use frequency resources without wasting channels.

Next, another embodiment will be described with reference to FIG. FIG. 3 shows a block diagram in which the register is connected to the memory bus. As shown in FIG. 3, the bias register constituting the variable clock circuit 2 which is a hardware feature of the present invention is not necessarily connected to the I / O bus 81, but is connected to the memory bus 82. In some cases. In this case, the value of the register at the time of changing the frequency can be stored in the memory of the storage means in advance and read out. Further, it is possible to substitute a simple status signal indicating a state without taking the form of a register. For example, when the wireless communication means 3 is mounted in the slot (connector) of the I / O bus 81 as an image of a card or a module, a fixed signal obtained by pulling up / down a code specific to the wireless system is used to slot the I / O bus 81. There are cases such as when outputting to.

FIG. 4 shows a block diagram of the wireless communication means separation type. In FIG. 4, 33 is an information processing apparatus main body side interface, 34 is an interface cable, 35 is a wireless communication means side interface, 36 is a data control unit, 37 is a data bus, and 38 is a variable clock circuit control bus. In this embodiment, the wireless communication means 3
In addition to the case where the
The processing described above can also be applied to a mode in which the interface cable 34 is used for connection as shown in FIG.

Further, FIG. 5 shows a block diagram of a type having a plurality of wireless communication functions. In FIG. 5, 3-1
Is, for example, a wireless communication unit of a WAN-based teleterminal system, 3-2 is a wireless communication unit of a LAN-based wireless LAN system, and 30-1 and 30-2 are respective antennas. In this way, when supporting two or more types of wireless systems, control is performed so that interference does not occur in each frequency band.

Further, FIG. 6 shows a block diagram of an information processing apparatus having a plurality of variable clocks. In FIG. 6, 2-1
Is a clock for the CPU 10, the I / O bus controller 12, the memory controller 13, and the like. Also, 2-2
Is a clock of the I / O device n17, and 2-3 is a clock of the display circuit 18. In a general information processing device, C
The clock of the PU 10 may be taken into consideration, but in a special device, the clocks of the display circuit 18 and the I / O device n17 also need to be taken into consideration, but the present invention can be applied to such a case.

As described above, according to the above embodiment, it is possible to prevent the communication interference due to the unnecessary radiation electromagnetic wave. As a result, there is an effect that the performance degradation of the information processing apparatus main body is suppressed to the minimum and the communication performance is ensured to the maximum.

[0049]

According to the present invention, it is possible to prevent the occurrence of communication interference due to unnecessary radiated electromagnetic waves in an information processing apparatus equipped with wireless communication means.

[Brief description of drawings]

FIG. 1 is a block diagram of an embodiment of the present invention.

FIG. 2 is a block diagram of a conventional information processing device.

FIG. 3 is a block diagram in which a register is connected to a memory bus.

FIG. 4 is a block diagram of a wireless communication means separation type.

FIG. 5 is a block diagram of a type having a plurality of wireless communication functions.

FIG. 6 is a block diagram of an apparatus having a plurality of variable clocks.

FIG. 7 is an internal configuration diagram of a variable clock circuit.

FIG. 8 is a graph showing a spectrum of an electromagnetic wave emitted from a circuit having only a clock.

FIG. 9 is a graph showing a spectrum of an electromagnetic wave emitted from a general information processing apparatus.

FIG. 10 is an explanatory diagram of a problem in the terminal image mobile communication system.

FIG. 11 is an explanatory diagram showing a list of frequencies used in an actual communication system.

FIG. 12 is an explanatory diagram of a relationship between a clock harmonic and a communication frequency.

FIG. 13 is a flowchart for shifting harmonics from the entire allocated frequency band.

FIG. 14 is a flowchart when shifting harmonics on a channel-by-channel basis.

[Explanation of symbols]

1 ... Information processing apparatus main body, 2 ... Variable clock circuit, 3 ... Wireless communication means, 4 ... Base station, 5 ... Network, 6 ... Base station transmission radio wave, 7 ... Mobile station transmission radio wave, 8 ... Other base station Interfering wave, 9 ... Unwanted radiated electromagnetic wave, 10 ... CPU, 11 ... Clock driver, 12 ... I / O bus controller, 13
... memory controller, 14 ... memory, 15 ... ROM,
16 ... I / O device 1, 17 ... I / O device n, 18 ... Display circuit, 19 ... Keyboard controller, 20 ... Square wave generator, 21 ... PLL circuit, 22 ... Deviation register, 23 ...
Square wave generator output, 24 ... PLL circuit output, 25 ... Deflection register output, 30 ... Antenna, 31 ... Transceiver circuit, 3
2 ... Transmission / reception circuit connection line, 33 ... Main body side interface,
34 ... Interface cable, 35 ... Wireless communication means side interface, 36 ... Data control section, 37 ...
Data bus, 38 ... Variable clock circuit control bus, 70 ...
External storage device, 71 ... Display device, 72 ... Keyboard, 7
3 ... mouse, 74 ... speaker, 75 ... microphone,
80 ... CPU bus, 81 ... I / O bus, 82 ... Memory bus, 83 ... Clock, 84 ... Clock, 85 ... Clock, 86 ... External storage device bus, 87 ... Display output, 88 ...
Keyboard cable, 89 ... Mouse cable, 90 ... Speaker cable, 91 ... Microphone cable, 92
... reset signal, 201 ... N frequency divider, 202 ... M frequency divider, 203 ... phase comparator, 204 ... charge pump, 2
05 ... Loop filter, 206 ... VCO, 207 ... N division register, 208 ... M division register, 209 ... Division register data bus, 210 ... Register control signal, 211
... Register control circuit.

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Yoshidome, et al. 810 Shimoimaizumi, Ebina, Kanagawa, Ltd., Office Systems Division, Hitachi Ltd. (72) Kazuo Hirota, 810 Shimoimaizumi, Ebina, Kanagawa, Ltd. Hitachi Factory Office Systems Division

Claims (4)

[Claims] 1. An information processing apparatus comprising: a wireless communication means for performing wireless communication; and a clock circuit for generating a clock signal, wherein the information processing apparatus operates based on the clock signal, wherein the wireless communication means has no wireless connection request. And a detection means for detecting whether or not there is a wireless connection request, the frequency of the clock signal of the clock circuit is set to a communication band in the wireless communication means, and a harmonic component of the clock signal is detected. An information processing apparatus including a wireless communication unit, the clock variable unit changing to a frequency that does not exist. 2. The method according to claim 1, further comprising end detection means for detecting the end of the wireless communication, wherein the clock variable means performs wireless communication by the end detection means when the frequency of the clock signal is changed. When the end of is detected, the frequency of the clock signal is returned to the original frequency. 3. The wireless communication means according to claim 1 or 2, further comprising: a plurality of channels, further comprising empty channel detection means for detecting whether or not there is an empty channel among the channels, and the clock variable means Judging means for judging whether or not a harmonic component of the clock signal exists in at least one communication band of the channel in the wireless communication means, and the judging means judges that a harmonic component of the clock signal exists The determining means determines the frequency of the clock signal having no harmonic component of the clock signal in at least one communication band of the channel, and the changing means for changing to the frequency of the clock signal determined by the determining means. An information processing apparatus comprising a wireless communication means comprising: 4. An information processing apparatus having a plurality of channels, having wireless communication means for wirelessly communicating when receiving a wireless connection request, and a clock circuit for generating a clock signal, and operating based on the clock signal. A first step of detecting whether or not there is a wireless connection request in the wireless communication means, and a second step of detecting an empty channel when detecting that there is a wireless connection request. As a result of the detection, when there is no free channel, the frequency of the clock signal of the clock circuit is determined so that a harmonic component of the clock signal does not exist in one communication band of the channel in the wireless communication means. A third step; a fourth step of changing the frequency of the clock signal to the determined frequency; After the frequency change, the fifth step of performing the second step and the sixth step of performing wireless communication when an idle channel is detected in the second step are processed. Communication method.