JPH07153001A - Output detector circuit for magnetoresistance element - Google Patents

Abstract

PURPOSE:To differentially amplify an output of a magnetoresistance element without delay of a transient response time by providing a delay circuit for delaying switching of a differential amplifier from switching of a bias circuit. CONSTITUTION:Switchings of transistors Q31, Q32 of second and third constant current means in a differential amplifier 3 from ON to OFF are delayed from switching of a transistor Q22 of first constant current means of a bias circuit 2 by a delay circuit 4. That is, when currents I31, I32 flow to the transistors Q31, Q32, a bias current I22 always flows to a magnetoresistance element (MR) 1, and a DC potential difference is generated between terminals V1 and V2 of the MR1. Thus, a capacitor C3 is charged in an initial read mode, and charge of the C3 is not discharged upon switching of its following mode. Accordingly, a potential difference of outputs OUT1 (V5), OUT2 (V6) of the amplifier 3 is set to zero, and a transient response time from reception of a control signal for operating the amplifier is shortened thereby to eliminate a delay.

Description

Detailed Description of the Invention

[0001]

The present invention relates to a magnetoresistive element (Magneto-R).
esistive element (MR element) output detection circuit,
In particular, it relates to an output detection circuit of a magnetoresistive element used as a head of a magnetic disk device. In recent years, as a read head of a magnetic disk device (for example, a hard disk device: HDD), a head using an MR element has been proposed. In a magnetic recording device using this MR element, it is desired to provide an output detection circuit for a magnetoresistive element that differentially amplifies the output of the MR element without causing a delay in transient response time.

[0002]

2. Description of the Related Art Conventionally, a disk device (for example, HDD)
In, the read amplifier (output detection circuit) for the ferrite or thin film head is composed of a general differential amplifier circuit in which the emitters of two transistors are directly connected. Further, conventionally, it has been proposed to use an MR element as a read head of a magnetic disk device, but an output detection circuit in a magnetic recording device using this MR element has a single-ended configuration in which one end of the MR element is grounded. Has become.

FIG. 9 is a block diagram schematically showing an example of a magnetic disk device using a magnetoresistive element. In the figure, reference numerals 101a to 101d are read heads composed of magnetoresistive elements (MR elements), 111a to 111d are write heads composed of ferrite or thin film heads, and 102.
Is a head actuator, 103 is a read / write amplifier, 1
Reference numeral 04 is an encoder / decoder, and reference numeral 105 is an interface controller. Further, reference numeral 106 is MPU.
(Micro processing unit), 107 is a spindle motor driver, 108 is a spindle motor, and 109
Is a D / A converter, 110 is a VCM driver, 112 is a VCM
(Voice Coil Motor), and, 11
Reference numerals 3a and 113b denote magnetic disks (hard disks).

As shown in FIG. 9, the magnetic disk device is provided with, for example, two magnetic disks 113a and 113b for reading and writing from both sides of each of the magnetic disks 113a and 113b. A pair of read heads
101a, 101b; 101c, 101d and write heads 111a, 111b;
111c and 111d are provided. These read heads 10
1a to 101d and write heads 111a to 111d are MPU10
The access position to each magnetic disk 113a, 113b is controlled by the D / A converter 109, VCM driver 110, VCM 112, and head actuator 102 controlled by 6. In addition, magnetic disks 113a and 113b
Is controlled by a spindle motor driver 107 and a spindle motor 108 controlled by the MPU 106.

The outputs of the read heads 101a to 101d are read / write amplifier (preamplifier) 103, encoder / decoder 104, and interface controller 105.
Is supplied as read data to the interface bus via. In addition, the write data from the interface bus is the interface controller 105, the encoder / decoder 104, and the read / write amplifier.
It is supplied to the write heads 111a to 111d via 103, and the write head writes the magnetic disks 113a and 113b. The read head 10
A part of the outputs of 1a to 101d is given to the MPU 106 via the encoder / decoder 104, and controls the access position of the read and write heads to the magnetic disk and the rotation control of the magnetic disk as well as the interface. The controller 105 is also controlled.

FIG. 10 is a circuit diagram showing an example of an output detection circuit of a magnetoresistive element as a related technique. In the figure, reference numeral 1 is a magnetoresistive element (MR element) as a read head, 2 is a bias circuit, 3 is a differential amplifier circuit, and 5 is a control circuit. Here, the output detection circuit corresponds to the read preamplifier in the read / write amplifier 103 in FIG.

As shown in FIG. 10, the bias circuit 2
Is a bias current (sense current) I for the MR element 1.
The resistor 22 is used to flow the resistor 22, and includes resistors R21 to R24, capacitors (capacitance) C2, transistors Q21 to Q23, and constant current sources 21 and 22. The constant current sources 21 and 22 are the control circuit 5
ON / OFF control is performed by a control signal CS1 from. A read / write control signal CS0 is supplied to the control circuit 5, and according to the read / write control signal CS0,
A control signal CS1 for controlling the constant current sources 21, 22 (31, 32) is output.

That is, at the time of reading from the magnetic disk device, the high potential power line V _CC to the low potential power line V _EE (GN
For D), the bias current I22 is made to flow to the MR element 1 through a path passing through the transistor Q22, the resistor R23, the MR element 1, the resistor R24 and the constant current source 22. Here, the bias current I22 flowing through the constant current source 22 starts to flow after the operation of the circuit (for example, the transistor Q21 etc.) in the preceding stage, so the timing at which the current I21 flows through the constant current source 21 (constant current source 31 , 32 flows at a timing slightly later than the timing at which the currents I31 and I32 flow).

The MR element 1 to which the bias current I22 is applied changes its resistance value according to the data written in the magnetic disk (113a, 113b), and as a result, the MR element 1
The voltage (values of the potentials V01 and V02) across both ends of the changes.
The voltage change by the MR element 1 is amplified by the differential amplifier circuit 3 and the potential difference (output voltage) between the outputs out1 and out2.
Will be taken out as.

As shown in FIG. 10, the differential amplifier circuit 3
Is a pair of transistors (differential pair transistors) Q31, Q32, load resistors R31, R to which the output of the MR element 1 is connected.
32, a capacitor C3, and constant current sources 31, 32. That is, one terminal (output V01) of the MR element 1 is connected to the base of the transistor Q31, and the collector of the transistor Q31 has a high potential power supply line V _CC through the resistor R31.
, And the emitter of the transistor Q31 is connected to the low potential power source line V _EE via the constant current source 31. The other terminal (output V02) of the MR element 1 is connected to the base of the transistor Q32,
Of the transistor Q32 is connected to the high potential power source line V _CC via the resistor R32, and the emitter of the transistor Q32 is connected to the low potential power source line V _EE via the constant current source 32.

The constant current sources 31 and 32 are on / off controlled by a control signal CS1 from the control circuit 5, and at the time of reading the magnetic disk device, from the high potential power source line V _CC to the low potential power source line V _EE (GND). ), The currents I31, I32 are made to flow through the transistors Q31, Q32 in a path passing through the resistors R31, R32, the transistors Q31, Q32, and the constant current sources 31, 32.

Here, one output out1 of the differential amplifier circuit 3
(V05) is taken out from the connection point between the collector of the transistor Q31 and the resistor R31, and the other output out2 (V06) is taken out from the connection point between the collector of the transistor Q32 and the resistor R32. Further, in order to amplify the MR element 1 differentially, the MR element 1 and the bias current (sense current) I22
Since it is necessary to cancel the DC voltage generated at and,
Transistor Q31 emitter (V03) and transistor Q32
A capacitor C3 is provided between the emitter and the emitter (V04).

[0013]

As described with reference to FIG. 10, in the magnetic disk device (HDD) using the MR element 1 as the read head, the MR element 1 is used.
In order to amplify the output of the differential differentially, a capacitor C3 must be provided between the emitters of the transistors Q31 and Q32 that form a differential pair.

By the way, in such a magnetic disk device, the write mode and the read mode are switched at any time to perform the writing and reading processes, and the control circuit 5 turns the read amplifier on → off → on → off → The switching is controlled so that FIG. 11 is a diagram showing the waveform of each part and the timing of each signal in the output detection circuit of the magnetoresistive element of FIG. However, the output waveform is when the AC signal (detection signal by the MR element) is not added.

As shown in FIG. 11A, at the time of reading (in the read mode), the read / write control signal CS0 rises from the low level "L" to the high level "H". As a result, as shown in FIGS. 11B and 11C, the control signal CS1 output from the control circuit 5 is at the low level "L".
From the high level to “H”, the constant current sources 21 and 22 in the bias circuit 2 and the constant current sources in the differential amplifier circuit 3
31,32 are switched on. Here, as described above, the timing at which the bias current (sense current) I22 flows through the MR element 1 (see FIG. 11B) is determined by the transistor Q.
Since it is after the operation of the circuit in the previous stage such as 21 etc., the constant current sources 31, 3
Timing when currents I31 and I32 (I21) flow through 2 (21) (Fig. 11)
(See (c)) It will be a little later than the timing.

That is, the constant current source is controlled by the control signal CS1.
Bias current I flowing through the constant current source 22 (MR element 1) when 21,22; 31,32 are turned on → off → on → off → ...
The constant current sources 31 and 32 start to flow 22 almost at the same time or after a slight delay after the currents I31 and I32 flow. Therefore, as shown in FIG. 11 (d), there occurs a moment when no DC potential difference is generated between the terminals (V01, V02) of the MR element 1, and as shown in FIG. 11 (e), the capacitor C3 Will be charged and discharged. That is, in the immediately preceding read operation, the charge stored in the capacitor C3 is charged and discharged, and as a result, as shown in FIG. 11 (f),
Voltage of output out1, out2 of differential amplifier circuit 3 (V05, V06)
Changes temporarily and becomes a common voltage and stabilizes (that is, until the output voltages V05 and V06 become the same potential). That is, the output detection circuit of the magnetoresistive element shown in FIG. 10 has a problem to be solved that the transient response time after receiving the control signal for operating the amplifier circuit is long.

In view of the problem of the output detecting circuit of the magnetoresistive element as the related art described above, the present invention differentially amplifies the output of the magnetoresistive element without causing a delay in the transient response time. An object is to provide an output detection circuit of a magnetoresistive element.

[0018]

According to the present invention, a circuit for detecting the output of the magnetoresistive element 1 has a first constant current means 22, and the first constant current means 22 allows the above-mentioned A bias circuit 2 for supplying a bias current to the magnetoresistive element 1,
Outputs of the magnetoresistive element 1 are connected to respective bases of first and second transistors Q31 and Q32, capacitance means C3 connected between respective emitters of the first and second transistors Q31 and Q32, and Second and third constant current means 3 connected to the emitters of the first and second transistors Q31 and Q32 and flowing a current through the respective transistors.
1 and 32, and a delay circuit that delays the switching of the second and third constant current means 31 and 32 from on to off more than the switching of the first constant current means 22. 4 is provided. An output detection circuit for a magnetoresistive element is provided.

[0019]

According to the output detecting circuit of the magnetoresistive element of the present invention, the delay circuit 4 causes the switching of the second and third constant current means 31 and 32 in the differential amplifier circuit 3 from ON to OFF by bias. First constant current means 22 of circuit 2
Delayed than switching.

That is, the second and third constant current means 3
1, 32 (first and second transistors Q31, Q32)
When a current (I31, I32) flows through the magnetic resistance element 1, a bias current (I22) always flows through the magnetoresistive element 1 (before that), and a DC potential difference occurs between the terminals (V1, V2) of the magnetoresistive element 1. Is occurring. Therefore, the capacitor C3 is
It is charged in the first read mode, and the charge of the capacitor C3 is not discharged in the subsequent switching of modes.

Therefore, according to the output detection circuit of the magnetoresistive element of the present invention, the potential difference between the outputs (OUT1, OUT2) of the differential amplifier circuit 3 is eliminated (the voltage between V5 and V6 is made zero), and the amplifier circuit. It is possible to shorten the transient response time after receiving the control signal for operating the magnetic disk drive, and in the magnetic disk device using the magnetoresistive element, the output of the magnetoresistive element can be made differential without delay of the transient response time. Can be amplified.

[0022]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of an output detection circuit for a magnetoresistive element according to the present invention will be described below with reference to the drawings. 1 is a circuit diagram showing an embodiment of an output detection circuit for a magnetoresistive element according to the present invention. In the figure, reference numeral 1 is a magnetoresistive element (MR element) as a read head, 2 is a bias circuit, 3 is a differential amplifier circuit, 4 is a delay circuit, and 5 is a control circuit. Here, the output detection circuit corresponds to the read preamplifier in the read / write amplifier 103 in FIG. As is clear from the comparison between FIG. 1 and FIG. 10, the output detection circuit of the magnetoresistive element of the present embodiment is different from the output detection circuit of the magnetoresistive element shown in FIG. A delay circuit 4 for delaying a control signal for controlling the switching of the constant current sources 31 and 32 of 3 is further provided.

As shown in FIG. 1, the bias circuit 2
Is a bias current (sense current) I for the MR element 1.
The resistor 22 is used to flow the resistor 22, and includes resistors R21 to R24, capacitors (capacitance) C2, transistors Q21 to Q23, and constant current sources 21 and 22. The constant current sources 21 and 22 are the control circuit 5
ON / OFF control is performed by a control signal CS1 from. A read / write control signal CS0 is supplied to the control circuit 5, and according to the read / write control signal CS0,
A control signal CS1 for controlling the constant current sources 21, 22 (31, 32) is output.

At the time of reading from the magnetic disk device, the transistor Q22, the resistor R23, the MR element 1, the resistor R are connected from the high potential power source line V _CC to the low potential power source line V _EE (GND).
24, a bias current I22 is passed through the MR element 1 through a path passing through the constant current source 22. Bias current I
In the MR element 1 in which 22 is flowed (in the read mode), the resistance value changes according to the data written in the magnetic disks (113a, 113b), and as a result, the voltage across the MR element 1 ( The potentials V1 and V2) change. This MR
The voltage change by the element 1 is amplified by the differential amplifier circuit 3 and taken out as the outputs OUT1 and OUT2.

As shown in FIG. 1, the differential amplifier circuit 3 includes a pair of transistors (differential pair transistors) Q31, Q32 and a load resistor R3 to which the output of the MR element 1 is connected.
1, R32, capacitor C3, and constant current sources 31, 32 are provided. That is, the base of the transistor Q31 is M
One terminal (output V1) of the R element 1 is connected, the collector of the transistor Q31 is connected to the high potential power supply line V _CC through the resistor R31, and the emitter of the transistor Q31 is connected to the constant current source 31. It is connected to the low potential power source line V _EE via. The base of the transistor Q32 is MR
The other terminal (output V2) of the element 1 is connected, the collector of the transistor Q32 is connected to the high potential power supply line V _CC through the resistor R32, and the emitter of the transistor Q32 is connected through the constant current source 32. Connected to the low potential power supply line V _EE . That is, at the time of reading (in the read mode) of the magnetic disk device, the resistances R31, R32, and R32, R32, are connected from the high potential power source line V _CC to the low potential power source line V _EE (GND).
Currents I31 and I32 flow through the transistors Q31 and Q32 in a path passing through the transistors Q31 and Q32 and the constant current sources 31 and 32, respectively.

One output OUT1 (V5) of the differential amplifier circuit 3
Is taken out from the connection between the collector of the transistor Q31 and the resistor R31, and the other output OUT2 (V6) is taken out from the connection between the collector of the transistor Q32 and the resistor R32. In addition, the emitter of transistor Q31 (V
A capacitor C3 for canceling the DC voltage generated by the MR element 1 and the bias current I22 and amplifying the MR element 1 differentially is provided between 3) and the emitter (V4) of the transistor Q32. There is.

Here, the bias current I22 flowing through the constant current source 22 of the bias circuit 2 starts to flow after the operation of the circuit (for example, the transistor Q21) at the previous stage in the bias circuit 2, so that the constant current source 22 21 will flow at a timing slightly later than the timing at which the current I21 flows. However, the constant current source 3 in the differential amplifier circuit 3
The switching of the 1,32 switches the control signal CS1 to the delay circuit 4
Control signal after being delayed by (delayed control signal) C
Since it is controlled by S2, the timing is later than the timing at which the bias current I22 flows through the constant current source 22.

FIG. 2 is a diagram showing the waveform of each part and the timing of each signal in the output detection circuit of the magnetoresistive element of FIG. However, the output waveform is when the AC signal (detection signal by the MR element) is not added. Figure 2
As shown in (a), during reading (in the read mode), the read / write control signal CS0 rises from the low level "L" to the high level "H". As a result, Fig. 2 (b)
, The control signal CS1 output from the control circuit 5 changes from low level "L" to high level "H",
The constant current sources 21 and 22 in the bias circuit 2 are switched on. Here, as described above, the timing at which the bias current (sense current) I22 flows through the MR element 1 (see FIG.
(see (b)) is after the operation of the circuit in the previous stage such as the transistor Q21, and therefore flows at a timing slightly later than the timing at which the current I21 flows through the constant current source 21 (for example, see FIG. 11 (c)). It will be.

Here, as shown in FIG. 2C, the switching of the constant current sources 31 and 32 in the differential amplifier circuit 3 is as follows.
Since the control signal CS1 is controlled by the control signal (delayed control signal) CS2 after being delayed by the delay circuit 4, the timing when the currents I31 and I32 flow through the constant current sources 31 and 32 is constant current source 22 (MR The timing is later than the timing when the bias current I22 flows through the element 1).

Therefore, when the constant current sources 21, 22 and 31, 32 are turned on → off → on → off → ... by the control signal CS1 and the delayed control signal CS2, the constant current sources 31 and 32 (differential The currents I31 and I32 flowing through the pair of transistors Q31 and Q32 will start flowing after the bias current I22 flows through the constant current source 22 (MR element 1).
That is, first, as shown in FIG. 2 (d), when the bias current I22 flows through the MR element 1, voltages (V1, V2) are generated across the MR element 1, and then, as shown in FIG. 2 (e). As shown, the differential pair transistors Q31 and Q32 receive the current I3.
1, I32 flows and the voltage (V
3, V4) changes. Then, as shown in FIG. 2 (f), the voltages (V5, V5) of the outputs OUT1, OUT2 of the differential amplifier circuit 3 are
V6) changes. Here, as is apparent from FIG. 2 (f), the voltages V5 and V6 of the outputs OUT1 and OUT2 of the differential amplifier circuit 3
Immediately becomes stable to the same common voltage, so that the transient response time after receiving the control signal for operating the amplifier circuit can be shortened.

FIG. 3 is a circuit diagram showing an example of a constant current circuit portion in the output detection circuit of the magnetoresistive element of FIG. 1, and FIG. 4 is a control circuit portion and a delay circuit in the output detection circuit of the magnetoresistive element of FIG. It is a circuit diagram which shows an example of a part.
Here, the terminals P21, P22, P31, P in FIG.
32 is terminals P21, P22, P31, P in FIG.
32, and the terminal P in FIG.
2 and P3 correspond to the terminals P2 and P3 in FIG. The terminal P1 in FIG. 4 indicates a control input terminal to which a read / write control signal is supplied.

As shown in FIG. 3, the constant current sources 21 and 22 and the differential amplifier circuit 3 of the bias circuit 2 in FIG.
Constant current sources 31 and 32 are resistors R201 to R210 and R301 to
It is composed of R306, transistors Q212 to Q210, Q301 to Q306, and diodes D201 to D206, D301 to D303. Each of the constant current sources 21, 22, 31, 32 is composed of a current mirror circuit, and each of the transistors Q205, Q212,
Constant currents I21, I22, I31 and I32 flow through Q305 and Q306. That is, the transistor Q of the constant current source 21
205 is a current mirror connection with transistor Q204,
The transistor Q212 of the constant current source 22 is a transistor Q21.
1, and the transistor Q305 of the constant current source 31 and the transistor Q306 of the constant current source 32 are current mirror connected to the transistor Q303. The constant current circuit part shown in FIG.
This is merely an example, and various other circuit configurations can be used.

As shown in FIG. 4, the control circuit 5 in FIG. 1 is composed of a resistor R5, transistors Q501 to Q510, and diodes D51 to D55, and the delay circuit 4 is
It is composed of resistors R41 and R42, transistors Q41 to Q47, diodes D41 and D42, and a capacitor C4. Needless to say, the delay circuit 4 and the control circuit 5 can also use various circuits other than the circuit shown in FIG.

In the circuits shown in FIGS. 3 and 4, the control input terminal P1 of the control circuit 4 changes from the high level "H" to the low level "L" (read / write control signal CS0 in FIG. 2 (a)). Changes from low level "L" to high level "H" (however, the levels are reversed), when the write mode is switched to the read mode,
The transistor Q510 changes from the on state to the off state. When the transistor Q510 is turned off, the constant currents I21 and I22 flow through the constant current sources 21 and 22. Here, the timing at which the current I21 flows through the constant current source 21 is the same as in FIG. 11 (c), and the current I22 flows through the constant current source 22 with a slight delay after that (see FIG. 2 (b). )).

Further, by the transistor Q44 and the capacitor C4, the transistor Q47 is turned off from the on state with a time delay of, for example, about several hundreds nsec., And the constant currents I31 and I32 flow into the constant current sources 31 and 32. Start (see Figure 2 (c)). Here, the control signal CS1 from the control circuit 5 and the delayed control signal C from the delay circuit 4
S2 corresponds to the signals appearing at terminals P2 and P3, respectively.

As described above, the switching of the constant current sources 31 and 32 can be delayed compared with the switching of the constant current source 22 (21). That is, the constant currents I31 and I32 can be passed through the transistors Q31 and Q32 at a timing later than the bias current I22 passed through the MR element 1, and as a result, the common voltages (V5, V6) can be stabilized in a short time, The transient response time after receiving the control signal for operating the amplifier circuit can be shortened. Therefore, according to the present embodiment, in the magnetic disk device using the magnetoresistive element, the transient response time is not delayed,
The output of the magnetoresistive element can be differentially amplified.

FIG. 5 is a circuit diagram showing a main part of the output detection circuit of the magnetoresistive element of FIG. 1, and FIG. 6 is a circuit diagram showing a modified example of the circuit of FIG. As is apparent from FIG. 5, in the embodiment shown in FIG. 1, one output OUT1 is taken out from the connection point between the resistor R31 and the collector of the transistor Q31, and the other output OUT2 is obtained from the resistor R32 and the transistor Q32. It is designed to be taken out from the connection point with the collector of.

On the other hand, in the modification of FIG.
Between 31 and the collector of transistor Q31
Q33 is provided, and the resistor R32 and transistor Q32
And a transistor Q34 between it and
Connect the transistors Q33 and Q34 in cascade.
Growling. That is, the power supply line V having a high potential at one end _CC
The other ends of resistors R31 and R32 connected to
Connected to the collectors of transistors Q33 and Q34,
The emitters of transistors Q33 and Q34 are
Connected to the collectors of transistors Q31 and Q32.
Here, the bases of the transistors Q33 and Q34 are transistor
Of high potential that does not saturate the transistors Q31 and Q32.
Power supply voltage (V_CC) And low-potential power supply voltage (V_EE) Between
It is connected to the power supply that generates the appropriate voltage, and one output OUT1
Is the connection point between the resistor R31 and the collector of the transistor Q33?
The other output OUT2 and resistor R32
Taken out from the connection point with the collector of the transistor Q34
It has become so.

FIG. 7 is a diagram showing the frequency characteristics of gain by the circuits of FIGS. 5 and 6 in comparison. In the figure,
A curve GC1 shows the frequency characteristic of the gain by the circuit of FIG. 5, and a GC2 shows the frequency characteristic of the gain by the circuit of FIG. Here, the gain Av is Av =-(V
out / Vin). (However, Vin is the input voltage of the differential amplifier circuit 3 (the output voltage of the MR element 1, V1,
V2), and Vout is the output voltage of the differential amplifier circuit 3 (V5,
V6) is shown. As is apparent from FIG. 7, in the circuit in which the transistors Q33 and Q34 connected in cascade are added as shown in FIG. 6, the Miller effect in the circuit of FIG. Can be spread to the side.

FIG. 8 is a circuit diagram showing another embodiment of the output detection circuit of the magnetoresistive element of the present invention. In the figure, reference numerals 11 and 12 indicate MR elements as read heads. In this embodiment, as in the modification shown in FIG. 6, transistors Q33, Q connected in cascade are connected.
34 are provided. As shown in FIG. 8, in the output detection circuit of the magnetoresistive element of this embodiment, two MRs are used.
Elements 11 and 12 as switching elements SW211, SW212 and
It is designed to be selected and used by SW221 and SW222. That is, for example, in the magnetic disk device shown in FIG. 9, two write heads (MR elements) 101a, 101b and
101c and 101d are provided. In the embodiment shown in FIG. 8, one output detection circuit is provided for each magnetic disk and the outputs of the two MR elements are detected by one output detection circuit.

That is, the MR element 11 is connected to the differential pair transistors Q311 and Q312, and the MR element 12 is connected to the differential pair transistors Q321 and Q322. As described above, in the embodiment of FIG. 8, for the first MR element 11, the resistors R231 and R241 and the transistors Q311 and Q312,
Q221 is provided, and resistors R232, R242 and transistors Q321, Q322, Q222 are provided for the second MR element 12.
Is provided, and one MR element is selected by the switch elements SW211, SW212; SW221, SW222 and connected to each constant current source 22, 31, 32 for use (reading operation). Here, the switch elements SW211 and SW212 are the switch control circuit 50.
ON / OFF is controlled by the control signal CS10 from
The switch elements SW221 and SW222 are on / off controlled by a control signal CS20 from the switch control circuit 50.

[0042]

As described above in detail, according to the output detection circuit of the magnetoresistive element of the present invention, the potential difference between the outputs of the differential amplifier circuit is eliminated and the control signal for operating the amplifier circuit is received. The transient response time can be shortened, and in the magnetic disk device using the magnetoresistive element, the output of the magnetoresistive element can be differentially amplified without delay in the transient response time.

[Brief description of drawings]

FIG. 1 is a circuit diagram showing an embodiment of an output detection circuit for a magnetoresistive element according to the present invention.

FIG. 2 is a diagram showing the waveform of each part and the timing of each signal in the output detection circuit of the magnetoresistive element of FIG.

3 is a circuit diagram showing an example of a constant current circuit portion in the output detection circuit of the magnetoresistive element of FIG.

4 is a circuit diagram showing an example of a control circuit portion and a delay circuit portion in the output detection circuit of the magnetoresistive element of FIG.

5 is a circuit diagram showing a main part of an output detection circuit of the magnetoresistive element in FIG. 1. FIG.

6 is a circuit diagram showing a modified example of the circuit of FIG.

FIG. 7 is a diagram showing a comparison of gain frequency characteristics by the circuits of FIGS. 5 and 6;

FIG. 8 is a circuit diagram showing another embodiment of the output detection circuit of the magnetoresistive element of the present invention.

FIG. 9 is a block diagram schematically showing an example of a magnetic disk device using a magnetoresistive element.

FIG. 10 is a circuit diagram showing an example of an output detection circuit of a magnetoresistive element as a related technique.

11 is a diagram showing waveforms of respective parts and timings of respective signals in the output detection circuit of the magnetoresistive element of FIG.

[Explanation of symbols]

1 ... Magnetoresistive element (MR element) 2 ... Bias circuit 3 ... Differential amplifier circuit 4 ... Delay circuit 5 ... Control circuit 101a-101d ... Read head (MR element) 102 ... Head actuator 103 ... Read / write amplifier 104 ... Encoder / decoder 105… Interface controller 106… MPU 107… Spindle motor driver 108… Spindle motor 109… D / A converter 110… VCM driver 111a to 111d… Write head (ferrite or thin film head) 112… Voice coil motor ( VCM)

Claims (6)

[Claims] 1. A circuit for detecting the output of a magnetoresistive element (1; 11, 12), comprising first constant current means (22), said magnetoresistive element being provided by said first constant current means. A bias circuit (2) for applying a bias current to the first and second transistors (Q31, Q32), to which outputs of the magnetoresistive element are respectively connected to their bases;
And a capacitance means (C3) connected between the respective emitters of the second and second transistors, and second and third constant current means connected to the emitters of the first and second transistors and supplying a current to the respective transistors. A differential amplifier circuit (3) having (31, 32), and a delay circuit for delaying the switching of the second and third constant current means from OFF to ON than the switching of the first constant current means. (4) An output detection circuit for a magnetoresistive element, comprising: 2. The differential amplifier circuit (3) includes first resistance means (R31) provided between a first power supply means (V _CC ) and a collector of the first transistor (Q31). And a second resistance means (R32) provided between the first power supply means and the collector of the second transistor (Q32), and the collector of the first transistor and the first resistance means (R32).
The first output (OUT1) is taken out from the connection point with the resistance means, the second output (OUT2) is taken out from the connection point between the collector of the second transistor and the second resistance means, and First and second transistors (Q3
1, Q32) through a second power supply means (V _EE ; GND) via the second and third constant current means (31, 32).
), The output detection circuit of the magnetoresistive element according to claim 1. 3. The differential amplifier circuit (3) includes first resistance means (R31) provided between a first power supply means (V _CC ) and a collector of the first transistor (Q31). And a third transistor (Q33) and a second resistance means (R32) and a fourth transistor (Q34) provided between the first power supply means and the collector of the second transistor (Q32). And the third and fourth transistors are cascade-connected, and the first output (OUT1) is taken out from the connection point between the first resistance means and the third transistor, and the second output The output (OUT2) is taken out from the connection point between the second resistance means and the fourth transistor,
Then, the first and second transistors (Q31, Q
32) the emitter of the second and third constant current means (3
The output detecting circuit of the magnetoresistive element according to claim 1, characterized in that the output detecting circuit is connected to the second power supply means (V _EE ) via 1, 32). 4. The constant current source (22, 31, 32) is
Switching is controlled by a control signal (CS1) from a control circuit (5), and the delay circuit (4) delays the control signal (CS1) to delay the second and third constant current sources (31, 32). Only for the delayed control signal (C
The output detection circuit of the magnetoresistive element according to claim 1, which is adapted to supply S2). 5. A plurality of (11, 12) magnetoresistive elements are provided, and an output detection circuit of the magnetoresistive elements selects a switch means (SW) for selecting any one of the magnetoresistive elements.
211, SW212; SW221, SW222), and the magnetoresistive element selected by the switch means is connected to the first, second and third constant current means (22, 31, 32). An output detection circuit of the magnetoresistive element according to item 1. 6. The plurality of constant current means (22, 31, 3)
2. The output detecting circuit for a magnetoresistive element according to claim 1, wherein 2) is constituted by a current mirror circuit.