JPH07147541A - Semiconductor integrated circuit - Google Patents

Abstract

PURPOSE:To convert a digital signal into an analog signal of multi-channel by inputting an analog signal converted by a single D/A converter section to lots of sample-and-hold circuits and applying alternative sampling to the sample- and-hold circuits. CONSTITUTION:A circuit controlled by analog signals V01-V0n is connected to analog signal output terminals 2C1-2Cn. When a CPU 2f is driven, whether or not it is required to control the connected circuit is discriminated. When all of the analog signals V01-V0n are latched as they are, all sampling switches SP1-SPn are turned off and sample-and-hold circuits 2d1-2dn hold the signals. When the signal V01 is changed, the sampling switches SP1-SPn are all turned off by a switch control signal SC and a predetermined digital signal 2e is inputted to a D/A converter section 1 succeedinhly. Then only a SPi corresponding to the terminal 2Ci is closed to change the analog signal V0i to control the connected circuit.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor integrated circuit for converting a digital signal into a multi-channel analog signal and a semiconductor integrated circuit for converting a multi-channel analog signal into a digital signal.

[0002]

2. Description of the Related Art In recent years, digital / analog converters (hereinafter referred to as
A semiconductor integrated circuit with a built-in D / A converter)
With the digitization of signal processing in the field of handling analog signals, it has been widely used. In addition, the number of digital signal channels handled in each system tends to increase, and various types of semiconductor integrated circuits having a large number of analog signal output terminals capable of outputting analog signals of a large number of channels are in practical use.

FIG. 5 is a block diagram showing the structure of a single-channel D / A conversion unit called a current addition method for converting the value of an 8-bit digital signal into the value of an analog signal, for example. The D / A conversion unit 1 is composed of a resistance circuit 1a and an operational amplifier circuit 1b. In the resistance circuit 1a, nine resistors R ₁ , R ₂ ... R ₉ are connected in series, a reference voltage V _R is applied to one terminal of the series circuit, and the other terminal is grounded.

One terminal of this series circuit is connected to the common terminal of the switch S ₁ via the resistor R ₁₀ , and the connecting portion between the resistors R ₁ and R ₂ is connected to the common terminal of the switch S ₂ via the resistor R ₁₁ . The connection between the resistors R ₂ and R ₃ is connected to the switch S ₃ via the resistor R _12.
Of the common terminal of the switch S ₄ via the resistor R ₁₃ and the connection between the resistors R ₃ and R ₄ of the common terminal of the switch S ₄ and the connection of the resistors R ₄ and R ₅ via the resistor R ₁₄ to the switch S ₅ Common terminal of
The connection between the resistors R ₅ and R ₆ is connected to the common terminal of the switch S ₆ via the resistor R ₁₅ , and the connection between the resistors R ₆ and R ₇ is connected to the resistor R 5.
₁₆ through the common terminal of switch S ₇ and resistors R ₇ and R ₈
The connecting portions with and are respectively connected to the common terminal of the switch S ₈ via the resistor R ₁₇ . The switches S ₁ , S _{2 to} S ₈ have one-side switching terminals commonly connected, while the other-side switching terminals are commonly connected and grounded.

On the other hand, the operational amplifier circuit 1b is an operational amplifier OA.
A resistor R ₂₀ is interposed between the negative input terminal-and the output terminal of the operational amplifier OA, and the positive input terminal + of the operational amplifier OA is grounded. The resistor circuit 1a and the operational amplifier circuit 1b, a connection portion which connects the one side switching terminal of the switch S _1, S ₂ ~S ₈ in common, the negative input terminal of the operational amplifier OA - are connected by connecting the. The output terminal of the operational amplifier OA is connected to the analog signal output terminal 1c. In addition, the switches S ₁ , S ₂ ...
S ₈ is adapted to be is switched operation by the 8-bit digital signal A ₁ to A _8.

Next, the operation of this D / A converter will be described. Due to the reference voltage V _R , a current I ₀ flows in the series circuit of the resistors R ₁ and R _{2 to} R ₉ . In addition, 8-bit digital signal A ₁ ~
When the switches S _{1 to} S ₈ are switched according to the value of A ₈ , the current component I _a is changed according to the digital signal and the analog signal is output from the resistance circuit 1 a. This analog signal is input to the operational amplifier OA, the value of the analog signal is obtained by the current component I _a and the resistor R _20, and digital / digital
The value V ₀ of the analog signal subjected to analog conversion (hereinafter referred to as D / A conversion) is output to the analog signal output terminal 1c.

FIG. 6 is a block diagram of a conventional semiconductor integrated circuit for converting a multi-channel digital signal into an analog signal by using a large number of such single-channel D / A converters 1 and outputting the converted analog signal. It is a figure. Digital signal 8-bit channels are different D ₁ to the semiconductor integrated circuit _3, D _2, D 3 ... resistor circuit 1a to D _n is input to each another
₁ , 1a ₂ , 1a _{3 to} 1a _n and resistor circuit 1a ₁ , 1a ₂ , 1a ₃ to
Operational amplifier 1b to which the current component output from 1a _n is input
₁ , 1b ₂ , 1b _{3 to} 1b _n are built in, and the operational amplifier 1b
₁ , 1b ₂ , 1b _{3 to} 1b _n are provided with analog signal values V ₀₁ , V ₀₂ , V _{03 to} V _{0n and} analog signal output terminals 1c ₁ , 1c ₂ , 1c _{3 to} 1c _n are provided. It is configured.
As a result, multi-channel digital signals D ₁ , D ₂ , D
₃ ... When D _n is input to the D / A conversion unit 1, the D / A conversion unit 1
Is the analog signal value V ₀₁ , V obtained by converting the digital signal of the input channel into an analog signal as described above and converting the digital signal of the input channel.
₀₂ , V _{03 to} V _0n are analog signal output terminals 1c ₁ , 1c ₂ , 1c
It will be output to _{3 to} 1c _n separately. Such a semiconductor integrated circuit performs about 10 kinds of analog control in the current color television receiver, for example, volume, color density, brightness, contrast, hue, sharpness, bass, treble, balance, volume, etc. It is used to make adjustments.

[0008]

The conventional semiconductor integrated circuit for converting a digital signal into a multi-channel analog signal as described above requires as many D / A converters as the number of channels of the analog signal. Since such a D / A conversion unit is configured by using a large number of resistance circuits composed of a large number of resistors, the D / A conversion unit requires a large pattern occupation area. Therefore, there is a problem that such a semiconductor integrated circuit must be upsized.

In view of the above problems, the present invention uses a semiconductor integrated circuit for converting a digital signal into a multi-channel analog signal by using a single digital / analog converter, and a single digital / analog converter. It is an object of the present invention to provide a semiconductor integrated circuit which converts a multi-channel analog signal into a digital signal and converts a digital signal into a multi-channel analog signal.

[0010]

A semiconductor integrated circuit according to a first aspect of the present invention provides a single digital / analog converter for converting a digital signal into an analog signal, and an analog signal value obtained by converting the digital signal into an analog signal. A large number of sample-hold circuits for sample-holding and the same number of analog signal output terminals corresponding to the sample-hold circuits are provided. A semiconductor integrated circuit according to the second invention is a single digital / analog to which a digital signal to be converted into an analog signal for successive comparison and a digital signal to be converted into a multi-channel analog signal are input. It is configured to include a conversion unit, a sample hold circuit to which the analog signal converted by the digital / analog conversion unit is input, and a large number of analog output terminals connected corresponding to the sample hold circuit.

[0011]

According to the first aspect of the invention, of the plurality of digital signals, a predetermined digital signal to be converted into an analog signal and output to the analog signal output terminal is input to the digital / analog converter. A predetermined sample-hold circuit is selected and the analog-to-analog converted analog signal is input to the selected sample-hold circuit. The sample hold circuit samples and holds the input analog signal. The held analog signal is output to the analog signal output terminal of a predetermined channel. When inputting other digital signals to the digital / analog converter,
All the sample and hold circuits are deselected so that the analog signal output to the analog signal output terminal does not change. An analog signal obtained by performing digital / analog conversion on another digital signal is input to the other predetermined sample and hold circuit selected by selecting another predetermined sample and hold circuit. The other predetermined sample hold circuit samples and holds the input analog signal. The held analog signal is output to the analog signal output terminal of another predetermined channel. As a result, a plurality of digital / analog converters are not required, the pattern occupation area of the digital / analog converters is reduced, and the semiconductor integrated circuit can be downsized.

In the second aspect of the present invention, when converting an analog signal into a digital signal, the digital signal converted into an analog signal for successive comparison is input to the digital / analog converter. The analog signal output from the digital / analog converter is sequentially compared with the analog signal to be converted into a digital signal to convert the analog signal into a digital signal. When converting a digital signal to be converted into an analog signal into a multi-channel analog signal, a predetermined digital signal among a plurality of digital signals is input to the digital / analog converter. The digital signal / analog converted analog signal is input to the selected predetermined sample hold circuit. The sample hold circuit samples and holds the input analog signal, and outputs the held analog signal to an analog signal output terminal of a predetermined channel. As a result, a plurality of digital / analog converters are not required, the pattern occupation area of the digital / analog converters can be reduced, and the semiconductor integrated circuit can be downsized.

[0013]

The present invention will be described in detail below with reference to the drawings showing the embodiments thereof. FIG. 1 is a block diagram showing the configuration of a semiconductor integrated circuit according to the present invention. For example, an 8-bit digital signal 2e to be converted into an analog signal is a resistance circuit of the D / A converter 1.
Input to 1a. The D / A converter 1 is composed of a resistance circuit 1a and an operational amplifier circuit 1b. The analog signal D / A converted by the resistance circuit 1a is input to the operational amplifier circuit 1b and the value of the analog signal obtained by the operational amplifier circuit 1b. Is input to the sample hold circuits 2d ₁ , 2d ₂ , 2d ₃ , 2d ₄ to 2d _n ,
Sampling switches _{SP 1, SP 2, SP 3} , SP 4 capacitor C ₁ via the _{~SP n, C 2, C 3} , given the C ₄ -C _n. Sample and hold circuit 2d ₁ , 2d ₂ , 2d ₃ , 2d ₄
The value of the analog signal V ₀₁ , V ₀₂ , V ₀₃ , V held by the capacitors C ₁ , C ₂ , C ₃ , C _{4 to} C _n of up to 2d _{n
04 to} V _0n are the sample hold circuits 2d ₁ , 2d ₂ , 2d ₃ ,
Corresponding to 2d _{4 to} 2d _n , the same number of analog signal output terminals 2c ₁ , 2c ₂ , 2c ₃ , and 2c ₄ to 2c _n are separately output.

Sampling switches SP ₁ , SP ₂ , SP ₃ ,
SP ₄ ... SP _n is a switch control signal output from CPU 2f
It is designed to be turned on and off separately by SC. A semiconductor integrated circuit 3 for converting a digital signal into a multi-channel analog signal is constituted by them.

Next, the operation of the semiconductor integrated circuit thus configured will be described with reference to the flowchart of FIG. 2 showing the control contents of the CPU 2f. First, the analog signal output terminals 2c ₁ and 2c
₂ , 2c ₃ , 2c _{4 to} 2c _n are analog signal values V ₀₁ , V
A circuit (not shown) controlled by ₀₂ , V ₀₃ , V _{04 to} V _0n is connected. Now, when driving the CPU 2f, the analog signal output terminal _{2c 1, 2c 2, 2c 3} , 2c 4 whether or not it is necessary to control the circuit connected to the ～2C _n, i.e., the signal output terminal 2c ₁ It is determined by the CPU 2f whether or not it is necessary to change the analog signal values V _{01 to} V _{0n of 2} to 2c _n (S1).
. Here, when the analog signal values V _{01 to} V _0n are not changed and are kept as they are, the switch control signal SC output by the CPU 2f is not output and the sampling switches SP ₁ to
Turn off all SP _n (S2). Then the value of each analog signal of the analog signal output terminal _{2c 1, 2c 2, 2c 3} , 2c 4 ~2c n is the sample and hold circuit _{2d 1, 2d 2, 2d 3} , 2d
_{4 to} 2d _n is held at the held analog signal value.

Next, for example, the analog signal output terminal 2c ₁ to control the circuit connected to the analog signal output terminal 2c ₁
In a case where it is determined that changing the value V ₀₁ of the analog signal (S1), all to turn off the sampling switch SP ₁ to SP _n by the switch control signal SC (S3). Then, an 8-bit predetermined digital signal 2e is input to the D / A converter 1 (S4). And the sampling switch SP of the sample and hold circuit 2d ₁ corresponding to the analog signal output terminal 2c ₁
Turn on only ₁ (S5) and return to step (S1). Then the value of the analog signal converted by the D / A converter section 1 is held in the capacitor C ₁ is sampled, is output to the analog signal output terminal 2c _1, the value V ₀₁ of the analog signal output terminal 2c ₁ of the analog signal changes, connected circuits are controlled in the analog signal output terminal 2c _1. At this time, the other sampling switches SP ₂ to SP _n remains turned off, the value V ₀₂ ~V _0n the other analog signal output terminal 2c ₂ ~2c _n analog signal does not change. Then for example if it is determined that changing the value V ₀₂ of the analog signal of the analog signal output terminal 2c ₂ to control the circuit connected to the analog signal output terminal 2c ₂ (S1), the switch control signal
Turn off all sampling switches SP _{1 to} SP _n by SC (S3). Then, the predetermined 8-bit digital signal 2e
Input to D / A converter 1 (S4). Then, only the sampling switch SP ₁ of the sample hold circuit 2d ₂ corresponding to the analog signal output terminal 2c ₂ is turned on (S5) and the process returns to step (S1). Thus the value of the analog signal converted by the D / A converter 1 is sampled is held in the capacitor C _2, is outputted to the analog signal output terminal 2c _2, the analog signal of the analog signal output terminal 2c ₂ value V
₀₂ changes to control the circuit connected to the analog signal output terminal 2c ₂ . At this time, another sampling switch
SP _1, SP ₃ ~SP _n remains turned off, the value V ₀₁ of the analog signals of the other analog signal output terminal _{2c 1, 2c 3 ~2c n,} V 03 ~V 0n does not change. In this way, the value of the analog signal at any analog signal output terminal can be changed in the same manner as described above. Then, the n digital signals are time-divisionally D / A converted and output as analog signal values from the respective analog signal output terminals.

Although the digital signal is 8 bits in this embodiment, it is not limited to 8 bits. Also
The conversion method of the D / A conversion unit and the circuit configuration of the sample hold circuit are not limited to those of the embodiment, as long as they have the same functions.

Further, since the sample hold circuits 2d _{1 to} 2d _n shown in the embodiment hold the value of the analog signal by the capacitors C _{1 to} C _n, it is necessary to periodically sample the data. Although the automatic scan function of the CPU automatically performs time-division sampling, the same effect can be obtained by adopting a method that does not require refreshing the analog signal value held by the sample-hold circuit. can get.

FIG. 3 is a block diagram showing the configuration of a semiconductor integrated circuit having a single D / A converter, converting a multi-channel analog signal into a digital signal and converting the digital signal into a multi-channel analog signal. is there. The analog signals input to the analog signal input terminals V _I1 , V _{I2 to} V _Im of the semiconductor integrated circuit 3 are sample hold circuits 3c ₁ and 3c _{2 to} 3c.
Input to _m separately. Sample and hold circuit 3c ₁ and 3c
The value of the analog signal output from _{2 to} 3 _cm is input to one input terminal of the comparator CP via the selector SEL that selectively selects it, and the value of the analog signal output from the comparator CP is analog / Input to digital control circuit ADC.

The control signal S _CNT output from the analog / digital control circuit ADC is applied to the successive approximation register RST. The value of the digital signal of the successive approximation register RST is input to the D / A conversion unit 1 via the input data switching unit 3f. D /
The value of the analog signal A conversion unit 1 is D / A converted is inputted to the other input terminal of the comparator CP, also is input to a sample-and-hold circuit 2d _1, 2d ₂ ~2d _n. The values of the analog signals held by the sample hold circuits 2d ₁ and 2d _{2 to} 2d _n are individually output to the analog signal output terminals V _OUT1 and V _{OUT2 to} V _OUTn . The digital signal value of the successive approximation register RST is output to the digital signal input / output terminal D _IO . The value of the digital signal input to the digital signal input / output terminal D _IO is input to the data register 3e,
The value of the digital signal of 3e is changed to D / via the input data switching unit 3f.
Input to A converter 1. The part surrounded by the broken line is the A / D conversion circuit 3b.

The semiconductor integrated circuit 3 having the above structure is
When the input data switching unit 3f is switched to select the successive approximation register RST, the digital signal converted from the successive approximation register RST into an analog signal for comparison with the analog signal to be converted is the D / A conversion unit. Input to 1.
And the analog signal an analog signal selector SEL has selected that is input to the hold circuit 3c ₁ ~3c _m have been held, and the analog signal output from D / A converter section 1 is compared by the comparator CP. The comparison result is input to the analog / digital control circuit ADC, the analog signal selected by the selector SEL is converted into a digital signal of a predetermined bit by the successive approximation operation, and the converted digital signal is stored in the successive approximation register RST. When the conversion is completed, the digital signal stored in the successive approximation register RST is output to the digital signal input / output shared terminal D _I0 . Also selector SEL
The Select analog signals of the other sample-and-hold circuit 3c ₁ ~3c _m can be converted into a digital signal, it converts the analog signals of multiple channels into digital signals.

On the other hand, when the input data switching section 3f is switched to select the data register 3e, the digital signal input from the data input / output terminal D _I0 and stored in the data register 3e is converted into the D / A conversion section. 1 is input and converted into an analog signal. The converted analog signal is input to the sample hold circuits 2d ₁ to 2d _n , and the analog signal is output to the analog signal output terminals V _{OUT1 to} V _OUTn by the same operation as the D / A conversion operation in FIG. That is, this semiconductor integrated circuit converts a multi-channel analog signal into a digital signal and converts the digital signal into a multi-channel analog signal. FIG. 5 is a block diagram showing the configuration of another embodiment of the semiconductor integrated circuit. Sample hold circuit
The analog signals held by 2d ₁ and 2d _{2 to} 2d _n are input to the selector SEL, and other configurations are similar to those of the semiconductor integrated circuit shown in FIG. The same components are designated by the same reference numerals. This semiconductor integrated circuit 3 operates similarly to the semiconductor integrated circuit 3 shown in FIG. Sample hold circuit 2d
_The analog signal output from _{1 to} 2d _n can be selected by the selector SEL, and the selected analog signal can be A / D converted by the successive approximation operation similarly to the analog signal input from the analog input terminals V _{I1 to} V _In . As a result, the error of the analog signal output from the sample hold circuits 2d _{1 to} 2d _n , that is, the error of the analog signal that changes due to the operation of the external circuit connected to the analog signal output terminals V _{OUT1 to} V _OUTn , Can be detected.

[0023]

As described above in detail, according to the first invention,
Since a single digital / analog converter can be used to convert a digital signal into a multi-channel analog signal, it is not necessary to provide the same number of digital / analog converters as in the conventional case. Therefore, the area occupied by the pattern of the digital / analog converter can be significantly reduced, and the semiconductor integrated circuit for converting a digital signal into a multi-channel analog signal can be downsized.

According to the second invention, a single digital / analog converter can be shared to convert a digital signal into a multi-channel analog signal, and the multi-channel analog signal can be converted into a digital signal by a successive approximation operation. it can.
As a result, the area occupied by the pattern of the digital / analog converter can be significantly reduced, and the semiconductor integrated circuit for converting a digital signal into a multi-channel analog signal and a multi-channel analog signal into a digital signal can be downsized. And so on.

[Brief description of drawings]

FIG. 1 is a block diagram showing a configuration of a semiconductor integrated circuit according to a first invention.

FIG. 2 is a flowchart showing the control contents of the CPU.

FIG. 3 is a block diagram showing a configuration of a semiconductor integrated circuit according to a second invention.

FIG. 4 is a block diagram showing another configuration of a semiconductor integrated circuit.

FIG. 5 is a block diagram of a digital / analog converter.

FIG. 6 is a block diagram of a conventional semiconductor integrated circuit that converts a multi-channel digital signal into a multi-channel analog signal.

[Explanation of symbols]

1 Digital / analog converter 2a Resistor circuit 2d ₁ , 2d _{2 to} 2d _n Sample and hold circuit 2c ₁ , 2c _{2 to} 2c _n Analog signal output terminal SEL selector

Claims (3)

[Claims] 1. In a semiconductor integrated circuit for converting a digital signal into a multi-channel analog signal, a single digital / analog converter to which the digital signal is to be input, and an analog signal converted by the digital / analog converter. A plurality of sample and hold circuits to be input and a plurality of analog signal output terminals corresponding to the sample and hold circuits, the sample and hold circuits are selectively operated for sampling and held by the sample and hold circuits. The semiconductor integrated circuit is configured to output the analog signal being output to a predetermined analog signal output terminal in a time division manner. 2. In a semiconductor integrated circuit for converting an analog signal into a digital signal by a successive approximation method, a digital signal converted into an analog signal for successive comparison and a digital signal to be converted into a multi-channel analog signal. A single digital / analog converter to which a digital signal is input, and a sample and hold circuit to which the analog signal converted by the digital / analog converter should be input,
A semiconductor integrated circuit comprising: a plurality of analog signal output terminals connected corresponding to the sample and hold circuit. 3. The semiconductor integrated circuit according to claim 2, wherein the analog signal output from the sample hold circuit can be compared with the analog signal output from the digital / analog converter.