JPH07143086A - Digital transmitter - Google Patents

Abstract

PURPOSE:To enable a long distance transmission without an equalizer by transmitting wide band digital signals by a coaxial cable, and demodulating and synthesizing each of the signal after each of the signals is divided into plural channels, a digital modulation is applied to each of the signals and a frequency multiplexing is performd. CONSTITUTION:A 10-bit parallel signal is inputted to a division circuit 2 via a data input terminal 1, data is divided according to the number of QAM modulators #1 to #11 and the transmission band width of each modulator and data is inputted to modulators #1 to #11. In each modulator, an error correction code is added, an up- conversion is applied to the code, which is outputted to a frequency multiplexing circuit 6. In the circuit 6, the output of the modulator is added to the code in an internal addition circuit and then a frequency multiplexing is applied to the result. Then a frequency digital modulation wave is outputted to a coaxial cable 7. modulation signal distribution circuit 8 receives this wave. The temporary synthesis of the digital data obtd. by eliminating the noise in an unused band by a band-pass filter, performing an amplification inputting the resultant wave in QAM demodulators #1 to #n, and decoding the result is executed in a synthetic circuit 12. Then the circuit 8 redivides the digital data into 10-bit parallel signals and the data is outputted from a data output terminal 13.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a digital transmission device for serially transmitting a wide band digital signal using a coaxial cable.

[0002]

2. Description of the Related Art A digital transmission device for serially transmitting a wideband digital signal through a coaxial cable is a commercial VTR.
It has been used in recent years in studio equipment such as cameras and cameras.

An example of the above-mentioned conventional digital transmission device will be described below with reference to the drawings.

FIG. 6 is a block diagram showing the configuration of a conventional digital transmission device. In FIG. 6, 15 is parallel
Data input terminal, 16 is parallel clock input terminal, 17
Is a parallel-serial converter, 18 is a PLL circuit, 19 is a transmission signal processing circuit, 20 is a transmission circuit, 21 is a coaxial cable, 22
Is an equalizer, 23 is a received signal processing circuit, 24 is a serial-parallel converter, 25 is a PLL circuit, 26 is a parallel data output terminal, and 27 is a parallel clock output terminal.

The operation of the digital transmission device configured as described above will be described below.

The input signal to the parallel data input terminal 15 is a 270 Mbps NTSC component signal. That is, the parallel data input terminal 15 has 10 Mbps of 27 Mbps.
Bit parallel data is input. Entered 10
The bit parallel data is latched in the parallel / serial converter 17 by the clock input from the parallel clock input terminal 16. In addition, the PLL circuit 18
Then, the phase locked to the input parallel clock
A serial clock having a frequency of 10 times is generated and input to the parallel / serial converter 17.

The data converted into the serial data by the parallel-serial converter 17 is sent out by the transmission signal processing circuit 19
To the NRZI signal for scrambling and conversion from the NRZ signal to the NRZI signal. This scrambling process is not for encryption, but for preventing 0 or 1 from continuing on the transmission path. Transmission signal processing circuit
The output of 19 is input to the sending circuit 20, amplified by the buffer amplifier, and then output to the coaxial cable 21.

The maximum length of the coaxial cable 21 is about 300 m. At this time, in the vicinity of 135 MHz, which is the band required for 270 Mbps serial transmission, about 30 dB of attenuation is received, so it is necessary to compensate for the high frequency band. Further, since the group delay in the low frequency range is not flat in the coaxial cable, it is necessary to compensate for this.
For the above two reasons, the equalizer 22 is provided in the input stage of the receiving section.

The output of the equalizer 22 is input to a PLL circuit 25 to regenerate the serial clock, and at the same time, to regenerate the serial clock.
Divide by 10 to generate a parallel clock,
Output to clock output terminal 27. In the reception signal processing circuit 23, the output of the equalizer 22 is discriminated as the original data by the serial clock reproduced by the PLL circuit 25, and then the NRZI signal is converted into the NRZ signal and the descramble processing is performed, and then the data is outputted. The serial-parallel converter 24 converts the input serial data into the original 10-bit parallel data using the serial clock and parallel clock reproduced by the PLL circuit 25, and outputs the parallel data output terminal 26. Output to (for example, RonWard: “Avoiding t
he Pitfalls in Serial Digital Signal Distributio
n ”, 133rd SMPTE Technical Conference, preprint N
o.133-45, Oct. , 1991).

[0010]

However, with the above-described structure, it is difficult to realize a wide-band equalizer that compensates for the attenuation of the coaxial cable in the high frequency range and the deviation of the group delay in the low frequency range. However, there is a problem that the transmission distance is limited by the compensation capacity of the equalizer rather than the S / N limit of the transmission digital signal.

In view of the above problems, it is an object of the present invention to provide a digital transmission device for transmitting a wide band digital signal through a coaxial cable without using an equalizer.

[0012]

In order to solve the above problems and achieve the object, the present invention uniformly divides serial data into a plurality of parallel data, or hierarchically encodes them in order of data priority. It is characterized in that each of the parallel data is subjected to quadrature amplitude modulation or vestigial sideband amplitude modulation in an independent channel and then transmitted in a coaxial cable by frequency multiplexing.

[0013]

According to the present invention, since the wideband digital signal is divided into a plurality of channels, multivalued digital modulation with high transmission efficiency is performed on each of the channels, and then frequency multiplexing is performed, the bandwidth of each channel is reduced. Since the band can be narrowed and the amplitude / group delay deviation in each channel becomes small, an equalizer is not required.

[0014]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A digital transmission apparatus according to each embodiment of the present invention will be described below with reference to the drawings. 1 is a block diagram showing the configuration of a digital transmission apparatus according to the first embodiment of the present invention, and FIG. 4 is a quadrature amplitude modulator of FIG.
A block diagram showing the configuration of (hereinafter referred to as QAM modulator),
FIG. 5 is a block diagram showing the configuration of the quadrature amplitude demodulator (hereinafter referred to as QAM demodulator) of FIG.

In FIG. 1, 1 is a data input terminal, 2 is a dividing circuit, 3 and 4 and 5 are QAM modulators # 1, # 2, to #.
n and 6 are frequency multiplexing circuits, 7 is a coaxial cable, 8 is a modulation signal distribution circuit, and 9, 10 and 11 are QAM demodulators # 1, # 2, ...
#N and 12 are combining circuits, and 13 is a data output terminal.

In the QAM modulator 3 of FIG. 4, 31
Is a modulation signal processing circuit, 32 is a quadrature modulator, 33 is an up converter, and the other QAM modulators 4 and 5 have the same configuration. In the QAM demodulator 9 of FIG. 5, 91 is a tuner, 92 is a quadrature detector, 93 is a demodulation signal processing circuit, and the other QAM demodulators 10 and 11 have the same configuration.

The operation of the digital transmission device configured as described above will be described below with reference to FIGS. 1, 4 and 5.

The input digital data to the data input terminal 1 is an 270 Mbps NTSC component signal as in the conventional example. Since a 10 Mbps parallel signal of 27 Mbps is input to the data input terminal 1, the QAM modulator #
When the number of 1 to #n (3 to 5) is 10, the dividing circuit 2 need only pass the input signal as it is. When the number of QAM modulators is not 10, the dividing circuit 2 divides the input data into data according to the number of QAM modulators and the transmission bandwidth of each QAM modulator. In this embodiment, the number of QAM modulators is 10, the transmission bandwidth of each modulator is 6 MHz, and a 64QAM modulator is used.

Each 64QAM modulator may transmit 27 Mbps data. In actual transmission, an error correction code is added. If this is used as a Reed-Solomon correction code, usually about 10% of the total data amount is allocated to the correction code, so the total data rate is 30 Mbps. Since 64QAM is a modulation system of 6 bits / symbol, the transmission efficiency is 6 times.
Therefore, in order to transmit 30Mbps data, 5.0M
Requires a bandwidth of Hz. Since the transmission bandwidth is 6MHz,
The roll-off rate of the roll-off filter may be 0.2 or less.

As the carrier frequencies of the ten 64QAM modulators, for example, in accordance with the channel plan of the CATV in the United States, the low-frequency channels of the coaxial cable 7 with low attenuation are preferentially used. , 69,
You can choose 75, 85, 93, 99, 105, 111, 117MHz.

Next, the 64QAM modulator will be described with reference to FIG. The 27 Mbps data input from the division circuit 2 is
It is input to the modulation signal processing circuit 31. Modulation signal processing circuit 31
Then, an error correction code is added, 64QAM mapping is performed, roll-off filter processing is performed, DA conversion is performed, and then output to the quadrature modulator 32. The quadrature modulator 32 modulates the input two-axis signals of I and Q using two carrier waves having phases different from each other by 90 degrees, adds them, and outputs them. Here, the carrier wave used for modulation has a constant intermediate frequency. The up-converter 33 in the next stage multiplies the input modulated wave at the intermediate frequency and the internal local oscillator output by an internal multiplier to up-convert to each of the above 10 types of frequencies.

Returning to FIG. 1, the frequency multiplexing circuit 6 frequency-multiplexes the outputs of the ten 64QAM modulators by the addition circuit and outputs the multiplexed signals to the coaxial cable 7. Note that the adder circuit may be, for example, a resistor adder in consideration of impedance matching. When using the above-mentioned carriers of 10 frequencies, each has a bandwidth of 6 MHz, so the bandwidth after multiplexing is 66 MHz from 54 to 120 MHz.
It becomes z.

The frequency-multiplexed digital modulated wave that has passed through the coaxial cable 7 of 0 to several hundred meters is input to the modulation signal distribution circuit 8. In the modulation signal distribution circuit 8, after removing unnecessary band noise through a bandpass filter that passes 54 to 120MHz, the signal is amplified by an amplifier with a good noise figure and equally distributed to 10 64QAM demodulators # 1 to #n
Enter in (9-11).

Next, the 64QAM demodulator 9 will be described with reference to FIG. The frequency-multiplexed signal input from the modulation signal distribution circuit 8 is input to the tuner 91. Tuner 91 here
Uses a tuner for receiving CATV in the United States.
The tuner 91 selects one channel from 10 channels and frequency-converts it into the intermediate frequency band 41 to 47 MHz. In the quadrature detector 92, the 90 MHz generated by the internal 44 MHz local oscillator was used.
The original I and Q signals are obtained by multiplying each of the two carrier waves having different degrees of phase and the modulated signal. In the demodulation signal processing circuit 93, the input I and Q signals are AD-converted, roll-off filter processing on the receiving side is performed, and 64 code points are identified and inverse mapping processing to the original 6-bit data is performed. Then, error correction processing is performed and the result is output to the synthesis circuit 12. In addition,
The demodulation signal processing circuit 93 includes a carrier recovery circuit that locks the frequency and phase of the local oscillator of the quadrature detector 92 to the carrier of the modulated wave in the intermediate frequency band, and a clock recovery circuit that recovers the symbol clock.

The digital data of 27 Mbps for each of the 10 channels decoded by the ten 64 QAM demodulators are combined by the synthesizing circuit 12
Is output as a 10-bit parallel signal to the data output terminal 13. The synthesizing circuit 12 serves as a pair of the dividing circuit 2. If the number of 64QAM demodulators is not 10, the synthesizing circuit 12 once synthesizes and then divides again into 10-bit parallel signals.

In order to transmit a baseband 270 Mbps digital signal, it is necessary to flatten the amplitude and group delay characteristics within a band of at least 0 to 135 MHz. According to the present embodiment, as described above, 10 channels are used. Since it suffices that the amplitude and group delay characteristics are flat within each band of 6 MHz, it is not necessary to provide an equalizer. Also, the bandwidth used in this embodiment is 6 MHz.
The 64QAM demodulator is available at a low cost with the spread of 64QAM transmission in CATV. Therefore, such multiple transmission of wideband digital signals can be easily realized.

In this embodiment, the QAM modulator / demodulator is 64Q.
Although AM is used, other QAM methods such as 16QAM may be used. However, in this case, since the amount of data that can be transmitted at 6 MHz changes, it is necessary to change the number of QAM modulators / demodulators. Further, the total transmission rate is not limited to 270 Mbps, and the channel plan of the frequency multiplexed signal at RF is not limited to the example of this embodiment.

In the present embodiment, the bandwidth of one channel is 6 MHz, but it is 27 MHz and the transmission method is QPS.
It may be K. Bandwidth 27 MHz using satellite lines 40.
This is because a QPSK demodulator that transmits 96 Mbps may become widespread and supplied at a low cost. In this case, assuming that the coding rate of the error correction code is 3/4, the transmission data amount per channel is 30.72 Mbps, so that 270 Mbps transmission requires 9 channels. The total required bandwidth is 27MHz x 9 = 243MHz. Although it is larger than the required bandwidth in the baseband (135 MHz), since the amplitude and group delay deviation in each channel are small, transmission deterioration is small even without an equalizer.

The amount of attenuation [dB / m] per unit length of the coaxial cable is proportional to the square root of the frequency. That is,
When the frequency is quadrupled, the amount of attenuation is doubled. Therefore, in a constant bandwidth, the high frequency band has a smaller amplitude deviation than the low frequency band. By utilizing this characteristic, the transmission bandwidth per channel can be reduced in the low frequency band and increased in the high frequency band to reduce the transmission deterioration within the channel.

Further, in consideration of the attenuation in the coaxial cable, the transmission power is increased in the higher frequency channel. As a result, the reception limit distance of the high-frequency channel is extended, and the length of the cable that can be transmitted is increased. At this time, considering the case where the coaxial cable length becomes 0 m, the input AG of the QAM demodulator is considered.
Do not raise the transmission power beyond the range that can be absorbed by the C circuit.

A digital transmission apparatus according to an embodiment of the second invention will be described below with reference to the drawings. Figure 2
FIG. 6 is a block diagram showing a configuration of a digital transmission device according to an embodiment of the second invention of the present invention. The difference from FIG. 1 is that the QAM modulators # 1, # 2, to #n (3 to 5) are vestigial sideband amplitude modulators (VSB-AM modulators # 1, # 2, to #n) 3.
0, 40, 50, QAM demodulators # 1, # 2, ... #n (9-11) are vestigial sideband amplitude demodulators (VSB-AM demodulators # 1, # 2, ...
#N) It has been changed to 90, 100, 110.

As an input signal, as in the first invention, 270M
Consider the case of transmitting bps data in 10-bit parallel at 27 Mbps. Eight-valued VSB-AM transmission has a transmission efficiency of 3 bits / symbol, but since the bandwidth is effectively used by the VSB-AM system, the transmission efficiency is equivalently 6 bits / symbol. Therefore, at least 30 MHz of digital data obtained by adding an error correction code to 27 Mbps data requires a transmission bandwidth of at least 5 MHz. If the roll-off rate is 20% or less, the bandwidth of one channel is 6MH
It is less than or equal to z. Therefore, instead of the 64QAM modulator / demodulator, an 8-value VSB-AM modulator / demodulator can be used to transmit 270 Mbps data as in the first invention.

As described above, according to this embodiment, since transmission is performed by dividing into a plurality of channels, in addition to the effect common to the first invention that an equalizer is not required in each channel, VSB is also provided. -The advantage of using an AM modulator / demodulator is that since orthogonal modulator / demodulator is not used, there is no deterioration in the bit error rate due to crosstalk between orthogonal I and Q axes that occurs due to distortion of the amplitude and group delay characteristics of the transmission path. Is.

Similarly to the first aspect of the invention, the vestigial sideband amplitude modulator can be implemented with a transmission bandwidth of 6 MHz or 27 MHz.

Further, similarly to the first invention, when the transmission bandwidth of the low frequency band is made smaller than the transmission bandwidth of the high frequency channel, and the carrier power is increased for the higher frequency channel, it is used together. The transmission distance can be further extended.

A digital transmission apparatus according to an embodiment of the third invention will be described below with reference to the drawings. Figure 3
FIG. 6 is a block diagram showing a configuration of a digital transmission device in an embodiment of the third invention of the present invention. The difference from FIG. 1 is that the division circuit 2 is changed to a hierarchical encoder 200 and the combining circuit 12 is changed to a hierarchical decoder 120. In addition, the N modulators and demodulators arranged in parallel are QAM
Either the system or the VSB-AM system may be used. Therefore, the digital modulators # 1, # 2, to #n (310, 410, 510) and the digital demodulators # 1, # 2, to #n (910, 101, 111)
I am trying.

The digitized video signal input to the hierarchical encoder 200 is divided into a signal that is important for restoring a video such as a sync signal and a low frequency band of a luminance signal, and a signal that is not so important. As a method of dividing the frequency component of the luminance signal, D
There is CT (discrete cosine transform) and the like.

The signals divided into N are arranged in lower frequency channels as the more important signals. This is because the lower the band, the less the attenuation in the coaxial cable, and the longer the distance can be transmitted.

The data of each channel digitally modulated and demodulated using the N channels is a hierarchical decoder.
Entered in 120. The hierarchical decoder 120 performs a process reverse to that of the hierarchical encoder 200 to restore the original digitized video signal and output it to the data output terminal 13.

As described above, according to this embodiment, since the data is divided into a plurality of channels for transmission, an equalizer is not required in each channel, which is common to the first aspect of the invention, and in addition to the digital effect. Since the encoded video signals are classified in the order of importance and assigned to the low-frequency channels in descending order of priority, there is an advantage that fatal deterioration of image quality is unlikely to occur even when transmitting over a long distance.

As in the first invention, the digital modulator can be implemented with a transmission bandwidth of 6 MHz or 27 MHz.

Further, similarly to the first invention, when the transmission bandwidth of the low frequency band is made smaller than the transmission bandwidth of the high frequency channel, and the carrier power is increased for the higher frequency channel, it is used together. The transmission distance can be further extended.

[0043]

As described above, in the digital transmission apparatus of the present invention, the wide band digital signal is divided into a plurality of channels, the QAM or VSB-AM digital modulation is applied to each of the channels, and the signals are frequency-multiplexed before being transmitted through the coaxial cable. Is transmitted, and the signals of the respective channels are demodulated and then combined, whereby a long distance can be transmitted without using an equalizer.

Further, instead of the wide band digital signal dividing circuit and the synthesizing circuit, a hierarchical encoder and a hierarchical decoder are used to classify the video signals in the order of importance, and the signals in descending order of priority are arranged in order of low frequency. By allocating to channels, the transmission distance can be further extended.

[Brief description of drawings]

FIG. 1 is a block diagram showing a configuration of a digital transmission device according to an embodiment of the first invention of the present invention.

FIG. 2 is a block diagram showing a configuration of a digital transmission device according to an embodiment of the second invention of the present invention.

FIG. 3 is a block diagram showing a configuration of a digital transmission device according to an embodiment of the third invention of the present invention.

FIG. 4 is a block diagram showing a configuration of the QAM modulator of FIG.

5 is a block diagram showing a configuration of the QAM demodulator of FIG.

FIG. 6 is a block diagram showing a configuration of a conventional digital transmission device.

[Explanation of symbols]

1 ... Digital signal data input terminal, 2 ... Dividing circuit, 3, 4, 5 ... QAM modulator # 1, # 2, to #n,
6 ... Frequency multiplexing circuit, 7 ... Coaxial cable, 8 ... Modulation signal distribution circuit, 9, 10, 11 ... QAM demodulator # 1, # 2,
... #n, 12 ... Combining circuit, 13 ... Digital signal data output terminal, 30, 40, 50 ... VSB-AM modulator # 1,
# 2, #n, 90, 100, 110 ... VSB-AM demodulator #
1, # 2, to #n, 120 ... Hierarchical decoder, 200 ... Hierarchical encoder, 310, 410, 510 ... Digital modulator # 1, # 2,
~ #N, 910, 101, 111 ... Digital demodulators # 1, # 2,
~ #N.

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Tad Bowser 1006 Kadoma, Kadoma City, Osaka Prefecture Matsushita Electric Industrial Co., Ltd. (72) Daisuke Hayashi, 1006 Kadoma, Kadoma City, Osaka Prefecture Matsushita Electric Industrial Co., Ltd. 72) Inventor Hisaya Kato 1006 Kadoma, Kadoma City, Osaka Prefecture Matsushita Electric Industrial Co., Ltd.

Claims (12)

[Claims] 1. A division circuit for dividing an input digital signal into N pieces of parallel data, and N pieces of quadrature amplitude-modulated each digital signal divided by the division circuit so that transmission bands do not overlap each other. A quadrature amplitude modulator,
A transmission unit composed of a frequency multiplexing circuit for synthesizing the outputs of the N quadrature amplitude modulators; a modulation signal distribution circuit for distributing a reception signal to the N signals after transmitting with a coaxial cable;
A receiving unit including N quadrature amplitude demodulators and a synthesizing circuit for synthesizing the parallel data outputs of the N quadrature amplitude demodulators to restore the original digital signal. Digital transmission equipment. 2. The quadrature amplitude modulator has a transmission bandwidth of 6
2. The digital transmission device according to claim 1, wherein the digital transmission device has a frequency of MHz or 27 MHz. 3. The quadrature amplitude modulator narrows the transmission bandwidth when the carrier frequency is in a low band, and widens the transmission bandwidth when the carrier frequency is in a high band. 1. The digital transmission device according to 1. 4. The digital transmission device according to claim 1, wherein the quadrature amplitude modulator sets the carrier power higher as the carrier frequency is higher. 5. A division circuit for dividing an input digital signal into N pieces of parallel data, and each of the digital signals divided by the division circuit is subjected to vestigial sideband amplitude modulation so that transmission bands do not overlap each other. A transmission unit including N vestigial sideband amplitude modulators and a frequency multiplexing circuit that synthesizes the outputs of the N vestigial sideband amplitude modulators, and a received signal after transmitting with a coaxial cable. An original digital signal is restored by synthesizing N modulation signal distribution circuits, N vestigial sideband amplitude demodulators, and parallel data outputs of the N vestigial sideband amplitude demodulators. A digital transmission device, comprising: a receiving unit composed of a combining circuit. 6. The vestigial sideband amplitude modulator has a transmission bandwidth of 6 MHz or 27 MHz.
The described digital transmission device. 7. The vestigial sideband amplitude modulator is characterized by narrowing the transmission bandwidth when the carrier frequency is low and widening the transmission bandwidth when the carrier frequency is high. The digital transmission device according to claim 5. 8. The digital transmission device according to claim 5, wherein the vestigial sideband amplitude modulator sets the carrier power higher as the carrier frequency is higher. 9. A hierarchical encoder for dividing an input digital signal into N pieces of parallel data in order of data priority, and transmission bands of the digital signals divided by the hierarchical encoder do not overlap. In addition, a transmitting unit including N digital modulators for digitally modulating the received signal and a frequency multiplexing circuit for synthesizing the outputs of the N digital modulators, and a received signal after being transmitted by a coaxial cable.
It is composed of a modulated signal distribution circuit for distributing the data into N, a N digital demodulator, and a hierarchical decoder for synthesizing the parallel data outputs of the N digital demodulators to restore the original digital signal. A digital transmission device comprising a receiver. 10. The digital transmission device according to claim 9, wherein the digital modulator has a transmission bandwidth of 6 MHz or 27 MHz. 11. The digital modulator according to claim 9, wherein the carrier having a low carrier frequency has a narrow transmission bandwidth, and the carrier having a high carrier frequency has a wide transmission bandwidth. The described digital transmission device. 12. The digital transmission device according to claim 9, wherein the digital modulator sets the carrier power higher as the carrier frequency is higher.