JPH07143025A - Spread spectrum communication equipment - Google Patents

Abstract

PURPOSE:To perform data demodulation satisfactorily without deteriorating the performance of a correlator even in an environment where an interference wave exists in an SS receiver. CONSTITUTION:An input signal is supplied to multipliers 1, 2 via an AGC circuit 15 and orthogonally detected, and respective outputs are subjected to A/D- conversion by means of A/D converters 7, 8 via LPFs 5, 6. A/D conversion output is applied to the correlators 9, 10 and a control circuit 14 and resultant correlation output from an adder 13 is inputted to the control circuit 14. The control circuit 14 detects the noise (interference wave) based on the resultant correlation output and A/D conversion output, and controls the gain of the AGC circuit corresponding to detected output.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION The present invention relates to spread spectrum (S
S) Improvement of communication device.

[0002]

2. Description of the Related Art In spread spectrum (SS) communication, there are several methods due to the nature of the spread technology, and one of them is the well-known direct spread (DS) method. This is to restore the information signal by modulating the carrier wave with a digital code sequence having a bit rate much larger than the information signal bandwidth and transmitting the carrier wave, and correlating the digital code sequence at the receiver. The digital code sequence used here is generally pseudo noise (P
N) It is called a code, and a code having excellent autocorrelation and cross-correlation is suitable. As a typical example, the longest series (m
Sequence) code. A sliding correlator, a matched filter, or the like is generally often used as the method of correlating the PN code. In the past, the correlator handled the signal as analog processing (despreading), but in recent years, due to the development of digital signal processing technology, it has become possible to digitally configure and process the correlator. It was

FIG. 9 shows an example of a conventional SS receiver using a digital matched filter. In the figure,
1, 2 are multipliers, 3 are local oscillators, 4 are π / 2 phase shifters,
5 and 6 are low-pass filters (LPF), 7 and 8 are A / D
Converters, 9 and 10 are correlators, 11 and 12 are squarers, 13
Is an adder. First, the received input signal is distributed, and the carrier frequency from the local oscillator 3 is used to perform frequency conversion via the multipliers 1 and 2 into a baseband band of orthogonal components of the COS component and the SIN component.

Next, the converted signals are respectively passed by the low-pass filters 5 and 6 to pass only a necessary signal band, and
The analog signals are converted into digital signals by the / D converters 7 and 8. Then, each bit of the A / D converter output (here, N bits) is calculated by each accumulator 9a of the correlators 9 and 10 with the reference PN code, and is passed through the adder 9b. To obtain the correlation value. afterwards,
Squared by the squaring circuits 11 and 12, COS and SIN
The components are combined by the adder 13 and output to the data demodulator.

Thus, it can be seen that if the sampling frequency and the number of quantization bits of the A / D converter are increased endlessly, the analog signal will be approximated. However, the circuit scale or the operating frequency in the current practical use is taken into consideration. Then there is a limit. Now, assuming that the dynamic range of the A / D converter input voltage corresponding to the number of quantization bits is 0 (V) to E1 (V), the correlation value obtained by the correlator can be the highest value. . That is, the A / D converter input is 0
If the dynamic range of the A / D converter such as (V) to E2 (V) (where E1> E2) is not used to the maximum, a decrease in correlation value (equivalent to a decrease in process gain) may be caused. As a result, the data demodulation performance is deteriorated in the data demodulation unit. Therefore, an AGC circuit is generally installed in the receiver to stabilize the input level, and in FIG. 9 as well, the AGC circuit is optimally controlled to match the dynamic range before separating into quadrature components.

Another conventional SS receiver is shown in FIGS.
Shown in. In FIG. 11, 20 and 21 are multipliers, 22 is a local oscillator, 23 is a PN code generator, and 24 is an integrator. FIG. 11 is called a mixer system, which is an analog demodulation system in which the received SS signal is subjected to carrier demodulation and PN demodulation, and then integration dump switching is performed so that one cycle of the PN code is integrated by the integrator.

FIG. 12 shows a digital demodulation system in which the received SS signal is frequency-converted into a base band, A / D-converted, and demodulated by a digital correlator. In addition,
In FIG. 12, 25 is an AGC circuit, 26 is a multiplier, 2
7 is a local oscillator, 28 is an LPF, 29 is an A / D converter,
Reference numeral 30 is a digital correlator, and 31 is a PN code generator. Note that the carrier and PN demodulation are synchronized with each other. That is, although it is coherent, there is no problem in the asynchronous method with a known method that is generally known.

Further, FIG. 14 shows an SS receiver which adopts an asynchronous demodulation system of an SS-BPSK signal using a digital correlator. In the figure, 32 and 33 are multipliers, 34 and
35 is an A / D converter, 36 and 37 are digital correlators,
38 is an adder.

FIG. 16 shows a basic circuit configuration of the digital correlator in the figure. The correlator of FIG. 16 operates as follows. First, if the N-bit reference data REF is N
The bit register R is serially loaded in synchronization with the clock RCLK. Next, the information data DATA is N
The bit register S is serially loaded in synchronization with the clock SCLK. Then, the match / mismatch of the contents of the respective registers is detected by the Ex-NOR gate,
The total amount of coincidence is obtained by the adder ADDER.

The asynchronous demodulation operation of the SS-BPSK signal according to FIG. 14 will be described below. The SS-BPSK signal is
It can be expressed as in equation (1).

Γ (t) = {d (t) + pn (t)} COSω ₀ t (1) d (t): Digital data corresponding to “1” or “0” pn (t): Pseudo noise code +: Ex-OR COS ω ₀ t: Carrier signal

In FIG. 14, as shown in FIG. 15, SS-B
C is obtained by multiplying the modulation carrier frequencies of the PSK signal and the SS-BPSK signal by COSωt and SINωt.
The data demodulation is performed by obtaining the correlation value of the OS component and the SIN component, performing A / D conversion, and then performing baseband processing. That is, the correlation value of the digital data of the COS component and the SIN component is obtained by, for example, a digital correlator in which reference data equal to the result of exclusive OR of the data "1" at the time of transmission and the PN code is set. Then, data demodulation is performed based on this correlator.

[0012]

First, in the conventional example shown in FIG. 9, the input level is stabilized by the AGC circuit as described above, and there is no problem in an ideal environment. The environment used for is different. Since the frequency which is a shared resource is limited, interference and collisions such as coexistence with other transceivers or communication between a plurality of transceivers are common. In such a case, the received signal is equal to the superposition of the desired signal and the interference wave (interference wave). As an example, FIG. 10A shows a conceptual diagram of a signal waveform of one A / D converter input of FIG. 9 when the interference wave is a narrow band signal. In the figure, (b) is an interference wave superimposed on (a), (c)
Is a PN code similarly modulated by the information of the desired signal. However, this is an ideal state in which the transfer function of a filter or the like is not taken into consideration.

In the prior art of FIG. 9, the AGC circuit described above stabilizes the input of the A / D converter to the dynamic range in quantization. Here, if the upper and lower limits of the input voltage of the A / D converter are controlled to be 0 to E1 (V), it means that the peak-to-peak value of FIG. 10A becomes equal to the value. . Therefore, as the interference wave becomes stronger, the amplitude value of the desired signal at the input of the A / D converter relatively decreases. This apparently does not effectively use the dynamic range in the quantization for the desired signal, and as a result, A
The GC circuit causes a decrease in correlation value, which causes deterioration of data demodulation performance.

A first object of the present invention is to provide a spread spectrum which has a good data demodulation performance without degrading the performance of a correlator even in an environment where interference waves exist and which can be realized by a simple configuration. To provide a receiver.
Further, the conventional SS receiver of FIG. 12 has the following problems. Generally, when a digital SS demodulation method is used, the signal wave is appropriately input to the A / D converter by AGC so as to have a full range. However, ideally, if only the signal wave is input to the A / D converter, there is no problem, but since noise also exists in the environment of actual use, this noise will be superimposed on the desired wave. As a result, the AGC output apparently reduces the average power of the desired wave due to the power of noise, and the dynamic range of the A / D converter cannot be fully used (FIG. 13). Therefore, the performance is inevitably deteriorated.

A second object of the present invention is to solve the drawbacks of the prior art and to provide a spread spectrum communication device capable of excellent communication even in a noisy environment. Furthermore, FIG.
4 SS receiver also has the following problems. That is, the received S
Carrier phase of S-BPSK signal and COS ωt on receiving side
Since the phase relationship between SINωt and SINωt is indeterminate, COSωt and SINωt for the received SS-BPSK signal are
In the range in which the phase shift of t is delayed by π / 2 to π [radian], it apparently behaves as COSωt −> SINωt to −COSωt SINωt −> −COSωt to −SINωt. As a result, bit inversion occurs in the demodulated data, and originally "1" data becomes "0".
The data will change.

A third object of the present invention is to provide spread spectrum communication in which demodulated data does not cause bit inversion.

[0017]

In order to achieve the first object, the SS communication device according to the first invention A / D-converts a reception signal input via an AGC circuit to a digital correlator. In a spread spectrum communication device provided with a spread spectrum receiver for demodulating data based on a correlation output from the digital correlator, noise detecting means for detecting noise in the received signal, and detection by the noise detecting means And a gain control means for controlling the gain of the AGC circuit according to the output.

A second aspect of the present invention is the gist of the first aspect of the present invention, wherein the noise detecting means has a gate circuit that turns on and off based on the A / D-converted received signal and a correlation output.

Further, in a third aspect based on the first aspect, the control means comprises a D / A conversion circuit for D / A converting the correlation output, and an integration circuit for integrating the conversion output of the D / A conversion circuit. And a voltage-current conversion circuit for converting an output integrated voltage of the integration circuit into a current.

In a fourth aspect based on the third aspect, a comparison circuit is provided between the integration circuit and the voltage-current conversion circuit for comparing an output integration voltage of the integration circuit with a reference voltage. Is the gist.

In order to achieve the second object, the fifth invention is the first invention, wherein the control means controls the AGC so that the amplitude of the input of the A / D conversion circuit reaches its full range. The point is to control the gain of the circuit.

In a sixth aspect based on the fifth aspect, the noise detecting means comprises a comparator for comparing the correlation output with a reference value, and the control means operates in response to the output of the comparator. Is the gist.

In order to achieve the third object, the SS communication apparatus of the seventh invention is an encoding means for differentially encoding transmission data, and a modulation for performing spread spectrum DPSK modulation on the differentially encoded transmission data. A spread spectrum transmitter including means, a detecting means for quadrature detecting the received spread spectrum DPSK modulated signal, an A / D converting means for A / D converting an output signal of the detecting means, and the A / D A spread spectrum receiver including a digital correlator that receives the converted output of the converting means and obtains a corresponding correlated output, and demodulation means that differentially decodes and demodulates based on the correlated output Is the gist.

In an eighth aspect based on the seventh aspect, the spread spectrum receiver compares the two correlation outputs corresponding to the two orthogonally detected detection outputs with each other, and based on the comparison result. 2 corresponding to the above correlation output
And a selection means for selecting one of the two demodulation outputs.

In a ninth aspect based on the seventh aspect, the encoding means includes a differential encoder including a delay element and an exclusive OR circuit, and the demodulating means includes a delay element and an exclusive logic circuit. The gist is to include a differential decoding circuit including a sum circuit.

[0026]

In the SS receiver according to the first aspect of the present invention, when noise (interference wave) exists in the input signal, the gain of the AGC circuit is controlled according to the detected signal and the correlator input level is changed. In the second invention, in the SS receiver of the first invention, the gate circuit is turned on / off based on the A / D converted reception signal and the correlation output to detect noise (interference wave).
In a third invention, in the first invention, the correlation output is D / A.
The gain is converted and integrated, and the integrated voltage is converted into a current to control the gain of the AGC circuit. In the fourth invention, the third
In the invention, the integrated voltage is compared with a reference voltage, and the output voltage according to the comparison result is converted into a current. A fifth aspect of the invention is the first aspect of the invention, in which the gain of the AGC circuit is controlled so that the input amplitude of the A / D conversion circuit is in the full range. In a sixth aspect based on the fifth aspect, the correlation output is compared with a reference value to perform noise detection, and the output is used to control the gain of the AGC circuit. In a seventh aspect of the invention, the SS transmitter differentially encodes the transmission data and then SS-DPSK-modulates the data for transmission.
The SS receiver quadrature-detects the SS-DPSK modulated signal,
Each detected output is A / D converted, and then correlated by a digital correlator, and differentially decoded and demodulated based on the correlated output. In the eighth invention, in the seventh invention, two correlation outputs are compared with each other, and one of the two demodulation outputs is selected based on the comparison result. In a ninth aspect based on the seventh aspect, differential encoding and differential decoding are performed using a delay element and an exclusive OR circuit.

[0027]

EXAMPLES Examples of the present invention will be described below. FIG. 1 is an embodiment of an SS receiver in an SS communication device according to the first invention, and the same reference numerals as those in FIG. 9 represent the same or similar circuits. In this embodiment, especially a control circuit 14 and an AGC circuit 15 are provided. The synthesized correlation output (correlation value) is input to the control circuit 14, and the gain of the AGC circuit 15 is controlled by the output signal obtained based on the outputs from the A / D converters 7 and 8. To do. Now, the gain Ga of the AGC circuit 14
The characteristic of in has a negative coefficient (inversely proportional to the increase in current) with respect to the control current I (gain control signal) as shown in FIG. By the way, there are those having a positive coefficient and those in which the control signal corresponds to voltage, but for the sake of description as an example here, they are not separately limited to such a form.

In the following description, the logic of the signal relating to the above coefficient will be described, but it is clear that the difference in logic occurs due to the change of the coefficient and the like. An example of the configuration of the control circuit is shown in FIG. The control circuit is an OR circuit 14
a, gate circuit 14b, D / A converter 14c, integrator 1
4d and a VI converter 14e. The operating characteristics of the VI converter 14e are shown in FIG. 3 (b). AGC in advance
The circuit 15 optimally stabilizes the A / D converter input so that the dynamic range becomes the full range as described in the prior art. At this time, the overflow bit of the A / D converter output is in the active state (for example, if the logic level when the overflow does not occur is Low, H
Set to high). First, the control circuit 14 checks the current state of the A / D converter input level by the gate circuit 14b. Specifically, the gate circuit 14b is used for each A / D
The overflow bit of the converter output is set to the logical sum circuit 14a.
The D / A converter 14c is driven and controlled by the signal obtained by the above and the correlation value.

There are four methods of driving the D / A converter 14c. When the output of the OR circuit is "Low" and the correlation value is less than or equal to a desired value, the gate circuit 14b does not drive the D / A converter 14c (does not accept the input signal) and the integration is performed. V-I conversion circuit 1 via the device 14d
A voltage that maximizes the gain of the AGC circuit 15 is applied to 4e. When the output of the OR circuit is "Low" and the correlation value is equal to or larger than a desired value, the D / A conversion circuit 14c outputs an analog value according to the correlation value. When the output of the OR circuit is "High" and the correlation value is equal to or larger than a desired value, the current output of the D / A conversion circuit 14c is held. When the output of the OR circuit is "High" and the correlation value is less than or equal to a desired value, the D / A value is changed according to the correlation value.
The conversion circuit 14c outputs an analog value.

As is clear from the above description, the OR circuit 14a and the gate circuit 14b function as means for detecting noise (interference wave). And via the integrator VI
It is input to the conversion circuit and the control current of the AGC circuit 15 is obtained.
In this case, even if the maximum number of quantization bits of the A / D conversion circuits 7 and 8 is used, it is determined that the interference wave exists in the state where the correlation value is low, and the gain of the AGC circuit 15 is reduced. It is a thing. Even if the maximum number of quantization bits of the A / D conversion circuits 7 and 8 cannot be used, the gate circuit 19b functions without any problem as long as the correlation value used for data demodulation is satisfactory.

Further, even if a correlation value which hinders data demodulation from such a state, it is judged that the reception state has deteriorated and the control circuit automatically causes the AGC circuit 15 to operate.
There is no problem because it can be dealt with by controlling. As a result, an optimum correlation value can be obtained in data demodulation regardless of the presence of interference waves or deterioration of the reception state.

Further, another configuration example of the control circuit 14 is shown in FIG.
It shows in (a). The operating characteristic of the VI conversion circuit 14e of FIG. 4A is shown in FIG. The basic operation is the same as in FIG. The difference is that the D / A obtained through the integrator
The converter output is being binarized in the comparator 14f. The method of FIG. 3 (a) enables continuous dense gain control as shown in FIG. 3 (b), while FIG. 4 (a) discretely as shown in FIG. 4 (b). To control. Incidentally, the reference voltage E '(V) in the comparator 14f is a voltage corresponding to a value whose correlation value used for data demodulation is unsatisfactory in a state where the number of quantization bits of the A / D conversion circuits 7 and 8 is maximized. Is. As a result, good communication is possible even in an environment where interference waves exist. As the correlators 9 and 10, it is obvious that any one may be used as long as it is a digitized one such as a matched filter system or a sliding correlator system.
As described above, according to the embodiment, good data demodulation performance can be obtained without degrading the performance of the correlator even in the environment where the interference wave exists. Further, it can be realized by simply configuring it.

FIG. 5 shows an embodiment of the SS receiver according to the fifth invention, and the same reference numerals as those in FIG. 12 represent the same or similar circuits, but a particularly different configuration is the digital correlator 3
A feedback loop 42 including a comparison circuit 40 and an AGC control circuit 41 is provided between 0 and the AGC amplifier 25.

FIG. 6 shows a flowchart showing the operation of this embodiment. The output of the digital correlator 30 is compared with the comparison circuit 4
When the output of the correlator 30 falls below that level, the output power of the AGC amplifier is increased. . When noise is superimposed on the signal due to this series of operations, the AGC amplifier 2
The signal wave output level of 5 is controlled so as to match the dynamic range of the A / D converter 29. According to the embodiment of FIG. 5, even if noise is mixed in the signal wave, the A / D
Since the dynamic range of the converter 29 is controlled to be effectively utilized, the S / N (Eb / No) is improved.

7 (a) and 7 (b) show an embodiment of an SS transmitter and an SS receiver according to the seventh invention, respectively. Figure 7
In (a), 50 is a differential encoder, 51 is an exclusive OR (Ex-OR) circuit, 52 is a multiplier, and the differential encoder 50 is, for example, a delay element 50a and an Ex-OR.
The circuit 50b. In addition, in FIG.
The same reference numeral represents the same or similar circuit.
The receiver is further provided with differential decoders 53 and 54, a comparator 55 and a selector 56, and LPFs 57 and 58. The differential decoders 53 and 54 are, for example, the delay element 5 respectively.
3a and 54a and Ex-OR circuits 53b and 54b.

As shown in FIG. 7A, first, in the SS transmitter, the information data d transmitted by the differential encoder 50.
(T) is differentially encoded, and then the Ex-OR circuit 51 performs an exclusive OR operation with the PN code, and finally the output thereof outputs the carrier signal COSω ₀ t to the multiplier 52.
The SS-DPSK signal s (t) is modulated and transmitted.
As shown in FIG. 7B, the SS receiver receives the SS
-DPSK signal s (t), SS-DPSK signal s
COSωt and S equal to the carrier signal frequency of (t)
Quadrature detection is performed by multiplying INωt by the multipliers 32 and 33, and the COS component and the SIN component are extracted.

Next, the extracted COS and SIN components are extracted by the low pass filters 57 and 58 having a cutoff frequency equal to the PN code clock frequency to extract the received PN code chips. Then, the extracted reception PN code chip is converted into digital data by the A / D converters 34 and 35 and input to the digital correlators 36 and 37. In the digital correlators 36 and 37, for example, the correlation value between the input data and the reference data equal to the result of the exclusive OR of the data “1” at the time of transmission and the PN code is obtained.

As shown in FIGS. 8A and 8B, the carrier COSω ₀ of the received SS-DPSK signal s (t).
If there is a phase shift between t and COS ωt and SIN ωt on the receiving side, and the COS component is in the region of zero, the maximum value can be obtained from the SIN component, and conversely SIN
When the component is in the region of zero, it is possible to get the maximum value from the COS component. Further, in the differentially encoded information data d (t), even if the signal component disappears and an error occurs in the differentially decoded data, normal information data d (t) is decoded if the signal component is recovered. It is known that it is possible. Therefore, the COS side and the SIN side each perform data demodulation by differential decoding based on the correlation value, and the sequential selector 56 determines a high correlation value based on the result of comparing the correlation values of the demodulated data by the comparator 55. If the demodulated data of the one shown is selected, the carrier COSω ₀ t of the received SS-DPSK signal s (t) and the COSωt and SINωt of the receiving side.
Even if there is a phase shift between and, the information data d
It is possible to demodulate (t).

According to the embodiment shown in FIG. 7, it is possible to avoid the bit inversion state of the demodulated data, which occurs when asynchronously demodulating the SS-BPSK signal using the digital and analog correlators, and perform the data demodulation normally. It is possible.

[0040]

As described above, according to the present invention, S
In the S communication device, good communication is performed even in the presence of interference waves or in a noise environment, or by avoiding bit inversion of demodulated data due to uncertain carrier phase of received SS signal and phase of COS wave and SIN wave on the receiving side Is possible.

[Brief description of drawings]

FIG. 1 is a block diagram showing an embodiment of a first invention.

FIG. 2 is a gain characteristic diagram of an AGC circuit.

3A and 3B are a block diagram showing a configuration example of a control circuit and an operation characteristic diagram of a VI converter.

4A and 4B are a block diagram showing another configuration example of the control circuit and another operation characteristic diagram of the VI converter.

FIG. 5 is a block diagram showing an embodiment of the fifth invention.

6 is a flowchart showing the operation of the embodiment of FIG.

FIG. 7 is a block diagram showing an embodiment of the seventh invention.

FIG. 8 is an operation explanatory diagram of the embodiment in FIG.

FIG. 9 is a block diagram showing a conventional SS receiver using a digital matched filter.

10 is a waveform diagram for explaining the operation of the SS receiver of FIG.

FIG. 11 is a block diagram illustrating an example of a conventional analog demodulation SS receiver.

FIG. 12 is a block diagram showing an example of a conventional SS receiver of a digital demodulation system.

13 is an explanatory diagram of the operation of the SS receiving device in FIG.

FIG. 14 is a block diagram showing another configuration example of a conventional SS receiver.

15 is an explanatory diagram of the operation of the SS receiver of FIG.

FIG. 16 is a block diagram showing an example of a matched filter type digital correlator.

[Explanation of Codes] 1, 2 Multiplier 7, 8 A / D converter 9, 10 Correlator 14 Control circuit 14a Logical sum circuit 14b Gate circuit 14c D / A converter 14d Integrator 14e VI converter 14f Comparison 15 AGC circuit 25 AGC circuit 27 A / D converter 30 Digital correlator 40 Comparator 41 AGC control circuit 50 Differential encoder 51 Ex-OR circuit 52 Multiplier 53, 54 Differential decoder 55 Comparator 56 Selector

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Takao Kurihara 5-35-2 Shirayama, Bunkyo-ku, Tokyo Clarion Co., Ltd.

Claims (9)

[Claims] 1. A spread spectrum receiver for A / D converting a received signal input via an AGC circuit and applying the A / D converted signal to a digital correlator, and performing data demodulation based on a correlation output from the digital correlator. A spread spectrum communication device, comprising: noise detecting means for detecting noise in the received signal, and gain control means for controlling the gain of the AGC circuit according to the detection output of the noise detecting means. Spread spectrum communication device. 2. The spread spectrum communication device according to claim 1, wherein the noise detection means has a gate circuit which is turned on / off based on the A / D converted reception signal and a correlation output. 3. The control means outputs the correlation output as D / A.
A D / A conversion circuit for converting, an integration circuit for integrating a conversion output of the D / A conversion circuit, and a voltage-current conversion circuit for converting an output integrated voltage of the integration circuit into a current. The spread spectrum communication device according to claim 1. 4. A comparison circuit for comparing an output integrated voltage of the integration circuit with a reference voltage is provided between the integration circuit and the voltage-current conversion circuit. Spread spectrum communication device. 5. The control means controls the gain of the AGC circuit so that the amplitude of the input of the A / D conversion circuit reaches its full range.
The spread spectrum communication device described in. 6. The noise detecting means comprises a comparator for comparing the correlation output with a reference value, and the control means operates in response to the output of the comparator.
The spread spectrum communication device described in. 7. Encoding means for differentially encoding transmission data, and spread spectrum D for differentially encoded transmission data.
A spread spectrum transmitter including a modulation means for PSK modulation, a detection means for quadrature detection of the received spread spectrum DPSK modulated signal, and an A / D conversion means for A / D converting the output signal of the detection means, A spread spectrum receiver including a digital correlator that receives the converted output of the A / D conversion means and obtains a corresponding correlated output, and demodulation means that differentially decodes and demodulates based on the correlated output, A spread spectrum communication device comprising: 8. The spread spectrum receiver compares the two correlation outputs corresponding to the two orthogonally detected detection outputs, and two demodulators corresponding to the correlation outputs based on the comparison result. 8. The spread spectrum communication device according to claim 7, further comprising a selection unit that selects one of the outputs. 9. The encoding means includes a differential encoder including a delay element and an exclusive OR circuit, and the demodulating means includes a differential decoding including a delay element and an exclusive OR circuit. The spread spectrum communication device according to claim 7, further comprising a circuit.