JPH07135642A - Inter-frame interpolation circuit - Google Patents

Abstract

PURPOSE:To obtain an inter-frame interpolation circuit without increasing the circuit scale by using a 1st selector selecting a signal of n-fields and a 2nd selector selecting a signal of a 1st field memory or a signal of other field memory when interpolation is processed between plural fields. CONSTITUTION:A MUSE signal received from an input terminal 11 is inputted to a 1st selector 12. A 1st field memory 13 provides an output of a signal (i) resulting from applying inter-frame interpolation to MUSE signals of one preceding field and three-preceding field of a MUSE signal (hereinafter called current field MUSE signal) from the input terminal 11. A 2nd field memory 14 provides an output of a signal (j) resulting from applying inter-frame interpolation to MUSE signals of two-preceding field and four-preceding field of the current field MUSE signal. A MUSE signal of one preceding field or one succeeding field is obtained from an output terminal 17 with respect to the signal (i). The frame interpolation circuit is obtained by using 1st and 2nd selectors 12,15 without need for the excess field memories.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a decoding device for a high-definition television signal, such as a MUSE signal, which is band-compressed by subsampling cyclically in n fields.
The present invention relates to an interframe interpolation circuit that performs interframe interpolation processing of the band-compressed high-definition television signal.

[0002]

2. Description of the Related Art As a technique for band-compressing a wideband high-definition television signal by subsampling cyclically in n fields, for example, MUSE (Multiple Sub-N) is used.
yquistSampling Encoding) method. This MUSE
The method is a method of performing band compression by performing sub-sampling processing for one cycle of four fields on the original high-definition television signal (“New high-definition television transmission method-MUSE”).
-", NHK STRL Monthly Report, Ninomiya, Vol. 27, No. 7, 1984
Year).

The band-compressed high-definition television signal (hereinafter referred to as MUSE signal) is generally decoded by the decoding device shown in FIG. Figure 4 is MUS
FIG. 1 is a diagram showing an example of the configuration of an E signal decoding device, in which 41 is an input terminal, 42 is an interframe interpolation circuit, 43 is an interfield interpolation circuit, 44 is a field interpolation circuit, 45 is a mixing circuit, and 46 is A motion detection circuit, 47 is an output terminal.

FIG. 5 shows an interframe interpolation circuit 4 shown in FIG.
2 shows an example of a conventional configuration, 51 is an input terminal, 5
2 is a selector, 53 is a first field memory, 54 is a second field memory, and 55 and 56 are output terminals.

FIGS. 6 and 7 show examples of the structure of the inter-field interpolation circuit. In FIG. 6, 61 is an input terminal, 62 is a field memory, 63 is an interpolation filter, 6
4 is an output terminal. In FIG. 7, reference numerals 71 and 72 denote input terminals 73, interpolation filters, and 74 output terminals.

The operations of the MUSE signal decoding circuit and the conventional interframe interpolating circuit will be described below with reference to FIGS. 4 and 5. First, in FIG. 4, the MUSE signal input from the input terminal 41 is input to the interframe interpolation circuit 42. The interframe interpolation circuit 42 in FIG.
The MUSE signal input from the input terminal 51 is input to the selector 52. This time,
The MUS signal (hereinafter referred to as the current field MUSE signal) input from the input terminal 51 from the first field memory 53 is one field before and three fields before.
The signal b obtained by interpolating the E signal between frames is used as the current field MUSE signal 2 from the second field memory 54.
A signal c obtained by interpolating the MUSE signal before the field and the MUSE signal before the four fields is output.

The selector 52 switches between the signal 2 fields before and the MUSE signal 4 fields before in the signal c and the MUSE signal 4 fields before and the current field MUSE signal from the input terminal 51, and the current field MUSE signal and 2 A signal a obtained by inter-frame interpolating the MUSE signal before the field is output. The output signal a of the selector 52 and the output signal b of the first field memory 53 are output from output terminals 56 and 55, respectively.

In FIG. 4, in the output MUSE signals a and b of the interframe interpolating circuit 42 shown in FIG. 5, the signal a in which the current field MUSE signal and the MUSE signal two fields before are interframe interpolated is The interpolating circuit 43, the field interpolating circuit 44, and the motion detecting circuit 46 are input to the inter-frame interpolating circuit 43. Entered in.

The inter-field interpolation circuit 43 takes out the MUSE signal of the current field from the output signal a of the inter-frame interpolation circuit and the MUSE signal of one field before from the output signal b, and uses the MUSE signal of the two fields. Inter-field interpolation processing is performed and output to the mixing circuit 45.

The inter-field interpolation circuit is generally constructed as shown in FIG. In FIG.
The MUSE signal input from the input terminal 61 is input to the field memory 62 and the interpolation filter 63. The field memory 62 delays the input MUSE signal for one field period and outputs it to the interpolation filter 63. The interpolation filter 63 performs inter-field interpolation processing using the MUSE signal of the current field, which is the output of the input terminal 61 and the field memory 62, and the MUSE signal of the preceding field, and outputs from the output terminal 64. That is, a field memory is required in the inter-field interpolation circuit having the configuration shown in FIG.

However, since the interframe interpolating circuit described in this conventional example can output the current field MUSE signal as the signal a and the MUSE signal one field before as the signal b, as shown in FIG. An inter-field interpolation circuit having a configuration that does not require the field memory shown may be used.

In FIG. 7, a signal a obtained by interpolating the MUSE signal of the current field and the MUSE signal of two fields before from the input terminal 71 is inserted between frames, and the MUSE signal of one field before and the MUSE signal of three fields before are input from the input terminal 72. By inputting the signal b interpolated between frames, an inter-field interpolation circuit that does not require a field memory can be realized.

In FIG. 4, the field interpolation circuit 44 is used.
Outputs the MUSE signal of the current field from the output signal a of the interframe interpolation circuit 42, performs field interpolation processing, and outputs it to the mixing circuit 45.

The motion detection circuit 46 is an interframe interpolation circuit 4
The motion amount between frames is detected by using the output signal a of 2 and the motion amount signal is output to the mixing circuit 45.

The mixing circuit 45 mixes the input signals from the inter-field interpolation processing circuit 43 and the field interpolation processing circuit 44 using the motion amount signal input from the motion detection circuit 46 to output from the output terminal 47. It outputs a decoded signal of a high-definition television signal.

The decoding process of the MUSE signal is performed as described above. By the way, in the inter-field interpolation circuit 43 of FIG. 4, in the conventional MUSE signal decoding apparatus, a method of performing inter-field interpolation with the MUSE signal of the current field and the MUSE signal of one field before as shown in FIG. 6 is generally used. However, in recent years, an inter-field interpolating circuit such as that shown in FIG. 8 has also been proposed (ITEJ Technical Report Vo.
l.16 No.32, pp.13-18, ICS'92-40 (June.1992)).

FIG. 8 shows that the current field MUSE signal is inter-field interpolated by the MUSE signal one field before in one field and inter-field interpolated by the MUSE signal one field after in the other field. It is a structural example of the inter-field interpolation circuit of the structure to perform.

In FIG. 8, 81 is an input terminal, 82 is a first field memory, 83 is a second field memory, 84 is a selector, 85 is an interpolation filter, and 86 is an output terminal. The operation of the inter-field interpolation circuit of FIG. 8 will be described below.

In FIG. 8, first, the MUSE signal input from the m input terminal 81 is the first field memory 82,
The delay processing is performed by the second field memory 83. The signal e which is the output of the first field memory 82
Is input to the interpolation filter 85, and the signal f which is the output of the second field memory 83 and the signal d which is the input from the input terminal 81 are input to the selector 84. The selector 84 switches and outputs the signal d and the signal f in units of fields.
The interpolation filter 85 uses the output e of the field memory 82 and the output of the selector 84 to perform interpolation processing.

That is, in the inter-field interpolation circuit shown in FIG. 8, the MU of the current field is used in one field.
The SE signal and the MUSE signal one field before are subjected to interpolation processing, and the other field is so configured that the current field MUSE signal and the MUSE signal after one field are subjected to interpolation processing.

[0021]

However, in the configuration of the conventional interframe interpolation circuit described above, for example, in the interfield interpolation processing, the current field MUSE signal and the 1
When performing the inter-field interpolation processing with the MUSE signal before the field, since the MUSE signal of the current field and the MUSE signal of the previous field can be output, a field memory is not required in the inter-field interpolation circuit.
As shown in FIG. 8, in one field, the current field MUSE signal and the MUSE signal one field before are used for interpolation processing, and in the other field, the current field MUSE signal.
The inter-field interpolating circuit configured to perform the interpolating process on the signal and the MUSE signal after one field has a problem that a new field memory is required and the circuit scale is increased.

In view of the above point, the present invention is such that, when processing is performed between a plurality of fields, the other field with respect to the current field is replaced with the previous field in one field and the subsequent field in the other field. It is an object of the present invention to provide an interframe interpolation circuit that does not require an increase in field memory even when performing processing.

[0023]

To achieve the above object, the present invention provides a plurality of field memories for storing high-definition television signals band-compressed by sub-samples circulating in n fields, and the plurality of field memories. A first selector for reading the stored signal and performing inter-frame interpolation processing of the high-definition television signal of the n field, and a field memory of either the first selector or the plurality of field memories And a second selector that selectively outputs the read signal from the.

[0024]

With the above-described structure, the present invention has the present field MUSE signal and the previous field MUS in one field as in the inter-field interpolation circuit shown in FIG.
Interfield interpolation is also performed when interpolating with the E signal and interpolating with the current field MUSE signal and the MUSE signal one field after in the other field. There is no need to add a new field memory to the circuit.

[0025]

DESCRIPTION OF THE PREFERRED EMBODIMENTS The operation of the frame interpolating circuit of the present invention and the operation of the MUSE signal decoding apparatus using the interframe interpolating circuit of the present invention will be described below with reference to FIGS.

FIG. 1 is a diagram showing the structure of an interframe interpolating circuit according to an embodiment of the present invention. 11 is an input terminal, 12 is a first selector, 13 is a first field memory, and 14 is a second field memory. Field memory, 15 is a second selector, and 17 and 18 are output terminals.

FIG. 2 shows the structure of a MUSE signal decoding apparatus using an interframe interpolation circuit according to the embodiment of the present invention. Reference numeral 21 is an input terminal, 22 is an interframe interpolation circuit, and 23 is an interfield interpolation circuit. Interpolation circuit, 24 is an intra-field interpolation circuit, 25 is a mixing circuit, 26 is a motion detection circuit, 27
Is an output terminal.

In FIG. 2, the MUSE signal input from the input terminal 21 is input to the interframe interpolation circuit 22. The inter-frame interpolation circuit 22 in FIG. 2 has the configuration shown in FIG.
The USE signal is input to the first selector 12. This time,
The MUSE signal (hereinafter referred to as the current field MUSE signal) input from the input terminal 11 from the first field memory 13 is MUSE one field before and three fields before.
The signal i, which is obtained by interpolating the signal between frames, is output from the second field memory 14 as 2 of the current field MUSE signal.
A signal j obtained by interpolating the MUSE signal before the field and the MUSE signal before the four fields is output.

The first selector 12 is the MUS of the current field.
For the signal j in which the MUSE signal two fields before and four fields before the E signal are interpolated between frames, the MUSE signal four fields before and the current field M from the input terminal 11
The USE signal is switched, and the current field MUSE signal and 2
Interpolate MUSE signal before field to interframe h
Output as a signal. The output signal i of the first field memory 13 is input to the second field memory 14 and also output from the output terminal 18.

The output signal h of the first selector 12 and the second signal
Output signal j of the field memory 14 of the second selector 1
Input to 5. The second selector 15 selects the output signal h of the first selector 12 in one field and the output signal j of the second field memory 14 in the other field and outputs it from the output terminal 17.

As a result of the above operation, the interframe interpolating circuit shown in FIG. 1 outputs the MUSE signals one field before and three fields before the current field MUSE signal input from the input terminal 11 from the output terminal 18 between the frames. The interpolated signal i is output. Further, from the output terminal 17, the current field MUSE signal input from the input terminal 11 and the 2
Signal in which MUSE signal before field is interpolated between frames or MUS before 2 field and before 4 field
The signal in which the E signal is interpolated between frames is selected and the signal k
Is output as.

That is, with respect to the output signal i of the output terminal 18, it is possible to obtain the MUSE signal one field before or the MUSE signal one field after from the output terminal 17.

In FIG. 2, the output signal i of the interframe interpolation circuit 22 is input to the interfield interpolation circuit 23, the field interpolation circuit 24, and the motion detection circuit 26, and the signal k
Is input to the inter-field interpolation circuit 23. In the output of the interframe interpolation circuit 22, when the signal i is used as a temporal reference, the signal k is a signal one field before and one field after the signal i.

The inter-field interpolation circuit 23 performs inter-field interpolation processing from the signals i and k and outputs it to the mixing circuit 25. In this inter-field interpolation processing, in one field, the MUSE signal one field before the signal i can be extracted from the signal k and the interpolation processing can be performed.
In the other field, the MUSE signal after one field from the signal i is extracted from the signal k and the interpolating process is performed by the interfield interpolating circuit having the configuration shown in FIG.

The field interpolation circuit 24 performs field interpolation processing from the signal i and outputs it to the mixing circuit 25.
The motion detection circuit 26 detects a motion amount between frames using the signal i and outputs a motion amount signal to the mixing circuit 25. The mixing circuit 25 mixes the input signals from the inter-field interpolation processing circuit 23 and the field interpolation processing circuit 24 by using the motion amount signal input from the motion detection circuit 26 to output the high-definition television from the output terminal 27. The decoded signal of the signal is output.

FIG. 3 shows a second interframe interpolation circuit of the present invention.
It is a block diagram showing an example of. In FIG. 3, 31
Is an input terminal, 32 is a first selector, 33 is a first field memory, 34 is a second field memory, 35 is a second selector, 36 is a third selector, and 37, 38 and 39 are It is an output terminal.

In FIG. 3, the operation of the interframe interpolation processing is the same as that of the above-described embodiment. The feature of this inter-frame interpolation circuit is that by controlling the signal switching of the second selector 35 and the third selector 36, the output signals of the output terminals 37 and 39 are output with respect to the output signal m from the output terminal 38. The relationship between the signals p and q is as follows. In one field, the signal p is one field before and the signal q is one field after, and in the other field, the signal p is one field after and the signal q is one field after. It becomes possible to use the previous signal.

[0038]

As described above, according to the present invention, a plurality of field memories for storing high-definition television signals band-compressed by sub-samples circulating in n fields, and signals stored in the plurality of field memories are stored. A first selector for reading and performing inter-frame interpolation processing of the n-field high-definition television signal, and a read signal from a field memory of the first selector or the plurality of field memories. By providing a second selector that selectively outputs the current field MUSE signal and the MU one field before the current field MUSE signal by inter-field interpolation processing or the like.
Even when performing interpolating processing with the SE signal and performing interpolating processing with the current field MUSE signal and the MUSE signal one field after in the other field, the interframe interpolating circuit This can be realized by making the output switchable, and it is not necessary to provide a new field memory, and its practical effect is great.

[Brief description of drawings]

FIG. 1 is a block diagram showing a configuration example of an interframe interpolation circuit according to a first embodiment of the present invention.

FIG. 2 is a block diagram showing an example of a decoding circuit for a high-definition television signal using the interframe interpolation circuit of this embodiment.

FIG. 3 is a block diagram showing a configuration example of an interframe interpolation circuit according to a second embodiment of the present invention.

FIG. 4 is a block diagram showing an example of a conventional high-definition television signal decoding circuit using an inter-frame interpolation circuit.

FIG. 5 is a block diagram showing a configuration example of a conventional interframe interpolation circuit.

FIG. 6 is a block diagram showing a configuration example of an inter-field interpolation circuit.

FIG. 7 is a block diagram showing a configuration example of an inter-field interpolation circuit.

FIG. 8 is a block diagram showing a configuration example of an inter-field interpolation circuit.

[Explanation of symbols]

 12, 32 First selector 13, 33 First field memory 14, 34 Second field memory 15, 35 Second selector 22 Interframe interpolation circuit 23 Interfield interpolation circuit 24 Field interpolation circuit 25 Mixing Circuit 26 Motion Detection Circuit 36 Third Selector

Claims (3)

[Claims] 1. A plurality of field memories for storing a high-definition television signal band-compressed by sub-samples circulating in n fields, and a signal stored in the plurality of field memories is read to read out the n-field high signals. A first selector that performs inter-frame interpolation processing of a quality television signal, and a second selection that selectively outputs a read signal from the first selector or one of the field memories of the plurality of field memories. An interframe interpolating circuit, characterized in that 2. The interframe interpolation circuit according to claim 1, wherein the number of the second selectors is two or more. 3. A high-definition television signal is a signal that has been band-compressed by a band compression method in which sub-samples circulate in four fields, and the first field and the third field of the four-field high-definition television signal are First to remember
Field memory, a second field memory for storing the second field and the fourth field, a second selector for selectively outputting the outputs of the first selector and the second field memory, and a third field memory. The interframe interpolation circuit according to claim 1, further comprising a selector.