JPH07135267A - Nonvolatile semiconductor memory device and its manufacture - Google Patents

Abstract

PURPOSE:To provide a nonvolatile semiconductor memory device which is not affected by the shapes of floating gates (FGs), because the conventional nonvolatile memory having FGs has been affected by the shape variation of the FGs and the manufacturing method of the semiconductor device. CONSTITUTION:(1) In a nonvolatile semiconductor memory device having floating gates (FGs) 3, spacers 6 are formed at both edges of the FGs 3 by using such an insulating material as the SiO2 SiN, etc., and such a conductive material as the polysilicon, aSi, etc. (2) Spacers 6 are formed at both edges of FGs 3 in the state of spacers by etching back a spacer forming material after forming the FGs 3 and spacer forming material on a substrate 10.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a nonvolatile memory semiconductor device having a floating gate and a method for manufacturing the same. The present invention provides a non-volatile memory semiconductor device that is not affected by variations in the shape of floating gates and a method for manufacturing the same.

[0002]

2. Description of the Related Art FIG. 5 shows a cross-sectional view of a general conventional memory semiconductor device of this type. Conventionally, in a nonvolatile memory having a floating gate, the second gate insulating film between the floating gate and the control gate is affected by the shape of the floating gate, and the shape of the floating gate varies, so There is a problem that the electric field is concentrated and a leak current easily flows, and the holding characteristics vary from cell to cell.

This problem will be described below with reference to the conventional structure shown in FIG. In FIG. 5, reference numeral 1 is L for element isolation
OCOS region, 2 is a first gate insulating film, 3 is a floating gate (FG), 4 is a second gate insulating film, and 5 is a control gate (CG). Here, the shape of the floating gate 3 is varied, and a cell having a sharper angle as shown in FIG. There was a problem that the characteristics deteriorate.

[0004]

As described above, a nonvolatile memory having a floating gate may be affected by variations in the shape of the floating gate.

It is an object of the present invention to solve this problem and provide a non-volatile memory semiconductor device which is not affected by the shape of the floating gate and a manufacturing method thereof.

[0006]

According to a first aspect of the present invention, in a nonvolatile memory semiconductor device having a floating gate, spacers are formed at both ends of the floating gate. The device achieves the above object.

In the invention of claim 2 of the present application, the spacer is
The non-volatile memory semiconductor device according to claim 1, wherein the non-volatile memory semiconductor device is made of an insulating material.

In the invention of claim 3 of the present application, the spacer is
The non-volatile memory semiconductor device according to claim 1, wherein the non-volatile memory semiconductor device is made of a conductive material.

According to a fourth aspect of the present invention, a floating gate is formed on a substrate, a spacer forming material is formed, and then etching back is performed to form sidewall-shaped spacers at both ends of the floating gate. A method for manufacturing a characteristic nonvolatile memory semiconductor device, which achieves the above object.

A fifth aspect of the present invention is the method for manufacturing a non-volatile memory semiconductor device according to the fourth aspect, wherein silicon oxide or nitride is used as the spacer forming material. This achieves the above object.

The invention according to claim 6 of the present application is the method for manufacturing a nonvolatile memory semiconductor device according to claim 4, characterized in that polysilicon or amorphous silicon is used as the spacer forming material. The above object is achieved.

[0012]

[Operation] According to the present invention, since spacers made of an insulating material or a conductive material are formed at both ends of the floating gate, even if there is a variation in the shape of the floating gate, this effect is not affected and the retention characteristics are improved. .

[0013]

Embodiments of the present invention will be described below with reference to the drawings. However, it goes without saying that the present invention is not limited to the examples.

Example 1 FIG. 1 shows a cross-sectional view of a nonvolatile memory semiconductor device of this example.

As shown in FIG. 1, the semiconductor device of this embodiment is a non-volatile memory semiconductor device having a floating gate 3, and spacers 6 are formed at both ends of the floating gate 3.

In this embodiment, the spacer 6 is made of an insulating material. For example, it can be composed of SiO ₂ or SiN (in this embodiment, CVDSiO ₂ and CVDSi
Although each N was concretely implemented, the same action and effect were obtained).

More specifically, in FIG. 1, reference numeral 1 is a LOCOS region for element isolation, 2 is a first gate insulating film, 3 is a floating gate (FG), 4 is a second gate insulating film, and 5 is a control gate (CG). ) Is shown. Reference numeral 10 indicates a substrate.

Here, comparing the effect of electric field concentration due to the variation in the shape of the floating gate 6 between the conventional structure and the structure of the present embodiment, in the present embodiment, there is a portion where the shape of the floating gate becomes sharper. Even in the case, it can be seen that the spacer 6 is not affected by the formation (see the portion shown in FIG. 1B).

As described above, in this embodiment, the spacers 6 made of an insulating film are formed at both ends of the floating gate 3 so that the influence of electric field concentration due to the variation in the shape of the floating gate 3 is not exerted and the holding characteristic is improved. Is brought about.

In this example, a non-volatile memory semiconductor device was formed by the following method. 2 to 4 are referred to.

In this embodiment, the floating gate 3 is formed on the substrate 10 (FIG. 2), the spacer forming material 60 is formed (FIG. 3), and then etched back to form a sidewall shape at both ends of the floating gate 3. Spacers 6 are formed (FIG. 4).

More specifically, first, the LOCOS region 1, the first gate insulating film 2 and the floating gate 3 are formed by a conventionally known method to obtain the structure shown in FIG.

Next, in order to form spacers of an insulating film on both ends of the floating gate 3, for example, SiO ₂ CVD is performed.
The spacer forming material 60 is deposited to obtain the structure of FIG.

After that, etching back is performed by RIE to form the spacers 6 as shown in FIG.

From here, the second gate insulating film 4, the control gate 5, and the
An Al wiring (not shown) or the like is formed to obtain the structure shown in FIG.

In this embodiment, as described above, the spacers 6 made of an insulating material are formed on both ends of the floating gate, and then the second gate insulating film 4 is formed. Therefore, the holding property is improved.

Example 2 In this example, poly-Si was used as a conductive material instead of an insulating material such as SiO ₂ or SiN, and this was used in Example 1.
In the same manner as above, the spacers were formed as spacers on both ends of the floating gate 3.

Also in this embodiment, the same effect as in Embodiment 1 could be obtained.

[0029]

As described above, according to the present invention, it is possible to provide a technique for a non-volatile memory semiconductor device and its manufacturing method, which is not affected by the shape of the floating gate.

[Brief description of drawings]

FIG. 1 is a cross-sectional view showing a structure of a nonvolatile memory semiconductor device according to a first embodiment.

2A to 2C are cross-sectional views sequentially showing the manufacturing process of the nonvolatile memory semiconductor according to the first embodiment.

FIG. 3 is a sectional view sequentially showing the manufacturing process of the nonvolatile memory semiconductor according to the first embodiment (2).

FIG. 4 is a sectional view sequentially showing the manufacturing process of the nonvolatile memory semiconductor according to the first embodiment (3).

FIG. 5 is a sectional view showing a conventional technique.

[Explanation of symbols]

 1 LOCOS region for element isolation 2 First gate insulating film 3 Floating gate 4 Second gate insulating film 5 Control gate 6 Spacer 10 Substrate

─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. ⁶ Identification code Internal reference number FI technical display location H01L 29/792

Claims (6)

[Claims] 1. A non-volatile memory semiconductor device having a floating gate, characterized in that spacers are formed at both ends of the floating gate. 2. The non-volatile memory semiconductor device according to claim 1, wherein the spacer is made of an insulating material. 3. The non-volatile memory semiconductor device according to claim 1, wherein the spacer is made of a conductive material. 4. A floating gate is formed on a substrate,
A method of manufacturing a non-volatile memory semiconductor device, which comprises forming spacers in a sidewall shape on both ends of the floating gate by etching back after forming a spacer forming material. 5. The method for manufacturing a nonvolatile memory semiconductor device according to claim 4, wherein silicon oxide or nitride is used as the spacer forming material. 6. The method for manufacturing a non-volatile memory semiconductor device according to claim 4, wherein polysilicon or amorphous silicon is used as the spacer forming material.