JPH07134894A - Semiconductor memory device - Google Patents

Abstract

PURPOSE:To realize a detachable semiconductor memory device without taking much care when handling a contact point, and without taking an arrangement in space or a size of a case into consideration. CONSTITUTION:A power to a semiconductor memory device 2 from a main body 1 of a memory control device is efficiently transmitted between static coupler poles 11, 12 of the main body 1 and static coupler poles 21, 22 of the semiconductor memory device 2. A signal between the main body 1 and memory device 2 is efficiently transmitted between static coupler poles 13, 14 of the main body 1 and static coupler poles 23, 24 of the semiconductor memory device 2. Since the power is supplied and signals are input/output between the main body 1 and memory device 2 without using contact points, the semiconductor memory device 2 can be frequently attached/detached to/from the main body 1 with no trouble.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor memory device,
In particular, it relates to a removable storage device for storing video, audio, or data.

[0002]

2. Description of the Related Art Conventionally, in a semiconductor memory device, a memory chip and peripheral circuits are mounted on a printed circuit board, and the memory chips and peripheral circuits are supplied with power, ground, and signals (address signals, write data, read signals). Input / output of data, etc.) is performed via a connector or the like that contacts metal contacts.

Therefore, once the printed circuit board is connected to another device via the connector or the like, it is basically not attached to or detached from the other device except for special cases such as maintenance. However, when the printed circuit board is attached to and detached from another device such as a removable storage medium such as a floppy disk or a magneto-optical disk, the number of attachments and detachments is finite, and the attachment and detachment must be done after turning off the power. Careful attention must be paid to the handling of the contacts in that it cannot be done.

In order to solve this problem, signal input / output between a semiconductor memory mounted on a removable storage medium such as a floppy disk or a magneto-optical disk and the outside is performed by combining a light emitting element and a light receiving element. There has been proposed a contactless method using a combination of an oscillating circuit and a receiving circuit or a magnetic field line signal transmitting / receiving circuit.

However, power is supplied to a semiconductor memory mounted on a removable storage medium and peripheral circuits by a power supply circuit (battery or the like) installed in the same housing. This technique is disclosed in JP-A-63-187486.

[0006]

In the conventional semiconductor memory device described above, when a connector of metal contacts is used when it is detachably attached to another device, the number of attachments and detachments, the power supply state, etc. Great care must be taken in handling the contacts.

Further, in the case of contactless input / output of signals between the semiconductor memory and the outside, a power supply for supplying power to the semiconductor memory and peripheral circuits mounted in the housing of the removable storage medium. Since the supply circuit must be installed, it must be installed in a limited space by force, or the housing of the removable storage medium must be enlarged.

Further, when a metal contact connector or the like is used to supply power to the semiconductor memory and peripheral circuits in the housing, it is not necessary to consider the spatial arrangement or the size of the housing, but the contact Care must be taken in the handling of.

Therefore, the object of the present invention is to solve the above-mentioned problems and to use the contacts freely without paying sufficient attention to the handling of the contacts and without considering the space arrangement and the size of the housing. An object of the present invention is to provide a semiconductor memory device capable of performing the above.

[0010]

A semiconductor memory device according to the present invention electrostatically couples a power supply and a signal in a memory control device and an external memory device.

In another semiconductor memory device according to the present invention, a power supply and a signal in the memory control device and the external memory device are electromagnetically coupled.

Another semiconductor storage device according to the present invention is a storage control device main body, a housing accommodating a semiconductor memory and detachable from the storage control device main body, and the storage control device main body. A power conversion means for converting the power in the device body into a high frequency for power supply, and a power transmission for transmitting the high frequency for power into the housing through the wall material of the storage control device body and the wall material of the housing. A member, means for converting the high frequency for the power source, which is provided in the housing and transmitted through the transmission member for the power source, into a direct current power source, and a signal provided to the main body of the storage control device and for transmitting the signal to the semiconductor memory. Body signal converting means for converting body frequency to high frequency; memory signal converting means provided in the housing and converting memory contents of the semiconductor memory to high frequency for memory signal; A signal transmission member for transmitting the high frequency for the main body signal into the casing and the high frequency for the memory signal into the main body of the storage control device through the wall material of the control device main body and the wall material of the casing; Means for restoring the high frequency for the memory signal, which is provided in the main body of the storage control device and transmitted through the signal transmitting member, to the stored contents of the semiconductor memory; and the signal transmission provided in the housing. Means for restoring the high frequency for the main body signal transmitted through the member to a signal to the semiconductor memory.

[0013]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, the present invention will be described with reference to the drawings.

FIG. 1 is a block diagram showing an embodiment of the present invention. In the figure, an external semiconductor memory device 2 is attachable to and detachable from a storage controller main body (hereinafter referred to as a main body) 1.

Capacitive coupler poles (hereinafter referred to as electrodes) 11 to 14 for electrostatically coupling a power source and a signal are provided at opposing positions of the main body 1 and the semiconductor memory device 2, respectively.
21 to 24 are provided.

When the power source 111 (AC power source, DC power source, etc.) is supplied to the oscillator 15 of the main body 1, the electrode 1 on the main body 1 side is supplied.
A frequency 113 that can be efficiently transmitted between the electrodes 1 and 12 and the electrodes 21 and 22 on the semiconductor memory device 2 side is generated and supplied to the electrodes 11 and 12. Here, the frequency 113 is, for example, a frequency higher than that of a commercial power source of about 100 kHz.

A frequency of 113 is applied to the electrodes 11 and 12 on the main body 1 side.
Is supplied to the electrodes 21 and 22 on the semiconductor memory device 2 side by the housing 1a (dielectric material) of the main body 1 and the housing 2a (dielectric material) of the semiconductor memory device 2.

As a result, a high frequency current 121 is generated at the electrodes 21 and 22, and this high frequency current 121 is generated.
Input to 5. The rectifier 25 rectifies the high frequency current 121 input from the electrodes 21 and 22, and the direct current power supply (DC) 1
23 is supplied to each circuit in the semiconductor memory device 2.

On the other hand, the transmitter 16 of the main body 1 uses the serial data 1
When 12 is input, the electrodes 13 and 14 on the main body 1 side are driven according to the serial data 112 via the signal line 114. When the electrodes 13 and 14 on the main body 1 side are driven by the transmitter 16, the electrodes 23 and 24 on the semiconductor storage device 2 side are driven by the housing 1 a of the main body 1 and the housing 2 a of the semiconductor storage device 2.
Is induced by capacitance.

As a result, a dielectric voltage is generated at the electrodes 23 and 24. This dielectric voltage is input to the receiver 26 via the signal line 122. In the receiver 26, the electrodes 23 and 24
Amplifies the dielectric voltage input from the signal line 122 via
Waveform shaping is performed, and the write control circuit 2 is used as the serial data 124.
8 and the read control circuit 29.

If the serial data 124 is data for writing to the semiconductor memory 30, the write control circuit 28 generates the write address signal 125 and the write data 126 from the serial data 124, and writes it to the semiconductor memory 30. Write control is performed.

Further, the serial data 124 is the semiconductor memory 3
If the data is data for reading 0, the read control circuit 29 generates a read address signal 127 from the serial data 124 and controls the semiconductor memory 30 for reading.

The read control circuit 29 converts the read data 128 read from the semiconductor memory 30 into the serial data 129 by the above operation and outputs the serial data 129 to the transmitter 27. Transmitter 27
When the serial data 129 is input, drives the electrodes 23 and 24 on the semiconductor memory device 2 side according to the serial data 129 via the signal line 122.

When the electrodes 23 and 24 on the semiconductor memory device 2 side are driven by the transmitter 27, the electrode 1 on the main body 1 side is driven by the housing 2 a of the semiconductor memory device 2 and the housing 1 a of the main body 1.
3, 14 are capacitance-induced.

As a result, a dielectric voltage is generated at the electrodes 13 and 14. This dielectric voltage is input to the receiver 17 via the signal line 114. In the receiver 17, the electrodes 13, 14
Amplifies the dielectric voltage input from the
The waveform is shaped and output as serial data 115 to an internal circuit (not shown) of the main body 1.

As described above, the power supply from the main body 1 to the semiconductor memory device 2 and the input / output of signals between the main body 1 and the semiconductor memory device 2 are performed by the electrodes 11 to 14 on the main body side and the casing 1a of the main body 1. Through the electrostatic capacity coupler (capacitor) formed by the housing 2a of the semiconductor memory device 2 and the electrodes 21 to 24 on the semiconductor memory device 2 side, contactless power supply and signal input / output can be performed. It is possible to realize the detachable semiconductor memory device 2 that can be carried out.

The electrostatic capacity coupler for data formed by the electrodes 13, 14, 23, 24 is commonly used for signal transmission and reception, but this electrostatic capacity coupler is used for data transmission. It is also possible to separately use them for data reception and for control signals. Also, the electrodes 11 to 1
It is also possible to dispose a dielectric other than the housing 1a of the main body 1 and the housing 2a of the semiconductor storage device 2 between the slots 4, 21 to 24.

FIG. 2 is a block diagram showing another embodiment of the present invention. In the figure, an external semiconductor memory device 4 is attachable to and detachable from a storage controller main body (hereinafter referred to as a main body) 3.

Electromagnetic couplers 31, 32, 41, 42 for electromagnetically coupling a power source and a signal are provided at the opposing positions of the main body 3 and the semiconductor memory device 4, respectively.

The oscillator 35 of the main body 3 can be efficiently transmitted between the electromagnetic coupler 31 on the main body 3 side and the electromagnetic coupler 41 on the semiconductor memory device 4 side when the power source 131 (AC power source, DC power source, etc.) is supplied. Such a frequency 133 is generated and supplied to the electromagnetic coupler 31. Here, the frequency 133 is, for example, a frequency higher than that of a commercial power source of about 100 kHz.

The frequency 133 is applied to the electromagnetic coupler 31 on the main body 3 side.
Is supplied to the electromagnetic coupler 41 on the semiconductor memory device 2 side via the housing 3a of the main body 3 and the housing 4a of the semiconductor memory device 4 to induce high frequency.

As a result, a high frequency current 141 is generated in the electromagnetic coupler 41, and the high frequency current 141 is generated by the rectifier 4.
Input to 3. The rectifier 43 rectifies the high frequency current 141 input from the electromagnetic coupler 41, and the direct current power supply (DC) 1
43 is supplied to each circuit in the semiconductor memory device 4.

On the other hand, when the serial data 132 is input, the transmission amplifier 36 of the main body 3 drives the electromagnetic coupler 32 on the main body 3 side according to the serial data 132 via the signal line 134. When the electromagnetic coupler 32 on the main body 3 side is driven by the transmission amplifier 36, the electromagnetic coupler 42 on the semiconductor memory device 4 side is electromagnetically induced through the housing 3 a of the main body 3 and the housing 4 a of the semiconductor memory device 4.

As a result, a dielectric voltage is generated in the electromagnetic coupler 42. This dielectric voltage is input to the reception amplifier 44 via the signal line 142. The reception amplifier 44 amplifies and waveform-shapes the dielectric voltage input from the electromagnetic coupler 42 via the signal line 142, and outputs it as the serial data 144 to the write control circuit 46 and the read control circuit 47.

If the serial data 144 is data for writing to the semiconductor memory 48, the write control circuit 46 generates the write address signal 145 and the write data 146 from the serial data 144, and the write address signal 145 and the write data 146 are sent to the semiconductor memory 48. Write control is performed.

Further, the serial data 144 is the semiconductor memory 4
If the data is data for reading 8 data, the read control circuit 47 generates a read address signal 147 from the serial data 144 and controls the semiconductor memory 48 for read.

The read control circuit 47 converts the read data 148 read from the semiconductor memory 48 into the serial data 149 by the above operation and outputs the serial data 149 to the transmission amplifier 45. When the serial data 149 is input, the transmission amplifier 45 receives the signal line 1
The electromagnetic coupler 42 on the semiconductor memory device 4 side is driven via 42 in accordance with the serial data 149.

When the electromagnetic coupler 42 on the semiconductor memory device 4 side is driven by the transmission amplifier 45, the semiconductor memory device 4
The electromagnetic coupler 32 on the main body 3 side is electromagnetically induced through the housing 4a of 3 and the housing 3a of the main body 3.

As a result, a dielectric voltage is generated in the electromagnetic coupler 32. This dielectric voltage is input to the reception amplifier 35 via the signal line 134. The reception amplifier 35 amplifies and waveform-shapes the dielectric voltage input from the electromagnetic coupler 32 via the signal line 134, and outputs it as serial data 135 to an internal circuit (not shown) of the main body 3.

As described above, power supply from the main body 3 to the semiconductor memory device 4 and input / output of signals between the main body 3 and the semiconductor memory device 4 are controlled by the electromagnetic couplers 31 and 32 on the main body 3 side and the semiconductor memory device 4. It is possible to realize the detachable semiconductor memory device 4 capable of supplying power and inputting / outputting signals in a non-contact manner by carrying out via the electromagnetic couplers 41 and 42 on the side.

Although the electromagnetic couplers 32 and 42 are commonly used for signal transmission and reception, the electromagnetic couplers 32 and 42 are separated and independently for data transmission, data reception, and control signal. It is also possible to use it.

Thus, the main body 1 and the semiconductor memory device 2 are
For the power supply and the signal in FIG. 3, a capacitive coupler formed by the electrodes 11 to 14 on the main body side, the casing 1a of the main body 1, the casing 2a of the semiconductor memory device 2 and the electrodes 21 to 24 on the semiconductor memory device 2 side is used. By electrostatically coupling the semiconductor memory device 2 that can be detachably used without paying sufficient attention to the handling of the contacts and without considering the spatial arrangement or the size of the housing. Can be realized.

Further, the power supply and the signals in the main body 3 and the semiconductor memory device 4 are electromagnetically coupled by using the electromagnetic couplers 31 and 32 on the main body 3 side and the electromagnetic couplers 41 and 42 on the semiconductor memory device 4 side, so that the contacts are formed. It is possible to realize the semiconductor memory device 4 that can be detachably used without paying sufficient attention to the handling, and without considering the space arrangement and the size of the housing.

Therefore, there is no problem even if the semiconductor storage devices 2 and 4 are frequently attached and detached. Therefore, the semiconductor storage devices 2 and 4 are used in the same manner as a detachable storage medium such as a floppy disk or a magneto-optical disk. Therefore, the semiconductor memory devices 2 and 4 can be used as files that are supposed to be attached to and detached from the device.

Although the semiconductor memory device is connected to the storage control device in one embodiment and another embodiment of the present invention, the storage control device may be used as long as the device can control the semiconductor storage device. It need not be, and is not limited to this.

[0046]

As described above, according to the semiconductor memory device of the present invention, due attention is paid to the handling of the contacts by electrostatically coupling the power supply and the signal in the memory control device and the external memory device. There is an effect that it can be detachably used without taking into consideration the spatial arrangement and the size of the housing.

Further, according to another semiconductor memory device of the present invention, by electromagnetically coupling the power supply and the signal in the memory control device and the external memory device, without paying sufficient attention to the handling of the contacts, There is an effect that it can be detachably used without considering the spatial arrangement and the size of the housing.

[Brief description of drawings]

FIG. 1 is a configuration diagram showing an embodiment of the present invention.

FIG. 2 is a configuration diagram showing another embodiment of the present invention.

[Explanation of symbols]

 1,3 Storage controller main body 2,4 Semiconductor storage device 11-14, 21-24 Capacitance coupler pole 15,33 Oscillator 16,27 Transmitter 17,26 Receiver 25,43 Rectifier 28,46 Write control circuit 29 , 47 Read control circuit 30, 48 Semiconductor memory 31, 32, 41, 42 Electromagnetic coupler 34, 45 Transmission amplifier 35, 44 Reception amplifier

Claims (15)

[Claims] 1. A semiconductor memory device in which a power supply and a signal in a memory control device and an external memory device are electrostatically coupled. 2. The semiconductor storage device according to claim 1, wherein the external storage device is detachably connected to the storage control device. 3. A pair of power supply electrodes, which are provided at opposing positions of the storage control device and the external storage device and electrostatically couple the power supply, and the storage control device and the external storage device. 3. The semiconductor memory device according to claim 1, further comprising a pair of signal electrodes provided at respective opposing positions and for electrostatically coupling the signals. 4. The pair of first signal electrodes for electrostatically coupling a signal from the storage control device to the external storage device, the signal electrode, and the storage control from the external storage device. 4. The semiconductor memory device according to claim 3, further comprising a pair of second signal electrodes for electrostatically coupling a signal to the device. 5. The pair of first signal electrodes electrostatically couple data to the external storage device with a pair of control signal electrodes for electrostatically coupling control signals to the external storage device. 5. The semiconductor memory device according to claim 4, further comprising a pair of data electrodes for coupling. 6. A semiconductor memory device characterized in that a power supply and a signal in a memory control device and an external memory device are electromagnetically coupled. 7. The semiconductor storage device according to claim 6, wherein the external storage device is detachably connected to the storage control device. 8. A pair of power supply inductors provided at opposing positions of the storage control device and the external storage device and for electromagnetically coupling the power supply, and the storage control device and the external storage device, respectively. 8. The semiconductor memory device according to claim 6 or 7, further comprising a pair of signal inductors which are provided at opposite positions and electromagnetically couple the signals. 9. The pair of first signal inductors for electromagnetically coupling a signal from the storage control device to the external storage device, the signal inductor, and the storage control device from the external storage device. 9. The semiconductor memory device according to claim 8, further comprising a pair of second signal inductors for electromagnetically coupling a signal to the signal. 10. The first signal inductor electromagnetically couples data to the external storage device with a pair of control signal inductors for electromagnetically coupling a control signal to the external storage device. 10. The semiconductor memory device according to claim 9, further comprising a pair of data inductors for the purpose. 11. A storage control device main body, and a housing that houses a semiconductor memory and is detachable from the storage control device main body.
A power supply conversion unit that is provided in the storage control device main body and converts the power supply in the storage control device main body into a high frequency for power supply; and the power supply through the wall material of the storage control device main body and the wall material of the housing. A power transmission member for transmitting a high frequency for use in the housing, a means provided in the housing for converting the high frequency for the power transmitted through the power transmission member into a direct current power supply, and the storage control device Main body signal conversion means provided in the main body for converting a signal to the semiconductor memory into a high frequency for a main body signal, and for a memory signal provided in the housing and converting a stored content of the semiconductor memory into a high frequency for a memory signal The main body signal high frequency is transmitted to the inside of the housing via the conversion means, the wall material of the storage control apparatus main body and the wall material of the housing, and the memory signal high frequency is transferred to the storage control apparatus main body. A transmission member for transmitting the signal, a means for restoring the high frequency for the memory signal, which is provided in the main body of the storage control device and transmitted through the transmission member for the signal, to the stored contents of the semiconductor memory; And a means for restoring the high frequency for the main body signal, which is provided in the housing and transmitted through the signal transmission member, to a signal to the semiconductor memory. 12. The signal transmission member includes a first signal transmission member for transmitting the main unit signal high frequency into the housing via a wall material of the storage control device main body and a wall material of the housing. A second signal transmitting member for transmitting the high frequency for memory signal into the main body of the storage control device through the wall material of the main body of the storage control device and the wall material of the housing. Item 12. The semiconductor memory device according to item 11. 13. The first signal transmitting member includes a control signal transmitting member that transmits a high frequency of a control signal for the semiconductor memory among the high frequency signals for the main body signal into the housing, and a high frequency signal for the main body signal. 13. The semiconductor memory device according to claim 12, further comprising a data signal transmission member that transmits a high frequency of a data signal to the semiconductor memory into the housing. 14. The power transmission member comprises a first power electrode provided on the storage control device main body side and a second power source provided in the housing facing the first power electrode. A storage electrode, and a capacitor is formed from the first and second power supply electrodes, the wall material of the storage control device body, and the wall material of the housing, and the signal transmission member is the storage control device. The first and second signal electrodes, which include a first signal electrode provided on the main body side and a second signal electrode provided in the housing facing the first signal electrode 12. A capacitor is formed from the wall material of the storage controller main body and the wall material of the housing.
4. The semiconductor memory device according to any one of 3 above. 15. The power transmission member is provided with a first power inductor provided on the storage controller main body side and a second power inductor provided inside the housing facing the first power inductor. A power supply inductor, wherein the signal transmission member includes a first signal ink inductor provided on the storage control device main body side, and a first signal ink member provided in the housing facing the first signal inductor. 14. The semiconductor memory device according to claim 11, further comprising two signal inductors.