JPH07134154A - Abnormal current detecting device for three-phase load - Google Patents
Abnormal current detecting device for three-phase loadInfo
- Publication number
- JPH07134154A JPH07134154A JP27959493A JP27959493A JPH07134154A JP H07134154 A JPH07134154 A JP H07134154A JP 27959493 A JP27959493 A JP 27959493A JP 27959493 A JP27959493 A JP 27959493A JP H07134154 A JPH07134154 A JP H07134154A
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- Prior art keywords
- phase
- output voltage
- current
- voltage
- phase load
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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- Emergency Protection Circuit Devices (AREA)
- Measurement Of Current Or Voltage (AREA)
Abstract
Description
【0001】[0001]
【産業上の利用分野】この発明は三相負荷の異常電流検
出装置に係り、より詳しくは三相負荷の負荷電流の欠相
及び不平衡電流の検出の改良に関するものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an abnormal current detector for a three-phase load, and more particularly to an improved detection of an open phase and an unbalanced load current of a three-phase load.
【0002】[0002]
【従来の技術】従来の三相負荷の異常電流検出装置とし
て実公昭62−1159号公報に示すものがあり、これ
を示す図9において、R1〜R15は抵抗、2a、2cは変
流器、TR1〜TR4はトランジスタ、IC1〜IC3はア
ンド素子、IC4はオア素子、IC5は比較素子、C1〜
C5はコンデンサ、RAは継電器、Eは直流電源であ
り、抵抗R9とコンデンサC1によって積分回路を構成
し、抵抗R10とコンデンサC2によって微分回路を構成
している。2. Description of the Related Art A conventional three-phase load abnormal current detecting device is disclosed in Japanese Utility Model Publication No. 62-1159. In FIG. 9 showing this, R1 to R15 are resistors, 2a and 2c are current transformers, TR1 to TR4 are transistors, IC1 to IC3 are AND elements, IC4 is an OR element, IC5 is a comparison element, C1 to
C5 is a capacitor, RA is a relay, and E is a DC power source. The resistor R9 and the capacitor C1 form an integrating circuit, and the resistor R10 and the capacitor C2 form a differentiating circuit.
【0003】次に、上記従来の三相負荷の異常電流検出
装置の動作を説明する。今、負荷電流が平衡3相電流の
場合、各相の重なり角は60゜であり、図10(a)のV4
の如く60゜づつのオンオフ信号となり、積分回路によ
ってV5の如く三角波に変換され、リップル電圧のみが
微分回路によって検出される。該リップル電圧と基準電
圧を比較素子IC5によって比較するが、基準電圧の方
が高いのでトランジスタTR4はオフのままである。Next, the operation of the conventional three-phase load abnormal current detection device will be described. Now, when the load current is a balanced three-phase current, the overlapping angle of each phase is 60 °, and V4 of FIG.
As described above, the signals are turned on and off every 60 ° and converted into a triangular wave like V5 by the integrating circuit, and only the ripple voltage is detected by the differentiating circuit. The ripple voltage and the reference voltage are compared by the comparison element IC5, but since the reference voltage is higher, the transistor TR4 remains off.
【0004】次に、S相が欠相した場合、電圧V1とV3
は同位相となり各相の重なり角は図10(b)の如く18
0゜となる。従って、積分回路によってV5の如く三角波
に変換され、リップル電圧のみが微分回路によって検出
されるが、平衡3相電流の場合に比べリップル電圧は大
きいのでトランジスタTR4がオンして欠相信号が出力
される。Next, when the S phase is missing, the voltages V1 and V3
Becomes the same phase and the overlapping angle of each phase is 18 as shown in Fig. 10 (b).
It becomes 0 °. Therefore, the integrating circuit converts it into a triangular wave like V5, and only the ripple voltage is detected by the differentiating circuit. However, the ripple voltage is larger than in the case of the balanced three-phase current, so that the transistor TR4 is turned on and the open phase signal is output. It
【0005】3相電流の位相が不平衡の場合、図10
(c)の如く平衡3相電流に比べリップル電圧は大きいの
でトランジスタTR4がオンして欠相信号が出力され
る。When the phases of the three-phase currents are unbalanced, FIG.
Since the ripple voltage is larger than the balanced three-phase current as shown in (c), the transistor TR4 is turned on and the open phase signal is output.
【0006】しかしながら、変流器の出力電流によって
抵抗R1の両端に電圧VR1を発生させ、該電圧を基に抵
抗R3〜R5を通じて電流を流すので、トランジスタTR
1のベース電流IB1は(VR1−VBE)/R3となる。ここ
に、VBEはトランジスタTR1のベース・エミッタ間電
圧を示す。従って、少なくともVR1<VBEの範囲では、
変流器の出力電流が全く検出できないので、正確な欠相
判定ができなかった。更に、変流器の出力電流が微小の
場合にトランジスタTR1〜TR5のベース電流を充分に
流すことができないので、トランジスタTR1〜TR5を
飽和領域で用いることができず、正確な欠相判定が困難
であった。However, since the voltage VR1 is generated across the resistor R1 by the output current of the current transformer and the current flows through the resistors R3 to R5 based on the voltage VR1, the transistor TR1 is used.
The base current IB1 of 1 is (VR1-VBE) / R3. Here, VBE indicates the base-emitter voltage of the transistor TR1. Therefore, at least in the range of VR1 <VBE,
Since the output current of the current transformer cannot be detected at all, accurate phase loss determination could not be performed. Furthermore, when the output current of the current transformer is very small, the base currents of the transistors TR1 to TR5 cannot be made to flow sufficiently, so that the transistors TR1 to TR5 cannot be used in the saturation region, and it is difficult to accurately determine the phase loss. Met.
【0007】又、各相電流の重なり角を検出して負荷電
流値そのものの検出はしていなかったので、負荷電流が
過電流になることを検出できなかった。Further, since the load current value itself is not detected by detecting the overlapping angle of the phase currents, it cannot be detected that the load current becomes an overcurrent.
【0008】更に、各相電流の重なり角を検出している
ので、負荷電流の位相が同一で電流値のみが不平衡の場
合の検出が困難であった。Further, since the overlapping angle of each phase current is detected, it is difficult to detect when the phases of the load currents are the same and only the current values are unbalanced.
【0009】又、積分回路によってリップル電圧を検出
しているので、負荷電流の欠相及び不平衡の判定時間が
長くかかっていた。Further, since the ripple voltage is detected by the integrating circuit, it takes a long time to determine the open phase and unbalance of the load current.
【0010】[0010]
【発明が解決しようとする課題】この発明は、上記従来
装置の欠点を解消することを目的とするもので、負荷電
流が変流器の1次側定格電流よりも相当低いときでも負
荷電流の欠相及び不平衡を精度良く検出することにあ
る。SUMMARY OF THE INVENTION An object of the present invention is to eliminate the above-mentioned drawbacks of the conventional device. Even when the load current is considerably lower than the primary side rated current of the current transformer, the load current It is to detect open phase and unbalance accurately.
【0011】又、他の目的は負荷電流の欠相及び不平衡
を検出しつつ容易に負荷電流の値を同時に検出すること
にある。Another object is to easily detect the load current value at the same time while detecting open phase and unbalance of the load current.
【0012】更に、他の目的は負荷電流値が不平衡ある
ことを容易に検出することにある。Still another object is to easily detect that the load current values are unbalanced.
【0013】又、他の目的は負荷電流の欠相及び不平衡
を高速に検出することにある。Another object is to detect open phase and unbalance of the load current at high speed.
【0014】[0014]
【課題を解決するための手段】第1の発明に係る三相負
荷の異常電流検出装置は、三相交流電源から三相負荷に
流れる異常電流を変流器により検出する三相負荷の異常
電流検出装置において、上記変流器の2次側電流を三相
全波整流する三相全波整流回路と、三相全波整流回路の
出力電圧を増幅する増幅手段と、上記増幅器の出力電圧
をディジタル変換するA/D変換手段と、上記A/D変
換手段の出力電圧値に応じて上記増幅器の増幅率を変更
する増幅率変更手段と、上記変換手段の出力電圧値に応
じて直流電圧を発生する直流発生手段と、上記増幅手段
の出力電圧と直流発生手段の出力電圧を比較する比較手
段とを備え、上記比較手段の出力波形によって上記三相
負荷に流れる異常電流を判定することを特徴とするもの
である。An abnormal current detection device for a three-phase load according to a first aspect of the present invention is an abnormal current for a three-phase load in which an abnormal current flowing from a three-phase AC power source to a three-phase load is detected by a current transformer. In the detection device, a three-phase full-wave rectification circuit for three-phase full-wave rectification of the secondary side current of the current transformer, an amplification means for amplifying the output voltage of the three-phase full-wave rectification circuit, and an output voltage of the amplifier are provided. A / D conversion means for digital conversion, amplification factor changing means for changing the amplification factor of the amplifier according to the output voltage value of the A / D conversion means, and DC voltage according to the output voltage value of the conversion means A direct current generating means for generating and a comparing means for comparing the output voltage of the amplifying means with the output voltage of the direct current generating means are provided, and an abnormal current flowing in the three-phase load is determined by the output waveform of the comparing means. It is what
【0015】第2の発明に係る三相負荷の異常電流検出
装置は、三相交流電源から三相負荷に流れる異常電流を
変流器により検出する三相負荷の異常電流検出装置にお
いて、上記変流器の2次側電流を三相半波整流する三相
半波整流回路と、三相半波整流回路の出力電圧を増幅す
る増幅手段と、上記増幅手段の出力電圧をディジタル変
換するA/D変換手段と、上記A/D変換手段の出力電
圧値に応じて上記増幅手段の増幅率を変更する増幅率変
更手段と、上記A/D変換手段の出力電圧値に応じて直
流電圧を発生する直流発生手段と、上記増幅手段の出力
電圧と直流発生手段の出力電圧を比較する比較手段とを
備え、上記比較手段の出力波形によって上記三相負荷に
流れる異常電流を判定することを特徴とするものであ
る。A three-phase load abnormal current detection device according to a second aspect of the invention is a three-phase load abnormal current detection device in which an abnormal current flowing from a three-phase AC power source to a three-phase load is detected by a current transformer. A three-phase half-wave rectifying circuit for rectifying the secondary side current of the current transformer into a three-phase half-wave rectifying circuit, an amplifying means for amplifying the output voltage of the three-phase half-wave rectifying circuit, and an A / for digitally converting the output voltage of the amplifying means. D conversion means, amplification factor changing means for changing the amplification factor of the amplification means according to the output voltage value of the A / D conversion means, and DC voltage generated according to the output voltage value of the A / D conversion means And a comparison means for comparing the output voltage of the amplification means with the output voltage of the DC generation means, and an abnormal current flowing through the three-phase load is determined by the output waveform of the comparison means. To do.
【0016】第3の発明に係る三相負荷の異常電流検出
装置は、三相交流電源から三相負荷に流れる異常電流を
変流器により検出する三相負荷の異常電流検出装置にお
いて、上記変流器の2次側電流を三相全波整流する三相
全波整流回路と、三相全波整流回路の出力電圧を増幅す
る増幅手段と、上記増幅器の出力電圧をディジタル変換
するA/D変換手段と、上記A/D変換手段の出力電圧
値が所定値以上であることを検出する電圧検出手段と、
上記電圧検出手段の動作によって上記増幅手段の増幅率
を変更する増幅率変更手段と、上記変換手段の出力電圧
値に応じて直流電圧を発生する直流発生手段と、上記増
幅手段の出力電圧と直流発生手段の出力電圧を比較する
比較手段とを備え、上記比較手段の出力波形によって上
記三相負荷に流れる異常電流を判定することを特徴とす
るものである。A three-phase load abnormal current detecting device according to a third aspect of the present invention is a three-phase load abnormal current detecting device in which an abnormal current flowing from a three-phase AC power source to a three-phase load is detected by a current transformer. A three-phase full-wave rectifier circuit for rectifying the secondary current of the current transformer into a three-phase full-wave rectification circuit, an amplification means for amplifying the output voltage of the three-phase full-wave rectification circuit, and an A / D for digitally converting the output voltage of the amplifier. Conversion means, and voltage detection means for detecting that the output voltage value of the A / D conversion means is greater than or equal to a predetermined value,
Amplification factor changing means for changing the amplification factor of the amplifying means by the operation of the voltage detecting means, DC generating means for generating a DC voltage according to the output voltage value of the converting means, output voltage of the amplifying means and DC And comparing means for comparing the output voltages of the generating means, and determining an abnormal current flowing in the three-phase load based on the output waveform of the comparing means.
【0017】第4の発明に係る三相負荷の異常電流検出
装置は、三相交流電源から三相負荷に流れる異常電流を
変流器により検出する三相負荷の異常電流検出装置にお
いて、上記変流器の2次側電流を三相全波整流する三相
全波整流回路と、三相全波整流回路の出力電圧を増幅す
る増幅手段と、上記増幅手段の出力電圧をディジタル変
換するA/D変換手段と、上記A/D変換手段の出力電
圧値に応じて上記増幅手段の増幅率を変更する増幅率変
更手段とを備え、上記A/D変換手段の出力から上記三
相負荷に流れる電流を演算することを特徴とするもので
ある。A three-phase load abnormal current detection device according to a fourth aspect of the present invention is a three-phase load abnormal current detection device in which an abnormal current flowing from a three-phase AC power source to a three-phase load is detected by a current transformer. A three-phase full-wave rectifier circuit for three-phase full-wave rectifying the secondary current of the current transformer, an amplifying means for amplifying the output voltage of the three-phase full-wave rectifying circuit, and an A / for digitally converting the output voltage of the amplifying means. D conversion means and amplification rate changing means for changing the amplification rate of the amplification means according to the output voltage value of the A / D conversion means are provided, and the output from the A / D conversion means flows to the three-phase load. It is characterized in that the current is calculated.
【0018】[0018]
【作用】第1の発明に係る三相負荷の異常電流検出装置
によれば、三相全波整流回路は変流器の2次側電流を三
相全波整流し、増幅手段は三相全波整流回路の出力電圧
を増幅し、A/D変換手段は増幅器の出力電圧をディジ
タル変換し、増幅率変更手段はA/D変換器の出力電圧
値に応じて増幅器の増幅率を変更し、直流発生手段はA
/D変換器の出力電圧値に応じて直流電圧を発生し、比
較手段は増幅器の出力電圧と直流発生器の出力電圧を比
較して比較回路の出力波形によって三相負荷に流れる異
常電流を判定するものである。According to the three-phase load abnormal current detection device of the first aspect of the invention, the three-phase full-wave rectifier circuit rectifies the secondary side current of the current transformer into three-phase full-wave rectification, and the amplifying means includes the three-phase full-wave rectification The output voltage of the wave rectifier circuit is amplified, the A / D conversion means digitally converts the output voltage of the amplifier, and the amplification factor changing means changes the amplification factor of the amplifier according to the output voltage value of the A / D converter, DC generating means is A
A DC voltage is generated according to the output voltage value of the D / D converter, and the comparing means compares the output voltage of the amplifier with the output voltage of the DC generator to determine an abnormal current flowing in the three-phase load based on the output waveform of the comparison circuit. To do.
【0019】第2の発明に係る三相負荷の異常電流検出
装置によれば、三相半波整流回路は変流器の2次側電流
を三相半波整流し、増幅器は三相半波整流回路の出力電
圧を増幅する他は、上記作用とほぼ同様の作用を奏す
る。According to the three-phase load abnormal current detection device of the second aspect of the invention, the three-phase half-wave rectifier circuit rectifies the secondary side current of the current transformer by three-phase half-wave, and the amplifier three-phase half-wave. Except for amplifying the output voltage of the rectifier circuit, the same operation as the above is achieved.
【0020】第3の発明に係る三相負荷の異常電流検出
装置によれば、電圧検出手段はA/D変換手段の出力電
圧値が所定値以上であることを検出し、増幅率変更手段
は電圧検出手段の動作によって上記増幅器の増幅率を変
更する他は、上記第1の発明に係る作用とほぼ同様の作
用を奏する。According to the three-phase load abnormal current detection device of the third aspect of the invention, the voltage detection means detects that the output voltage value of the A / D conversion means is equal to or higher than a predetermined value, and the amplification factor changing means Except that the amplification factor of the amplifier is changed by the operation of the voltage detecting means, the same operation as the operation according to the first invention is achieved.
【0021】第4の発明に係る三相負荷の異常電流検出
装置によれば、A/D変換器の出力から三相交流誘導電
動機に流れる電流を演算する他は、上記第1の発明に係
る作用とほぼ同様の作用を奏する。According to the abnormal current detection device for a three-phase load of the fourth invention, the current flowing through the three-phase AC induction motor from the output of the A / D converter is calculated. The effect is almost the same as the effect.
【0022】[0022]
実施例1.以下、この発明を図面に示す実施例に基づい
て説明する。なお、図中、従来と同一符号は同一又は相
当部分を示す。図1において、1はR相、S相、T相か
らなる三相交流電源に接続されている負荷機器である三
相交流誘導電動機(以下、モータという)、かかるモータ
等を総称して三相負荷という。2a〜2cはモータ1の
それぞれR、S、T相に電流に流れる電流を所定の変流
比Kcで2次側に伝達する変流器で、変流器2a〜2c
は一端を共通に接続してスター結線を構成している。4
はダイオードD1〜D6からなる三相全波整流回路で、変
流器2a〜2cの出力端をそれぞれダイオードD1、D
2、D3のアノード側に接続されている。5は三相全波整
流回路4の出力に接続されている抵抗、6aは演算増幅
素子で、正転入力の端子を抵抗5の一端に接続してい
て、反転入力の端子を抵抗6、8、9の一端に接続し、
演算増幅素子6aの出力端子に抵抗7、常開接点10
a、11aの一端を接続して抵抗7の他端を反転端子に
接続している。演算増幅素子6aと抵抗7〜9によって
抵抗5の両端電圧を増幅する増幅器12を構成してい
て、同時に、常開接点10a、11aの開閉によって増
幅器12の増幅率αが変更する増幅率変更手段を構成し
ている。なお、抵抗5〜9はそれぞれ抵抗値R5〜R9を
有している。Example 1. Hereinafter, the present invention will be described based on embodiments shown in the drawings. In the drawings, the same reference numerals as those used in the related art indicate the same or corresponding portions. In FIG. 1, reference numeral 1 is a load device connected to a three-phase AC power supply consisting of R-phase, S-phase, and T-phase, which is a three-phase AC induction motor (hereinafter referred to as a motor), and such a motor is generally referred to as three-phase. The load. Reference numerals 2a to 2c are current transformers for transmitting the currents flowing in the R, S, and T phases of the motor 1 to the secondary side at a predetermined current transformation ratio Kc.
Are connected in common at one end to form a star connection. Four
Is a three-phase full-wave rectification circuit consisting of diodes D1 to D6, and the output terminals of the current transformers 2a to 2c are diodes D1 and D, respectively.
2, connected to the anode side of D3. Reference numeral 5 is a resistor connected to the output of the three-phase full-wave rectification circuit 4, 6a is an operational amplifier element, the non-inverting input terminal is connected to one end of the resistor 5, and the inverting input terminal is the resistors 6, 8 , One end of 9,
A resistor 7 and a normally open contact 10 are connected to the output terminal of the operational amplification element 6a.
One end of a and 11a is connected and the other end of the resistor 7 is connected to the inverting terminal. The operational amplification element 6a and the resistors 7 to 9 constitute an amplifier 12 for amplifying the voltage across the resistor 5, and at the same time, the amplification factor changing means for changing the amplification factor α of the amplifier 12 by opening / closing the normally open contacts 10a, 11a. Are configured. The resistors 5 to 9 have resistance values R5 to R9, respectively.
【0023】10、11はリードリレーで、それぞれ常
開接点10a、11aを有していて、コイルの一端を接
地して他端をそれぞれ駆動回路13、14に接続され、
駆動回路13、14の他端はマイクロコンピュータ16
(以下、「マイコン」という。」内のインターフェース(以
下「I/Fという。」)16d、16eに接続されてい
る。又、増幅器12の入力電圧Vi12と出力電圧Vo12の
比である増幅率αは以下の3種の増幅率を有するように
構成されている。まず、常開接点10a、11aがオフ
の状態における増幅率αoffは(R6+R7)/R6となり、
又、常開接点10aがオンで常開接点11aがオフの状
態における増幅率α10onは(R6+R7//R8)/R6とな
る。なお、//の記号は抵抗が並列に接続された合成抵抗
を示す。即ち、合成抵抗Rcは(R7R8)/(R7+R8)と
なる。更に常開接点10a、11aがオンの状態におい
て、αon=(R6+R7//R8//R9)/R6となる。従っ
て、増幅率αはαoff>α10on>αonの関係になる。Reed relays 10 and 11 respectively have normally-open contacts 10a and 11a. One end of the coil is grounded and the other end is connected to the drive circuits 13 and 14, respectively.
The other ends of the drive circuits 13 and 14 are the microcomputer 16
(Hereinafter, referred to as "microcomputer".) Interfaces (hereinafter, referred to as "I / F") 16d and 16e. Also, an amplification rate α which is a ratio of the input voltage Vi12 and the output voltage Vo12 of the amplifier 12. Is configured to have the following three types of amplification factors: First, the amplification factor αoff when the normally open contacts 10a and 11a are off is (R6 + R7) / R6,
The amplification factor α10on when the normally open contact 10a is on and the normally open contact 11a is off is (R6 + R7 // R8) / R6. The symbol // indicates a combined resistance in which the resistances are connected in parallel. That is, the combined resistance Rc is (R7R8) / (R7 + R8). Further, when the normally open contacts 10a and 11a are on, αon = (R6 + R7 // R8 // R9) / R6. Therefore, the amplification factor α has a relationship of αoff>α10on> αon.
【0024】15は増幅器12の出力端に一端を接続し
て他端をI/F16aに接続されてなるA/D変換器、
18は直流発生器であり、入力端子をI/F16cに接
続されていて、A/D変換器15の出力電圧値に応じて
変化する可変直流電圧を発生するように構成されてい
る。演算増幅素子19の反転端子を増幅器12の出力端
子に接続されていて、正転端子を直流発生器18の出力
に接続され、比較回路を構成している。又、直流発生器
18から発生する直流電圧Vdcは増幅器12の出力電圧
Vo12とは以下の関係を有する。三相平衡時、増幅器1
2の出力電圧Vo12は図3(b)に示すように三相全波の出
力波形と同様であるので出力電圧の最大値Vo12maxと最
小値Vo12minとは、Vo12min=(√3/2)Vo12maxとな
る。従って、Vdc=kVo12となり、k<(√3/2)とな
るように構成されている。なお、実際には三相交流電源
の電源電圧変動等も考慮して該kを決定することにな
る。Reference numeral 15 is an A / D converter having one end connected to the output end of the amplifier 12 and the other end connected to the I / F 16a,
Reference numeral 18 denotes a DC generator, the input terminal of which is connected to the I / F 16c, and is configured to generate a variable DC voltage that changes according to the output voltage value of the A / D converter 15. The inverting terminal of the operational amplification element 19 is connected to the output terminal of the amplifier 12, and the non-inverting terminal is connected to the output of the DC generator 18, forming a comparison circuit. The DC voltage Vdc generated from the DC generator 18 has the following relationship with the output voltage Vo12 of the amplifier 12. Amplifier 1 when three-phase balanced
Since the output voltage Vo12 of No. 2 is the same as the output waveform of the three-phase full wave as shown in FIG. 3 (b), the maximum value Vo12max and the minimum value Vo12min of the output voltage are Vo12min = (√3 / 2) Vo12max. Become. Therefore, Vdc = kVo12 and k <(√3 / 2). Actually, the k is determined in consideration of the power supply voltage fluctuation of the three-phase AC power supply.
【0025】次に、上記実施例1の動作を図1〜4を参
照しながら説明する。まず、三相平衡電流が流れる場合
を説明する。図1において、モータ1の運転を開始する
と、三相交流電源からモータ1に負荷電流が流れ、変流
器2a〜2cによってR、S、T相の負荷電流ILr、I
Ls、ILtを検出して2次側に電流が伝達される。2次電
流ILr2、ILs2、ILt2は1次側の負荷電流ILをKc倍
したものとなる。該Kcは変流比であり、1次側定格電
流がIN1で2次側定格電流をIN2とすれば、Kc=IN2
/IN1となる。三相全波整流回路4の入力へ2次電流I
Lr2、ILs2、ILt2が流れ、0〜π/3の区間におい
て、ダイオードD1、D3、D5群のうちD1が、同様にD
2、D4、D6群のD6が導通するので三相全波整流回路4
の出力電流IdはId=iLr2−iLs2となる。なお、iLr
2、iLs2はそれぞれILr2、ILs2のベクトル表示を示
す。ここで、基準ベクトルをiLr2=IとするとILs2は
Iε-j2/3πである。従って、出力電流IdはId=I−
Iε-j2/3πとなる。出力電流Idが抵抗5に流れ、抵抗
5の両端電圧をVr5とするとVr5=IdR5となる。な
お、0〜π/3の区間において出力電流Idについての
電流についてであり、π/3区間毎に上記出力電流Id
が流れる。Next, the operation of the first embodiment will be described with reference to FIGS. First, the case where a three-phase balanced current flows will be described. In FIG. 1, when the operation of the motor 1 is started, a load current flows from the three-phase AC power supply to the motor 1 and the load currents ILr, I of the R, S, T phases are changed by the current transformers 2a to 2c.
The current is transmitted to the secondary side by detecting Ls and ILt. The secondary currents ILr2, ILs2, ILt2 are the load currents IL on the primary side multiplied by Kc. Kc is a current transformation ratio, and if the primary side rated current is IN1 and the secondary side rated current is IN2, Kc = IN2
/ IN1. Secondary current I to the input of the three-phase full-wave rectifier circuit 4
Lr2, ILs2, and ILt2 flow, and in the section of 0 to π / 3, D1 of the diode D1, D3, and D5 group is similarly D
Since D6 of 2, D4 and D6 group is conducting, three-phase full-wave rectifier circuit 4
Output current Id is Id = iLr2-iLs2. ILr
2 and iLs2 represent vector representations of ILr2 and ILs2, respectively. Here, assuming that the reference vector is iLr2 = I, ILs2 is Iε- j2 / 3π . Therefore, the output current Id is Id = I-
Iε- j2 / 3π . When the output current Id flows through the resistor 5 and the voltage across the resistor 5 is Vr5, Vr5 = IdR5. Note that the output current Id is the current in the section of 0 to π / 3, and the output current Id is set every π / 3 section.
Flows.
【0026】該電圧Vr5が演算増幅素子6aの差動電圧
として入力されるので増幅器12の出力電圧Vo12はVo
12=αVr5となり、該出力電圧波形は図3(b)に示すよ
うになる。図1、2に示すように出力電圧Vo12をA/
D変換器15によってサンプリング時間ts毎に読み込
みディジタル電圧値VDoに変換して同時にI/F16a
を通じてマイコン16に読み込む(ステップ101)。読
み込み継続時間trは三相交流電源の周波数周期とす
る。なお、読み込み継続時間trはサンプリング時間ts
の集合であるのでtr>tsの関係がある。ディジタル電
圧値Vdoと予め定めた基準電圧値Vpと比較する(ステッ
プ102)。比較の結果、Vdo>Vpであれば、リードリ
レー10、11がオフ状態か判断し(ステップ103)、
オフ状態であれば、リードリレー10をオンして常開接
点10aを閉成して増幅率α10onとして低下させ、出力
電圧V012を低下させ、ディジタル出力電圧値VDoを低
下させる(ステップ104)。再度出力電圧Vo12をA/
D変換器15によって変換してディジタル電圧値VDoを
I/F16aを通じてマイコン16に読み込む(ステッ
プ101)。ディジタル電圧値Vdoと予らかじめ定めた
基準電圧値Vpと比較する(ステップ102)。比較の結
果、Vdo>Vpであれば、リードリレー11がオフ状態
か判断し(ステップ105)、オフ状態であれば駆動回路
13を動作させてリードリレー11をオンして増幅率α
onとして更に低下させ、出力電圧Vo12に低下させ、デ
ィジタル出力電圧値VDoを低下させる(ステップ10
6)。Since the voltage Vr5 is input as the differential voltage of the operational amplification element 6a, the output voltage Vo12 of the amplifier 12 is Vo.
12 = αVr5, and the output voltage waveform becomes as shown in FIG. 3 (b). As shown in FIGS. 1 and 2, the output voltage Vo12 is A /
The D converter 15 reads the data every sampling time ts and converts it into a digital voltage value VDo, and at the same time I / F 16a
It is read into the microcomputer 16 through (step 101). The read duration tr is the frequency cycle of the three-phase AC power supply. The reading duration tr is the sampling time ts
, There is a relation of tr> ts. The digital voltage value Vdo is compared with a predetermined reference voltage value Vp (step 102). If Vdo> Vp as a result of the comparison, it is judged whether the reed relays 10 and 11 are off (step 103),
If it is in the off state, the reed relay 10 is turned on to close the normally open contact 10a to lower the amplification factor α10on, lower the output voltage V012, and lower the digital output voltage value VDo (step 104). Output voltage Vo12 is again A /
The digital voltage value VDo converted by the D converter 15 is read into the microcomputer 16 through the I / F 16a (step 101). The digital voltage value Vdo is compared with a predetermined reference voltage value Vp (step 102). If Vdo> Vp as a result of the comparison, it is judged whether the reed relay 11 is in the off state (step 105). If it is in the off state, the drive circuit 13 is operated to turn on the reed relay 11 and the amplification factor α.
It is further reduced as on, to the output voltage Vo12, and the digital output voltage value VDo is lowered (step 10).
6).
【0027】次に、マイコン16がディジタル電圧値V
doに応じて直流発生器18にディジタル電圧を入力し、
図3(c)に示すように直流発生器18から直流電圧Vdc
を発生せしめ(ステップ107)、比較回路17によって
直流電圧Vdcと増幅器12の出力電圧Vo12と比較して
Vo12>Vdcであるので図3(e)に示すように比較回路1
7から直流の出力電圧Vocを発生する。出力電圧Vocを
マイコン16に読み込む(ステップ108)。該出力電圧
Vocをマイコン16で正常か否か、即ち、オンオフ時間
比K2=Ton/Toffが∞になるか否かで判断する(ステ
ップ109)。ここに、TonはHレベル電圧期間をい
い、ToffはLレベル電圧期間をいう。三相平衡時は直
流電圧はTonのみでToffが存在しないのでオンオフ時
間比K2は∞となり正常な三相平衡電流がモータ1に流
れていると判定する(ステップ111)。まず、ディジタ
ル電圧値Vdoから増幅器12の出力電圧Vo12を換算し
て負荷電流ILを次式で演算する。IL=Vo12/(1−
ε-j2/3π)×(1/α)となる(ステップ115)。な
お、負荷電流ILは、ディジタル電圧値Vdoと増幅率αo
ff、α10on、αonに応じた3種の電流テーブルを有する
RAMを設け、ディジタル電圧値Vdoと増幅率によって
RAMのアドレスを定め、アドレスによってRAMに記
憶された内容を読み出すことによって負荷電流ILを求
めてもよい。これによって、上記例よりも処理時間は短
縮される。Next, the microcomputer 16 causes the digital voltage value V
Input a digital voltage to the DC generator 18 according to do,
As shown in FIG. 3 (c), the DC voltage Vdc is applied from the DC generator 18.
Is generated (step 107), the comparison circuit 17 compares the DC voltage Vdc with the output voltage Vo12 of the amplifier 12, and Vo12> Vdc. Therefore, as shown in FIG.
A DC output voltage Voc is generated from 7. The output voltage Voc is read into the microcomputer 16 (step 108). The microcomputer 16 determines whether the output voltage Voc is normal, that is, whether the on / off time ratio K2 = Ton / Toff becomes ∞ (step 109). Here, Ton means an H level voltage period, and Toff means an L level voltage period. Since the DC voltage is only Ton and Toff does not exist during three-phase balance, the on / off time ratio K2 becomes ∞, and it is determined that a normal three-phase balanced current is flowing to the motor 1 (step 111). First, the output voltage Vo12 of the amplifier 12 is converted from the digital voltage value Vdo to calculate the load current IL by the following equation. IL = Vo12 / (1-
ε- j2 / 3π ) × (1 / α) (step 115). The load current IL is the digital voltage value Vdo and the amplification factor αo.
A load current IL is obtained by providing a RAM having three types of current tables corresponding to ff, α10on, and αon, determining the RAM address by the digital voltage value Vdo and the amplification factor, and reading the contents stored in the RAM by the address. May be. As a result, the processing time is shortened as compared with the above example.
【0028】又、増幅器12の出力電圧が所定値以上の
場合、増幅率αを低下させるのは、演算増幅素子6aを
飽和させることなく動作させて、線形性を維持するため
であり、更に、A/D変換器15の分解能を上げるため
である。即ち、A/D変換器15のビット数を多くして
も入力電圧を低いレベルで動作させると分解能を上げる
ことができないためである。線形性の維持によってモー
タ1の負荷電流が正常に検出できる。Further, when the output voltage of the amplifier 12 is equal to or higher than a predetermined value, the reason why the amplification factor α is decreased is to operate the operational amplification element 6a without saturating it and maintain the linearity. This is to increase the resolution of the A / D converter 15. That is, even if the number of bits of the A / D converter 15 is increased, the resolution cannot be increased if the input voltage is operated at a low level. The load current of the motor 1 can be normally detected by maintaining the linearity.
【0029】更に、予め、モータ1の運転時に対応する
電流に相当する増幅器12の増幅率を設定してかかる増
幅率に最も近い増幅率を選定する。該選定に基づいてス
イッチ10、11の初期におけるスイッチのオンオフ状
態を設定する。従って、スイッチ10、11の設定を省
くことができる。Further, the amplification factor of the amplifier 12 corresponding to the current corresponding to the operation of the motor 1 is set in advance and the amplification factor closest to the amplification factor is selected. Based on the selection, the on / off states of the switches 10 and 11 in the initial stage are set. Therefore, the settings of the switches 10 and 11 can be omitted.
【0030】今、S相が欠相した場合の動作を説明す
る。かかる場合、RとT端子間に単相交流電圧が印加さ
れたことと同じであり、R相とT相の電流値と位相は同
一となる。従って、変流器2a、2cの検出電流をIL
とすると、抵抗5の両端電圧は、0〜πの区間ではVr5
=KcR5ILsinθとなり、増幅器12の出力電圧Vo12
はαVr5となる。即ち、図3(a)の如く単相全波波形と
なる。Vr5を増幅器12によって増幅して三相平衡時と
同様に図2のフローチャートのステップ101〜108
を実行する。直流発生器18の出力は図3(c)に示すよ
うになるので比較回路17の出力波形は図3(d)に示す
ようになり、該出力電圧の値からオンオフ時間比K2=
Ton/Toffを演算してK2が∞であるか判断する(ステ
ップ109)。欠相の場合、オンオフ時間比K2は∞で
ないので直流発生器18の出力電圧をマイコン16の指
令によって低下させ、再度、オンオフ時間比K2が∞で
あるかを判断する(ステップ110a)。オンオフ時間
比K2が∞となっていると不平衡であると判定する(ステ
ップ113)。不平衡の場合、図4(b)に示すように直流
発生器18の出力電圧Vdcを低下させ、増幅器12の出
力電圧Vo12はVo12>Vdcとなり、オンオフ時間比K2
が∞となるからである。オンオフ時間比K2が∞でなけ
れば、欠相状態と判定する(ステップ112)。Now, the operation when the S phase is lost will be described. In such a case, this is the same as applying a single-phase AC voltage between the R and T terminals, and the R-phase and T-phase current values and phases are the same. Therefore, the detected current of the current transformers 2a and 2c is IL
Then, the voltage across resistor 5 is Vr5 in the interval of 0 to π.
= KcR5ILsinθ, and the output voltage Vo12 of the amplifier 12
Becomes αVr5. That is, it becomes a single-phase full-wave waveform as shown in FIG. Vr5 is amplified by the amplifier 12, and steps 101 to 108 in the flowchart of FIG.
To execute. Since the output of the DC generator 18 is as shown in FIG. 3 (c), the output waveform of the comparison circuit 17 is as shown in FIG. 3 (d). From the value of the output voltage, the on / off time ratio K2 =
Ton / Toff is calculated to determine whether K2 is ∞ (step 109). In the case of the phase loss, the on / off time ratio K2 is not ∞, so the output voltage of the DC generator 18 is reduced by the command of the microcomputer 16 and it is again determined whether the on / off time ratio K2 is ∞ (step 110a). When the on / off time ratio K2 is ∞, it is determined that there is an imbalance (step 113). In the case of unbalance, as shown in FIG. 4B, the output voltage Vdc of the DC generator 18 is lowered, the output voltage Vo12 of the amplifier 12 becomes Vo12> Vdc, and the on / off time ratio K2
Because is ∞. If the on / off time ratio K2 is not ∞, it is determined that the phase is open (step 112).
【0031】不平衡電流が流れている場合について説明
する。図4(a)に不平衡電流の各相波形を示し、図4(b)
に抵抗5の両端電圧Vr5を示す。両端電圧Vr5を増幅器
によって増幅して三相平衡時と同様に図2のフローチャ
ートのステップ101〜108を実行する。マイコン1
6は、比較回路17の出力の値からオンオフ時間比K2
=Ton/Toffを演算してK2が∞であるか判断する(ス
テップ109)。次に、K2が∞でなければ、K2が一定
値か否かを判断し(ステップ110)、不平衡電流が流れ
ている場合、、Ton/Toffを測定すると不規則な値と
なる。従って、不平衡電流と判定する(ステップ11
3)。A case where an unbalanced current is flowing will be described. Fig. 4 (a) shows the waveform of each phase of the unbalanced current, and Fig. 4 (b)
Shows the voltage Vr5 across the resistor 5. The both-end voltage Vr5 is amplified by the amplifier, and steps 101 to 108 in the flowchart of FIG. 2 are executed as in the three-phase balanced state. Microcomputer 1
6 is the on / off time ratio K2 based on the output value of the comparison circuit 17.
= Ton / Toff is calculated to determine whether K2 is ∞ (step 109). Next, if K2 is not ∞, it is determined whether K2 is a constant value (step 110). If an unbalanced current is flowing, Ton / Toff will be an irregular value. Therefore, it is determined as an unbalanced current (step 11
3).
【0032】実施例2.実施例2は、増幅器12の出力
電圧Vo12をアナログ回路で判定して増幅器12の増幅
率αを変更するものである。図5において、電圧検出器
37、47は以下の構成となっている。31、41は電
圧検出器を構成する演算増幅素子、32、33は演算増
幅素子31の比較基準電圧Vpc3を決定する抵抗であ
り、42、43は演算増幅素子41の基準電圧Vpc4を
決定する抵抗であり、34、44はそれぞれトランジス
タ36、46のベースに電流を流す抵抗である。又、常
開接点10bは増幅器12の出力端に一端が接続され、
他端が演算増幅素子41の反転端子に接続されている。
比較基準電圧Vpc3、Vpc4は、それぞれ抵抗32、3
3、42、43の抵抗値をR32、R33、R42、R43とす
るとVpc3={R33/(R32+R33)}Vc、Vpc4={R43
/(R42+R43)}Vcとなる。なお、Vcはアナログ回路
の電源電圧である。Example 2. In the second embodiment, the output voltage Vo12 of the amplifier 12 is judged by an analog circuit and the amplification factor α of the amplifier 12 is changed. In FIG. 5, the voltage detectors 37 and 47 have the following configurations. Reference numerals 31 and 41 are operational amplifier elements that constitute the voltage detector, 32 and 33 are resistors that determine the comparison reference voltage Vpc3 of the operational amplifier element 31, and 42 and 43 are resistors that determine the reference voltage Vpc4 of the operational amplifier element 41. And 34 and 44 are resistors for supplying current to the bases of the transistors 36 and 46, respectively. One end of the normally open contact 10b is connected to the output end of the amplifier 12,
The other end is connected to the inverting terminal of the operational amplification element 41.
The comparison reference voltages Vpc3 and Vpc4 are the resistances 32 and 3, respectively.
If the resistance values of 3, 42, and 43 are R32, R33, R42, and R43, Vpc3 = {R33 / (R32 + R33)} Vc, Vpc4 = {R43
/ (R42 + R43)} Vc. Note that Vc is the power supply voltage of the analog circuit.
【0033】次に、以上のように構成された装置の動作
を説明する。以下の点を除き、実施例1とほぼ同一であ
る。モータ1に負荷電流が流れると抵抗5に電圧Vr5を
発生し、増幅器12によってαVr5なる出力電圧が発生
する。まず、αVr5>Vpc3であれば、電圧検出器37
が動作してリードリレー10を付勢する。従って、常開
接点10a、10bが閉成され、増幅器12の増幅率を
α10onに低下させる。更に、電圧検出器47ではVo12
>Vpc4であれば、リードリレー11を付勢して常開接
点11aを閉成して増幅器12の増幅率をαonに低下さ
せる。その後は図6に示すフローチャートに従って実施
例1とほぼ同様な動作をする。従って、リードリレー1
1の動作の判断を実施例1ではマイコン内のソフト的に
処理していたものを本実施例ではアナログ回路による電
圧検出器37、47によって処理した点が異なる。従っ
て、実施例1の回路よりもさらに高速処理が可能であ
る。Next, the operation of the apparatus configured as described above will be described. It is almost the same as the first embodiment except for the following points. When a load current flows through the motor 1, a voltage Vr5 is generated in the resistor 5, and an output voltage of αVr5 is generated by the amplifier 12. First, if αVr5> Vpc3, the voltage detector 37
Operates to energize the reed relay 10. Therefore, the normally open contacts 10a, 10b are closed, and the amplification factor of the amplifier 12 is reduced to α10on. Furthermore, in the voltage detector 47, Vo12
If> Vpc4, the reed relay 11 is energized to close the normally open contact 11a to reduce the amplification factor of the amplifier 12 to αon. After that, almost the same operation as that of the first embodiment is performed according to the flowchart shown in FIG. Therefore, the reed relay 1
The difference in that the judgment of the operation of No. 1 is processed by software in the microcomputer in the first embodiment, but is processed by the voltage detectors 37 and 47 by analog circuits in the present embodiment. Therefore, higher speed processing is possible than the circuit of the first embodiment.
【0034】実施例3.三相半波整流回路を用いる実施
例について説明する。実施例1と異なる点は三相全波整
流回路を三相半波整流回路に変更されている点を除き他
は同一の構成である。上記のように構成されている実施
例3の動作を図7、図8を参照しながら説明する。図8
のステップ101〜108までは、実施例1とほぼ同一
である。ここで、三相平衡電流が流れている場合、増幅
器12の出力電圧は図7(a)に示すようになり、比較回
路19の出力波形は図7(d)となり、オンオフ時間比K2
が一定か判断する(ステップ109a)。一定であれば、
実施例1とほぼ同様にステップ111、115を実行す
る。又、S相が欠相している場合、増幅器12の出力電
圧は図7(c)に示すようになり、比較回路19の出力は
図7(f)となりオンオフ時間比K2が一定か判断する(ス
テップ109a)。上記よりオンオフ時間比K2は一定で
ないため、比較回路19の出力が一周期の間に2パルス
発生しているか判断する(ステップ110a)。欠相の場
合は、一周期の間に2パルス発生するので、欠相と判定
する(ステップ112)。更に、不平衡電流が流れている
場合、増幅器12の出力電圧は図7(b)に示すようにな
り、比較回路19の出力は図7(e)となりオンオフ時間
比K2が一定か判断する(ステップ109a)。上記より
オンオフ時間比K2は一定でないため、比較回路19の
出力が一周期の間に2パルス発生しているか判断する
(ステップ110a)。この結果、一周期の間に3パルス
発生しているので、不平衡電流が流れていると判定する
(ステップ113)。Example 3. An embodiment using a three-phase half-wave rectifier circuit will be described. The difference from the first embodiment is the same configuration except that the three-phase full-wave rectifier circuit is changed to a three-phase half-wave rectifier circuit. The operation of the third embodiment configured as described above will be described with reference to FIGS. 7 and 8. Figure 8
The steps 101 to 108 are substantially the same as those in the first embodiment. Here, when a three-phase balanced current is flowing, the output voltage of the amplifier 12 becomes as shown in FIG. 7 (a), the output waveform of the comparison circuit 19 becomes as shown in FIG. 7 (d), and the on / off time ratio K2
Is determined to be constant (step 109a). If constant,
Steps 111 and 115 are executed almost in the same manner as in the first embodiment. When the S phase is missing, the output voltage of the amplifier 12 becomes as shown in FIG. 7 (c), the output of the comparison circuit 19 becomes as shown in FIG. 7 (f), and it is determined whether the on / off time ratio K2 is constant. (Step 109a). From the above, the on / off time ratio K2 is not constant, so it is determined whether the output of the comparison circuit 19 has generated two pulses in one cycle (step 110a). In the case of the phase loss, two pulses are generated in one cycle, so it is determined that the phase is missing (step 112). Further, when an unbalanced current is flowing, the output voltage of the amplifier 12 becomes as shown in FIG. 7 (b), the output of the comparison circuit 19 becomes as shown in FIG. 7 (e), and it is judged whether the on / off time ratio K2 is constant ( Step 109a). From the above, the on / off time ratio K2 is not constant, so it is determined whether the output of the comparison circuit 19 has generated two pulses in one cycle.
(Step 110a). As a result, three pulses are generated in one cycle, so it is determined that an unbalanced current is flowing.
(Step 113).
【0035】なお、本発明は前記実施例の構成に限定さ
れず、発明の趣旨から逸脱しない範囲で適宜変更して具
体化することもできる。 (1)、増幅器、A/D変換器、直流発生器、比較回路
は、ハードウェア構成として説明したが、同等の機能を
有するソフトウェア構成にしても良い。 (2)、演算増幅器12を正転アンプとして用いたが反転
アンプとして構成できる。又、直流増幅器であればよ
く、例えば、平衡形直結増幅回路でもよい。 (3)、変流器をスター結線として用いたがV結線として
もよい。The present invention is not limited to the configuration of the above-mentioned embodiment, and can be embodied by appropriately changing it without departing from the spirit of the invention. Although (1), the amplifier, the A / D converter, the DC generator, and the comparison circuit have been described as having a hardware configuration, they may have a software configuration having equivalent functions. (2) Although the operational amplifier 12 is used as the non-inverting amplifier, it can be configured as an inverting amplifier. Further, it may be a DC amplifier, for example, a balanced direct-coupled amplifier circuit. (3) Although the current transformer is used as the star connection, it may be V connection.
【0036】[0036]
【発明の効果】第1の発明は、変流器の2次側電流を三
相全波整流する三相全波整流回路と、該整流回路の出力
電圧を増幅する増幅器と、増幅器の出力電圧をディジタ
ル変換するA/D変換手段と、A/D変換手段の出力電
圧値に応じて増幅器の増幅率を変更する増幅率変更手段
と、上記変換手段の出力電圧値に応じて直流電圧を発生
する直流発生手段と、上記増幅器の出力電圧と直流発生
器の出力電圧を比較する比較手段とを備え、上記比較手
段の出力波形によって上記三相負荷に流れる異常電流を
判定したので、負荷電流が変流器の1次側定格電流より
も相当低いときでも負荷電流の欠相及び不平衡を精度良
く検出できる効果が得られる。According to the first aspect of the present invention, a three-phase full-wave rectifying circuit for three-phase full-wave rectifying secondary current of a current transformer, an amplifier for amplifying an output voltage of the rectifying circuit, and an output voltage of the amplifier. A / D conversion means for digitally converting the signal, an amplification factor changing means for changing the amplification factor of the amplifier according to the output voltage value of the A / D conversion means, and a DC voltage is generated according to the output voltage value of the conversion means. The direct current generating means and the comparing means for comparing the output voltage of the amplifier and the output voltage of the direct current generator are provided, and the abnormal current flowing in the three-phase load is determined by the output waveform of the comparing means. Even when the current is considerably lower than the rated current of the primary side of the current transformer, it is possible to obtain the effect of accurately detecting the open phase and unbalance of the load current.
【0037】第2の発明は、変流器の2次側電流を三相
半波整流する三相半波整流回路と、該整流回路の出力電
圧を増幅する増幅手段と、A/D変換手段の出力電圧値
に応じて増幅器の増幅率を変更する増幅率変更手段と、
上記変換手段の出力電圧値に応じて直流電圧を発生する
直流発生手段と、上記増幅手段の出力電圧と直流発生手
段の出力電圧を比較する比較手段とを備え、上記比較手
段の出力波形によって上記三相負荷に流れる異常電流を
判定したので、簡易に負荷電流の欠相及び不平衡を精度
良く検出できる効果が得られる。A second aspect of the invention is a three-phase half-wave rectifying circuit for rectifying the secondary side current of a current transformer into a three-phase half-wave, an amplifying means for amplifying an output voltage of the rectifying circuit, and an A / D converting means. Amplification factor changing means for changing the amplification factor of the amplifier according to the output voltage value of
The direct current generating means for generating a direct current voltage according to the output voltage value of the converting means and the comparing means for comparing the output voltage of the amplifying means with the output voltage of the direct current generating means are provided, and the output waveform of the comparing means is used for the above. Since the abnormal current flowing through the three-phase load is determined, it is possible to obtain the effect of easily detecting the open phase and unbalance of the load current with high accuracy.
【0038】第3の発明は、変流器の2次側電流を三相
全波整流する三相全波整流回路と、三相全波整流回路の
出力電圧を増幅する増幅手段と、増幅器の出力電圧をデ
ィジタル変換するA/D変換手段と、A/D変換手段の
出力電圧値が所定値以上であることを検出する電圧検出
手段と、電圧検出手段の動作によって増幅器の増幅率を
変更する増幅率変更手段と、変換器の出力電圧値に応じ
て直流電圧を発生する直流発生手段と、演算増幅手段の
出力電圧と直流発生器の出力電圧を比較する比較手段と
を備え、上記比較手段の出力波形によって上記三相負荷
に流れる異常電流を判定したので、負荷電流の欠相及び
不平衡を高速に検出できる効果が得られる。A third aspect of the present invention is a three-phase full-wave rectifying circuit for three-phase full-wave rectifying secondary current of a current transformer, an amplifying means for amplifying an output voltage of the three-phase full-wave rectifying circuit, and an amplifier. A / D conversion means for digitally converting the output voltage, voltage detection means for detecting that the output voltage value of the A / D conversion means is a predetermined value or more, and the amplification factor of the amplifier is changed by the operation of the voltage detection means. The comparison means includes an amplification factor changing means, a direct current generating means for generating a direct current voltage according to an output voltage value of the converter, and a comparing means for comparing the output voltage of the operational amplifying means with the output voltage of the direct current generator. Since the abnormal current flowing in the three-phase load is determined by the output waveform of, the effect that the open phase and the imbalance of the load current can be detected at high speed can be obtained.
【0039】第4の発明は、変流器の2次側電流を三相
全波整流する三相全波整流回路と、三相全波整流回路の
出力電圧を増幅する増幅手段と、上記増幅手段の出力電
圧をディジタル変換するA/D変換手段と、上記A/D
変換手段の出力電圧値に応じて上記増幅器の増幅率を変
更する増幅率変更手段とを備え、上記A/D変換器の出
力から上記三相負荷に流れる電流を演算したので、負荷
電流の欠相及び不平衡を検出しつつ容易に負荷電流の値
を同時に検出できる効果が得られる。A fourth aspect of the present invention is a three-phase full-wave rectifying circuit for three-phase full-wave rectifying secondary current of a current transformer, an amplifying means for amplifying an output voltage of the three-phase full-wave rectifying circuit, and the amplifying device. A / D conversion means for digitally converting the output voltage of the means, and the above A / D
A gain changing means for changing the amplification factor of the amplifier according to the output voltage value of the converting means is provided, and the current flowing to the three-phase load from the output of the A / D converter is calculated. The effect that the value of the load current can be easily detected simultaneously while detecting the phase and the imbalance is obtained.
【図1】この発明の全体回路図を示す。FIG. 1 shows an overall circuit diagram of the present invention.
【図2】この発明のフローチャートを示す。FIG. 2 shows a flow chart of the present invention.
【図3】この発明の各部電圧波形を示す図である。FIG. 3 is a diagram showing voltage waveforms at various portions according to the present invention.
【図4】この発明の不平衡電流時の各部電圧波形を示す
図である。FIG. 4 is a diagram showing voltage waveforms at various portions during an unbalanced current according to the present invention.
【図5】この発明の他の実施例に全体回路図を示す。FIG. 5 shows an overall circuit diagram of another embodiment of the present invention.
【図6】この発明の他の実施例に各部電圧波形を示す図
である。FIG. 6 is a diagram showing voltage waveforms at various portions in another embodiment of the present invention.
【図7】この発明の他の実施例のフローチャートを示
す。FIG. 7 shows a flowchart of another embodiment of the present invention.
【図8】この発明の他の実施例のフローチャートを示
す。FIG. 8 shows a flowchart of another embodiment of the present invention.
【図9】従来の全体回路図を示す。FIG. 9 shows a conventional overall circuit diagram.
【図10】従来の各部電圧波形を示す図である。FIG. 10 is a diagram showing a conventional voltage waveform of each part.
1 三相負荷 2a,2b,2c 変流器 4 三相全波整流回路 12 増幅器 15 A/D変換器 18 直流発生器 19 比較回路 37,47 電圧検出器 1 Three-phase load 2a, 2b, 2c Current transformer 4 Three-phase full-wave rectifier circuit 12 Amplifier 15 A / D converter 18 DC generator 19 Comparison circuit 37, 47 Voltage detector
Claims (4)
電流を変流器により検出する三相負荷の異常電流検出装
置において、上記変流器の2次側電流を三相全波整流す
る三相全波整流回路と、三相全波整流回路の出力電圧を
増幅する増幅手段と、上記増幅器の出力電圧をディジタ
ル変換するA/D変換手段と、上記A/D変換手段の出
力電圧値に応じて上記増幅器の増幅率を変更する増幅率
変更手段と、上記変換手段の出力電圧値に応じて直流電
圧を発生する直流発生手段と、上記増幅手段の出力電圧
と直流発生手段の出力電圧を比較する比較手段とを備
え、上記比較手段の出力波形によって上記三相負荷に流
れる異常電流を判定することを特徴とする三相負荷の異
常電流検出装置。1. A three-phase load abnormal current detection device for detecting an abnormal current flowing from a three-phase AC power supply to a three-phase load by a current transformer, wherein the secondary side current of the current transformer is three-phase full-wave rectified. Three-phase full-wave rectification circuit, amplification means for amplifying the output voltage of the three-phase full-wave rectification circuit, A / D conversion means for digitally converting the output voltage of the amplifier, and output voltage value of the A / D conversion means. Amplification factor changing means for changing the amplification factor of the amplifier according to the above, DC generating means for generating a DC voltage according to the output voltage value of the converting means, output voltage of the amplifying means and output voltage of the DC generating means An abnormal current detection device for a three-phase load, comprising: an abnormal current flowing through the three-phase load based on an output waveform of the comparison means.
電流を変流器により検出する三相負荷の異常電流検出装
置において、上記変流器の2次側電流を三相半波整流す
る三相半波整流回路と、三相半波整流回路の出力電圧を
増幅する増幅手段と、上記増幅手段の出力電圧をディジ
タル変換するA/D変換手段と、上記A/D変換手段の
出力電圧値に応じて上記増幅手段の増幅率を変更する増
幅率変更手段と、上記A/D変換手段の出力電圧値に応
じて直流電圧を発生する直流発生手段と、上記増幅手段
の出力電圧と直流発生手段の出力電圧を比較する比較手
段とを備え、上記比較手段の出力波形によって上記三相
負荷に流れる異常電流を判定することを特徴とする三相
負荷の異常電流検出装置。2. A three-phase load abnormal current detecting device for detecting an abnormal current flowing from a three-phase AC power source to a three-phase load by a current transformer, wherein the secondary side current of the current transformer is three-phase half-wave rectified. Three-phase half-wave rectifier circuit, amplification means for amplifying output voltage of the three-phase half-wave rectification circuit, A / D conversion means for digitally converting output voltage of the amplification means, and output voltage of the A / D conversion means Amplification factor changing means for changing the amplification factor of the amplifying means according to a value, DC generating means for generating a DC voltage according to the output voltage value of the A / D converting means, output voltage of the amplifying means and DC An abnormal current detecting device for a three-phase load, comprising: comparing means for comparing output voltages of the generating means; and determining an abnormal current flowing through the three-phase load based on an output waveform of the comparing means.
電流を変流器により検出する三相負荷の異常電流検出装
置において、上記変流器の2次側電流を三相全波整流す
る三相全波整流回路と、三相全波整流回路の出力電圧を
増幅する増幅手段と、上記増幅器の出力電圧をディジタ
ル変換するA/D変換手段と、上記A/D変換手段の出
力電圧値が所定値以上であることを検出する電圧検出手
段と、上記電圧検出手段の動作によって上記増幅手段の
増幅率を変更する増幅率変更手段と、上記変換手段の出
力電圧値に応じて直流電圧を発生する直流発生手段と、
上記増幅手段の出力電圧と直流発生手段の出力電圧を比
較する比較手段とを備え、上記比較手段の出力波形によ
って上記三相負荷に流れる異常電流を判定することを特
徴とする三相負荷の異常電流検出装置。3. A three-phase load abnormal current detection device for detecting an abnormal current flowing from a three-phase AC power supply to a three-phase load by a current transformer, wherein the secondary side current of the current transformer is three-phase full-wave rectified. Three-phase full-wave rectification circuit, amplification means for amplifying the output voltage of the three-phase full-wave rectification circuit, A / D conversion means for digitally converting the output voltage of the amplifier, and output voltage value of the A / D conversion means. Is a predetermined value or more, a voltage detecting means for detecting that the amplification factor of the amplifying means is changed by the operation of the voltage detecting means, and a DC voltage according to the output voltage value of the converting means. Direct current generating means,
An abnormality of the three-phase load, comprising: a comparing means for comparing the output voltage of the amplifying means and the output voltage of the direct current generating means, and determining an abnormal current flowing in the three-phase load based on the output waveform of the comparing means. Current detection device.
電流を変流器により検出する三相負荷の異常電流検出装
置において、上記変流器の2次側電流を三相全波整流す
る三相全波整流回路と、三相全波整流回路の出力電圧を
増幅する増幅手段と、上記増幅手段の出力電圧をディジ
タル変換するA/D変換手段と、上記A/D変換手段の
出力電圧値に応じて上記増幅手段の増幅率を変更する増
幅率変更手段とを備え、上記A/D変換手段の出力から
上記三相負荷に流れる電流を演算することを特徴とする
三相負荷の異常電流検出装置。4. A three-phase load abnormal current detection device for detecting an abnormal current flowing from a three-phase AC power supply to a three-phase load by a current transformer, wherein the secondary side current of the current transformer is three-phase full-wave rectified. Three-phase full-wave rectification circuit, amplification means for amplifying the output voltage of the three-phase full-wave rectification circuit, A / D conversion means for digitally converting the output voltage of the amplification means, and output voltage of the A / D conversion means. An abnormality of a three-phase load, comprising: an amplification factor changing unit that changes the amplification factor of the amplification unit according to a value, and calculating a current flowing from the output of the A / D conversion unit to the three-phase load. Current detection device.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP05279594A JP3111780B2 (en) | 1993-11-09 | 1993-11-09 | Abnormal current detector for three-phase load |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP05279594A JP3111780B2 (en) | 1993-11-09 | 1993-11-09 | Abnormal current detector for three-phase load |
Publications (2)
Publication Number | Publication Date |
---|---|
JPH07134154A true JPH07134154A (en) | 1995-05-23 |
JP3111780B2 JP3111780B2 (en) | 2000-11-27 |
Family
ID=17613166
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Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP05279594A Expired - Fee Related JP3111780B2 (en) | 1993-11-09 | 1993-11-09 | Abnormal current detector for three-phase load |
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Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100335136B1 (en) * | 2000-01-31 | 2002-05-04 | 이종수 | Apparatus of signal transformation |
KR100335137B1 (en) * | 2000-02-01 | 2002-05-04 | 이종수 | Device for detecting signal |
EP1471359A4 (en) * | 2002-01-30 | 2010-08-11 | Bridgestone Corp | Measured value output device, measured value monitor, current value output device, and current monitor |
CN109507491A (en) * | 2018-10-19 | 2019-03-22 | 陕西航空电气有限责任公司 | Three-phase inverter voltage phase sequence detection circuit, device and method |
CN112067912A (en) * | 2020-09-10 | 2020-12-11 | 上海辛格林纳新时达电机有限公司 | Method for detecting phase loss, electronic device and storage medium |
-
1993
- 1993-11-09 JP JP05279594A patent/JP3111780B2/en not_active Expired - Fee Related
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100335136B1 (en) * | 2000-01-31 | 2002-05-04 | 이종수 | Apparatus of signal transformation |
KR100335137B1 (en) * | 2000-02-01 | 2002-05-04 | 이종수 | Device for detecting signal |
EP1471359A4 (en) * | 2002-01-30 | 2010-08-11 | Bridgestone Corp | Measured value output device, measured value monitor, current value output device, and current monitor |
CN109507491A (en) * | 2018-10-19 | 2019-03-22 | 陕西航空电气有限责任公司 | Three-phase inverter voltage phase sequence detection circuit, device and method |
CN112067912A (en) * | 2020-09-10 | 2020-12-11 | 上海辛格林纳新时达电机有限公司 | Method for detecting phase loss, electronic device and storage medium |
Also Published As
Publication number | Publication date |
---|---|
JP3111780B2 (en) | 2000-11-27 |
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