JPH07115664A - High efficiency coding/decoding device - Google Patents

Abstract

PURPOSE:To prepare easily visible video images whose degradation is hardly detected by the eyes of humans while suppressing the increase of the information amount of the entire video images by giving weight corresponding to brightness and darkness and changing the quantization of inputted digital video signals. CONSTITUTION:The video signals inputted from an input terminal 1 are blocked into the blocks of 8 picture elements X8 lines for instance in a block shuffling circuit 2 and shuffling is performed by the unit of the blocks or the unit of macroblocks constituted of the plural blocks. Signals outputted from the circuit 2 are inputted to a converter I 11 and the converter I 11 outputs the luminance signals of 9 bits and the chrominance signals of 8 bats as they are. The signals are inputted to a DCT circuit II 12 subjected to discrete cosine transformation and turned to DCT coefficients. The DCT coefficients are inputted to a control circuit 4 and a quantization circuit 5 and the circuit 4 controls the quantization circuit 5 so as to perform the quantization with a prescribed block number. Data for which the DCT coefficients quantized in the circuit 5 are variable- length encoded in an encoding circuit 6 are stored in a buffer memory I 7 and outputted from an output terminal. 8 at a fixed rate.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a digital signal recording / reproducing apparatus such as a video tape recorder (hereinafter abbreviated as VTR) for digitally recording and reproducing a video signal and an audio signal, and a digital signal recording / reproducing apparatus for orthogonal transformation. The present invention relates to a device for changing the quantization step of the input digital video signal before the high efficiency coding means such as.

[0002]

2. Description of the Related Art FIG. 15 is a simple block diagram of a consumer digital VTR. Reference numeral 200 denotes an input terminal for inputting an analog video signal such as a television signal,
Reference numeral 201 is an A / D converter for converting an analog video signal into a digital video signal, 202 is a data compression unit for compressing the information amount of the digital video signal to reduce the information amount (code amount), and 203 is an error correction during reproduction. An error correction coding unit that adds an error correction code so that it can be performed, a recording modulation unit 204 that modulates the signal to a code suitable for recording the signal, a recording amplifier 205 that amplifies the recording signal, and a recording signal 206 that records the recording signal. , Is a magnetic tape that accumulates.

Reference numeral 207 is a head amplifier for amplifying a reproduction signal reproduced from the magnetic tape 206, 208 is a reproduction demodulation unit for demodulating the reproduction signal, and 209 is error correction using an error correction code added on the recording side. Error correction decoding unit,
Reference numeral 210 is a data decompression unit that restores the compressed data to the original form, 211 is a D / A converter that converts a digital video signal into an analog video signal, and 212 is an output terminal.

Next, the data compression unit (high efficiency coding device) 202 will be described. FIG. 16 shows a block diagram of a high-efficiency coding apparatus by intra-frame high-efficiency coding.
Reference numeral 1 is a video input terminal, 2 is a blocking shuffling circuit for blocking an input video signal, and shuffling is performed in a predetermined pattern, and 3 is a DCT circuit I for performing discrete cosine transform on the blocked signal.

4 is the DCT output from the DCT circuit I3
A code amount control circuit 5 which estimates an actual code amount from the coefficient and determines a quantization step that achieves a target code amount, actually quantizes the DCT coefficient based on the result of the code amount control circuit 4, and quantizes it. A variable-length coding circuit for variable-length coding the output of the quantizing circuit 5, and 7 for arranging the variable-length coded by the variable-length coding circuit 6 in a predetermined order.
The buffer memories I and 8 for packing and accumulating are output terminals for outputting a code coded with high efficiency.

Next, the operation of FIG. 16 will be described. The input digital video signal input from the input terminal 1 is input to the blocking shuffling circuit 2. In the blocking shuffling circuit 2, a signal input in the form of a raster signal is stored in a memory for each luminance signal and color difference signal (RY, BY) and is blocked for every 8 pixels x 8 lines, for example, and is stored in advance. It is shuffled and output in a predetermined pattern. At this time, a plurality of blocks of luminance signals and color difference signals corresponding to the same position on the screen may be combined into a macro block, and shuffling may be executed in macro block units.

The data output from the blocking shuffling circuit 2 is input to the DCT circuit I3 and, for example, 2
Dimensional Discrete Cosine Transform (DCT) is applied. Also, D
After CT, zigzag scanning is performed in the order shown in FIG. 17 with the direct current value at the beginning, and output from the DCT circuit I3.

The DCT coefficient output from the DCT circuit I3 is input to the quantization circuit 5 together with the code amount control circuit 4. In the code amount control circuit 4, the input DCT coefficient is actually quantized by a finite number of kinds of quantization steps, a quantization step that achieves a desired code amount is selected, and the quantization is actually performed by the selected quantization step. The quantization circuit 5 is controlled so that the quantization is performed. In addition, the determination of the quantization step at this time may include a plurality of quantization steps in the block. Further, it may be determined for each predetermined number of blocks.

In the quantizing circuit 5, the DCT circuits I3 to D
The CT coefficient is input, a signal instructing the quantization step of the coefficient is input from the code amount control circuit 4, and the DCT coefficient is quantized in the quantization step. At this time, among the DCT coefficients, the low-frequency coefficient is more noticeable than the high-frequency coefficient even with the same distortion, so the quantization step is set small, and the quantization step is set large for the high-frequency coefficient. I do. This utilizes one of the human visual characteristics.

The data quantized by the quantization circuit 5 is input to the variable length coding circuit 6. The variable-length coding circuit 6 performs variable-length coding on the AC component of the quantized DCT coefficient and fixed-length coding on the DC component. Variable length coding is performed by using a Huffman code, for example, and assigns a preset short code to data that frequently appears and assigns a preset long code to data that does not. It

The variable length coded data by the variable length coding circuit 6 is accumulated in the buffer memory I7. In the buffer memory I7, the variable-length codewords are packed in a predetermined order in a preset form and output to the output terminal 8.

[0012]

With the above-mentioned configuration, it is merely utilized that it is difficult for the human visual characteristics to recognize the deterioration in the high frequency range, and the difference in the recognition of the deterioration in the bright and dark parts is utilized. Is not used. In addition, there is a problem that human eyes are more likely to perceive deterioration when a dark part continues than when a bright part continues.

The present invention has been made to solve the above problems, and increases the amount of information in the entire image by reducing the quantization step in the dark portion and increasing the quantization step in the bright portion. (EN) A high-efficiency coding device that suppresses the noise as much as possible and that deterioration is hardly perceived.

[0014]

According to a first aspect of the present invention, there is provided a high efficiency coding apparatus which divides an input dynamic range of a luminance signal in an input digital video signal into n (n segments: n is 2 or more). A natural number), and at the end points of adjacent segments, the input signal is converted by a k-th order conversion equation (k is a natural number) so that the input signal is uniquely determined within the segment. k
The conversion is performed by the following conversion formula.

The high-efficiency coding apparatus according to the second aspect of the present invention is different for each segment so that a smaller luminance signal has a smaller quantization step than a larger luminance signal. The conversion is performed by the k-th order conversion formula.

In the high-efficiency coding apparatus according to the third aspect of the present invention, k1 for each segment is such that the smaller the magnitude of the luminance signal, the smaller the quantization step than the larger the magnitude of the luminance signal. A conversion equation of a different degree is applied to each segment, such as a conversion equation of k1 order for a segment, a conversion equation of k2 order for a k2 segment, and a conversion equation of ki order for a ki order segment. It is a thing.

According to a fourth aspect of the present invention, there is provided a high-efficiency coding device which divides the input dynamic range of color difference signals (RY, BY) into m1 and m2 divisions (m1 segment and m2), respectively.
Segments: m1 and m2 are natural numbers of 2 or more), and k is set so that the end points of adjacent segments are continuous with the input signal.
The color difference signals are converted by the following conversion formulas, and in addition, the input in one segment is independently converted into the color difference signals by the kth-order conversion formula that is uniquely determined in the segment.

The high-efficiency encoding apparatus according to the fifth aspect of the present invention is such that each of the divided segments is converted by a conversion equation having a different order according to the magnitude of the input signal. .

According to the sixth aspect of the present invention, there is provided a high-efficiency coding apparatus which detects a magnitude of a luminance signal in an input digital video signal and includes many signals whose magnitude is smaller than a predetermined threshold value. In one part on the displayed screen, the input of the color difference signal corresponding to the part is converted by the k-th order conversion equation that is uniquely determined.

The high-efficiency coding apparatus according to the seventh aspect of the present invention detects the magnitude of the luminance signal in the input digital video signal, and includes many signals whose magnitude is smaller than a predetermined threshold value. Color difference signals (RY, B-
In Y), one portion on the screen which is detected to contain a large amount of red color is converted by the k-th order conversion equation uniquely determined by the input of the color difference signal corresponding to the portion.

According to another aspect of the present invention, there is provided a high-efficiency decoding apparatus which divides a reproduction input dynamic range of either a luminance signal or a color difference signal (RY, BY) among reproduction digital video signals into m ( m segment: m is a natural number of 2 or more), and a reproduced digital video signal having a size within each segment is subjected to inverse conversion by a k-th conversion formula uniquely determined within that segment by its input, The quantization step of is equivalent to that before high efficiency encoding.

[0022]

By suppressing the increase in the amount of information in the entire image by changing the weight of the quantization of the input digital video signal in the bright and dark parts, and suppressing the deterioration of the dark part, which is easily perceived by human eyes. Prevents distortion from being perceived in the dark.

Further, by independently changing the quantization step of the RY signal and the BY signal, it is possible to prevent the deterioration of red color, which is easily perceived by human eyes.

Further, by detecting the dark part of the luminance signal and changing the quantization step of the color difference signal, the increase in the information amount of the entire image is suppressed, and the deterioration is less perceptible to human eyes.

Further, the red color is detected in advance, and the quantization step is reduced only in the block containing a large amount of red color and the block in the dark area, and the quantization steps in the other portions are increased to control the quantization step more finely. This makes it possible for the human eye to detect the deterioration while suppressing an increase in the amount of information in the entire image.

[0026]

【Example】

Example 1. FIG. 1 shows a block diagram of the present invention. 1, 2, 4 ~
8 is the same as the drawing showing the conventional example. Reference numeral 11 is a non-linear converter I for converting the value of the signal according to the magnitude of the input signal, and 12 is a DCT circuit II for executing the discrete cosine transform on the converted signal.

FIG. 2 shows a block diagram of a non-linear converter I12 which is a constituent element of the present invention. Reference numeral 21 is an input terminal to which a video signal is input, and 22 is Y for identifying a luminance signal or a color difference signal.
/ C signal input terminal. 23 converts the input signal,
ROMI for output, and 24 is an output terminal for outputting the signal of ROMI. In FIG. 2, for example, a signal having an input dynamic range of 8 bits is converted by the ROMI so that the dynamic range becomes 9 bits after conversion. The contents of ROMI at this time are shown as a graph in FIG.

FIG. 4 shows an example of a circuit that achieves inverse non-linear conversion in the decoder when non-linear conversion is performed using the ROMI of FIG. Reference numeral 31 denotes an inverse DCT signal, which is an input terminal for a signal represented by 9 bits.
Reference numeral 32 is a Y / C signal input terminal for discriminating between a luminance signal and a color difference signal, and 33 is a ROMI for performing inverse nonlinear conversion.
Reference numeral 4 is an output terminal for outputting the ROMI data which has been subjected to the inverse nonlinear conversion.

Next, the operation will be described with reference to FIG. The video signal input from the input terminal 1 is blocked by the block shuffling circuit 2 into, for example, a block of 8 pixels × 8 lines, and shuffling in units of this block or in units of macroblocks composed of a plurality of blocks. Is done.

The signal output from the blocking shuffling circuit 2 is input to the non-linear converter I11. Since the input signal is 8 bits, the input to the non-linear converter I11 at this time is also 8 bits. For the non-linear converter I11,
More on this later. The non-linear converter I11 outputs a 9-bit output only for the luminance signal and 8 for the color difference signal.
Output as bits. In this state, the brightness signal 9 bits,
The color difference signal is in the form of 8 bits.

The signal output from the non-linear converter I11 is input to the DCT circuit II12 and discrete cosine transformed into DCT coefficients. The DCT coefficient is rounded to the same number of bits as in the conventional example and output. The output DCT coefficient is input to the code amount control circuit 4 and the quantization circuit 5. At this time, the order in which the coefficients are output is determined by, for example, a zigzag scan as shown in FIG.

The code amount control circuit 4 selects a quantization step size that provides a predetermined code amount with a predetermined number of blocks. The number of blocks may be one block unit, or the code amount control may be performed by grouping a plurality of blocks.
The code amount control circuit 4 selects a quantization step size so that a predetermined code amount is obtained with a predetermined number of blocks, and then controls the quantization circuit 5 so that the quantization is performed with the step size.

The DCT coefficient input to the quantization circuit 5 is
It is quantized and rounded in the quantization step determined by the signal from the code amount control circuit 4.

DC quantized and rounded by the quantization circuit 5.
The T coefficient is variable length coded by the variable length coding circuit 6.
The variable length coding is performed using, for example, a Huffman code. The variable length coding is performed on the AC component of the DCT coefficient, and the DC component is fixed length coding rounded to a predetermined number of bits.

The data variable-length coded by the variable-length coding circuit 6 is accumulated in the buffer memory I7. Since the code amount control circuit 4 is controlled so that the code amount is surely kept within a predetermined range, the data accumulated in the buffer memory I7 is output from the output terminal 8 at a constant transmission rate.

The ROM shown in FIG. 2 has a 9-bit address, and an 8-bit video signal as an input and a signal 1 indicating whether the input signal is a luminance signal or a color difference signal.
A total of 9 bits are used. When the input signal is a color difference signal, the same value as the input value is output, and when the input signal is a luminance signal, it is converted into an output value as shown in the graph of FIG. The conversion shown in the graph of FIG. 3 is expressed by the following equation. Y = 3 × X 0 ≦ X ≦ 85 Y = 2 × X + 85 85 <X ≦ 170 Y = 1 × X + 255 170 <X ≦ 255 X is an input value (8 bits) and Y is an output value (9 bits).

On the decoder side, the inverse conversion is performed using the ROMII as shown in FIG. 4 which has an address of 10 bits as an input and an output of 8 bits. The conversion formula at this time is shown below. X ′ = Y ′ / 3 0 ≦ Y ′ ≦ 255 X ′ = (Y′−170) / 2 255 <Y ′ ≦ 425 X ′ = (Y′−255) / 1 425 <Y ′ ≦ 511 Y ′ is Reproduction input data at the time of reproduction, and X'is pixel data at the time of reproduction.

Example 2. In the first embodiment, the non-linear conversion is performed only on the luminance signal. In the second embodiment, non-linear conversion is performed on the color difference signal as well as the luminance signal in consideration of its characteristics.
The configuration is similar to that of the first embodiment, and the input has a 10-bit address and the output has a 9-bit ROM as shown in FIG.
The second embodiment can be achieved by using III and setting the contents of the ROM III. Reference numeral 41 is an input terminal for inputting a video signal, and 42 is a luminance signal or color difference signal (RY, B-
Y / RB signal input terminal for identifying Y). Reference numeral 43 is a ROMIII for converting and outputting an input signal, and 44 is an output terminal for outputting a signal of the ROMIII.

FIG. 6 shows an example of a circuit that achieves inverse non-linear conversion in the decoder when non-linear conversion is performed using the ROMIII 43 of FIG. Reference numeral 51 denotes an inverse DCT signal, which is an input terminal for a signal represented by 9 bits. Reference numeral 52 is a Y / BR signal input terminal for identifying a luminance signal or a color difference signal (RY, BY). Reference numeral 53 is a ROMIV that performs inverse non-linear conversion, and 54 is an output terminal that outputs the data of the ROMIV that is inverse non-linear conversion.

In the second embodiment, the nonlinear conversion is performed in consideration of the fact that the deterioration caused by the high-efficiency coding is noticeable in the RY signal in the color difference signal and is not noticeable in the BY signal.

The nonlinear conversion for the luminance signal is the same as in the first embodiment. The color difference signal is also 8 bits and is input to the ROM III 43 as shown in FIG. 5 together with 2 bits of the signal for identifying the luminance signal and the color difference signal (RY signal, BY signal).

The content of the ROMIII 43 is the same as that of the first embodiment in the luminance signal, but the conversion formulas of the chrominance signal are different between the RY signal and the BY signal. For example, the BY signal uses the same conversion formula as that used for the luminance signal, but the RY signal performs non-linear conversion by using a conversion formula different from the BY signal, for example, as shown below. Y = X 0 ≦ X ≦ 85 Y = 2 × X−85 85 <X ≦ 170 Y = 3 × X−255 170 <X ≦ 255 X is ROMIII input data and Y is ROMIII output data.

The inverse conversion formula in the decoder when the conversion formula is used is as follows, and it can be constructed by using, for example, the ROMIV53 as shown in FIG. X ′ = Y ′ 0 ≦ Y ′ ≦ 85 X ′ = (Y ′ + 85) / 2 85 <Y ′ ≦ 255 X ′ = (Y ′ + 255) / 3 255 <Y ′ ≦ 511 Y ′ is a reproduction at the time of reproduction Input data, X ', is pixel data at the time of reproduction.

Example 3. In the second embodiment, the luminance signal and the color difference signal are independently nonlinearly converted. In the third embodiment, similar to the first embodiment, the non-linear conversion is performed on the luminance signal, but for the color difference signal, the non-linear conversion is switched according to the brightness of the luminance signal.

FIG. 7 shows a block diagram of the third embodiment. 1,
2, 4 to 8 are the same as the conventional example, and 12 is the same as the first embodiment. Reference numeral 61 is a YCHK circuit that determines whether the luminance signal at a position corresponding to a block of color difference signals is larger or smaller than a predetermined value, and 62 is a non-linear converter II that performs non-linear conversion of the color difference signals based on the result of the YCHK circuit 61. is there.

FIG. 8 shows an example of the configuration of the YCHK circuit 61. Reference numeral 71 is an input terminal to which a luminance signal is input, and 72 is a luminance signal level determination which outputs H (L) when the value of the luminance signal is smaller than a predetermined value and outputs L (H) in the opposite case. Of the outputs of 72, the reference numeral 73 indicates the number of H (L) signals for a predetermined period, for example, while the number of pixels of the color difference signal is 8 pixels × 8 lines (for a NTSC signal of 4: 2: 2, the color difference is A luminance signal for 128 pixels is required to arrange the signals for 64 pixels.), A counter for counting, 74 is a latch for latching the output of the counter 73 in the above-mentioned predetermined period, 75 is a threshold input terminal, and 76 is 74. Comparators I and 77 for comparing the value latched in 1 with the threshold value are output terminals for outputting the result of the comparator I76.

As shown in FIG. 9, a ROMV whose input has an 11-bit address and whose output is 9-bit is used.
The third embodiment can be achieved by setting the contents of MV. Reference numeral 81 is an input terminal for inputting a video signal, and reference numeral 82 is Y / for identifying a luminance signal or a color difference signal (RY, BY).
This is an input terminal for the RB signal. Reference numeral 83 is an input terminal for inputting the result of the YCHK circuit 61. Reference numeral 84 is a ROMV for converting and outputting an input signal, and 85 is an output terminal for outputting a signal of ROMV.

FIG. 10 shows an example of a circuit that achieves inverse non-linear conversion in the decoder when non-linear conversion is performed using the ROMV of FIG. Reference numeral 91 denotes an inverse DCT signal, which is an input terminal for a signal represented by 9 bits.
Reference numeral 92 is a Y / BR signal input terminal for identifying a luminance signal or a color difference signal (RY, BY). Reference numeral 93 is an input terminal for a signal detected by the decoder in the same manner as the YCHK circuit 61, for example. 94 is an RO that performs inverse nonlinear conversion
MVI, and 95 is an output terminal for outputting the ROMVI data that has been subjected to the inverse nonlinear conversion.

First, the operation will be described with reference to FIG. YCH
The K circuit 61 determines the size of each pixel value of the luminance signal corresponding to one block of the color difference signal, and generates a signal that determines whether or not the signal of one block of the color difference signal is subjected to non-linear conversion according to the result. The non-linear converter 62 executes the non-linear conversion for the luminance signal as in the first embodiment, and the non-linear conversion for the color difference signal based on the signal determined by the YCHK circuit 61.

Next, the operation of the YCHK circuit 61 will be described with reference to FIG. The brightness signal input from the input terminal 71 is compared with a predetermined value by the brightness signal level determiner 72, and if the value of the brightness signal is small, H (L) is set. Output. In this way, for example,
The counter 73 counts the above H (L) while the color difference signals for the blocks are aligned, and the number is latched by the latch 74 when the counting for the predetermined period is completed. The signal latched by the latch 74 is compared with the threshold value input from the threshold value input terminal 75 by the comparator I76. If the signal is larger than the threshold value, the color difference signal corresponding to the period of the luminance signal counted from the output terminal 77 is detected. Output a signal instructing the block to perform a non-linear transformation. On the contrary, if the signal is smaller than the threshold value, a signal for instructing not to perform non-linear conversion on the block of the color difference signal corresponding to the period of the luminance signal counted from the output terminal 77 is output.

The non-linear converter 62 can be constructed, for example, as shown in FIG. An 8-bit signal is input to the video signal input terminal 81, and a Y / BR signal is input to the input terminal 82.
The result of the CHK circuit 61 is input. At this time, if it is a luminance signal, non-linear conversion is executed. The nonlinear conversion is also executed when the Y / BR signal indicates the color difference signal and the result of the YCHK circuit 61 instructs to execute the nonlinear conversion. However, the Y / BR signal indicates a color difference signal, and YC
When the result of the HK circuit 61 indicates not to perform the non-linear conversion, the non-linear conversion is not executed for the color difference signal. The nonlinear conversion is represented by the equation shown in the second embodiment, for example.

The inverse non-linear conversion on the decoder side can be executed by the configuration shown in FIG. The inverse DCT data of 9 bits is input to the input terminal 91, and the Y / BR signal indicating the luminance signal or the color difference signal (RY, BY) is input to the input terminal 92. For example, the YCHK circuit 61 and A signal indicating whether or not to execute the inverse nonlinear conversion obtained by the similar method is input to the input terminal 93, and the execution / non-execution of the inverse nonlinear conversion is selected by the ROMVI 94 according to each input signal, and the result is It is output from the output terminal 95.

Example 4. In the third embodiment, the execution of the non-linear conversion of the color difference signal is controlled according to the magnitude of the luminance signal. In order to prevent the deterioration of the RY signal in the fourth embodiment, in addition to the third embodiment, when it is determined that the block of the color difference signal contains a large amount of red color, it is added to the non-linearly converted block in the third embodiment. Then, the color difference block also performs non-linear conversion.

FIG. 11 shows a block diagram of the fourth embodiment. 1,
2, 4 to 6 and 8 are the same as the conventional example. 12 is Example 1
Is the same as. 61 is the same as in the third embodiment. Reference numeral 101 is a non-linear conversion circuit II for performing non-linear conversion on an input signal.
I and 102 are red detectors that determine whether or not more red colors are included in the block than the color difference signal, and 103 is the output of the variable length encoding circuit 6 and the red detection data of the block corresponding to the output. This is a buffer memory II that stores in a predetermined order.

FIG. 12 shows an example of the structure of the red detector 102. Reference numeral 131 is a color difference signal input terminal, 132 is a red judging device for judging whether or not it is red from pixel values of the RY signal and the BY signal at the same position on the screen, and 133 is a red judging device 132 for red color. A counter that counts the number of pixels determined to be, a latch that latches the output of 133 in a predetermined period, 135 is a threshold input terminal, 136 is a threshold input from the input terminal 135, and the latch is 134 Comparators II and 137 for comparing signals are output terminals for outputting the result of the comparator II 136. ｀

FIG. 13 shows an example of the configuration of the non-linear converter 101. 111 is a video signal input terminal, 112 is a Y / BR signal for identifying a luminance signal or a color difference signal, and 113 is a YCH.
An input terminal for inputting the result of the K circuit 61 and an input terminal 114 for inputting the result of the red detector 102. Reference numeral 115 is an RO that performs conversion based on inputs from the input terminals 111 to 114.
MVII and 116 are output terminals for outputting the conversion result of ROMVII.

FIG. 14 shows an example of the configuration of the inverse nonlinear conversion on the decoder side. Reference numeral 121 is an input terminal for an inverse DCT 9-bit signal, and 122 is Y for identifying whether it is a luminance signal or a color difference signal.
/ BR signal, 123 is an input terminal for inputting a result detected by the same method as the YCHK circuit 61, 124 is an input terminal for inputting a result detected by the same method as the red detector 102, and 125 is an input terminal 121. ROM VIII and 126, which perform inverse conversion based on the inputs from ˜124, are output terminals for outputting the conversion result of ROM VIII.

The operation of FIG. 11 will be described. YCHK
The circuit 61 determines the size of each pixel of the luminance signal corresponding to one block of the color difference signal, and generates a signal that determines whether or not the signal of one block of the color difference signal is nonlinearly converted based on the result. Further, the red detector 102 determines whether or not the color difference signal R-Y includes a large amount of red color, and based on the result, determines whether or not to perform the non-linear conversion on the corresponding block of the color difference signal R-Y signal. To generate a signal. The nonlinear converter 101 uses the first embodiment for the luminance signal.
Non-linear conversion is executed in the same manner as for, and YC is applied to the color difference signal.
Non-linear conversion is executed based on the signals determined by the HK circuit 61 and the red detector 102.

Next, the operation of FIG. 12 will be described. The color difference signals R-Y and B-Y signals at the same position on the screen input from the input terminal 131 are input to the red color determiner 132. In the red color deciding unit 132, if the color difference signal is represented by 8 bits (0 to 255), the value of BY is smaller than the predetermined value THb (for example, 128) and R-
When the value of Y is larger than a predetermined value THr (for example, 170), it is determined that red can be detected in the pixel, and the red detection signal H
(L) is output. The counter 133 counts the red detection signal H (L) during a period in which the color difference signals are aligned for one block, for example. For example, the sum of the red detection signals in the period for one block of the color difference signal counted by the counter 133 is latched by the latch 134 for each period and compared with the threshold value input from the threshold value input terminal 135 by the comparator II 136. If the sum of the red detection signals is larger than the threshold value, the comparator II 136
It outputs from the output terminal 137 that the non-linear conversion is executed by using the RY signal block and the BY signal block which are the same on the screen as the red detection block.

Next, the operation of the non-linear converter 101 will be described with reference to FIG. A video signal is input from the input terminal 111, and a Y / BR signal for identifying a luminance signal or a color difference signal (RY, BY) is input from the input terminal 112. In addition, the result of the YCHK circuit 61 is input from the input terminal 113, and the result of the red detector is input from the input terminal 114.

From the above inputs, when the Y / BR signal indicates the luminance signal, the non-linear conversion is performed as in the first embodiment. When the Y / BR signal indicates the color difference signal, the YCHK circuit. The execution of the non-linear transformation is controlled by the result of the above and the result of the red detector.

If any of the results of the YCHK circuit, of the red detector, indicate that a non-linear transformation is to be performed,
The non-linear conversion similar to that of the second embodiment is executed on the color difference signal block, and the non-linear conversion is not executed in other cases.

The operation of the inverse nonlinear conversion on the decoder side is shown in FIG.
Described in. The data transmitted from the transmission path is decoded in the reverse of the encoder, and the 9-bit data after the inverse DCT is input from the input terminal 121. Also, the luminance signal or the color difference signal (R
-Y, BY) Y / BR signal for identifying whether input terminal 1
It is input from 22.

Further, for example, the result detected by the same method as the YCHK circuit 61 is input from the input terminal 123, and the red detection signal transmitted from the transmission line is input from the input terminal 124. From the above signals, when the Y / BR signal indicates the luminance signal, the inverse nonlinear conversion is executed as in the first embodiment,
When the Y / BR signal indicates a color difference signal, for example, Y
If the result detected by the same method as the CHK circuit 61 indicates that the inverse nonlinear conversion is executed, or if the red detection signal transmitted from the transmission line indicates that the encoder side performs the nonlinear conversion, the ROM VIII125 is used. The inverse transformation is performed,
The result is output from the output terminal 126.

In the first to fourth embodiments, the luminance signal or the color difference signal (R) is input to the non-linear conversion input terminals 22, 42, 82 and 112 and the inverse non-linear conversion input terminals 32, 52, 92 and 122.
-Y, BY) signal, Y / C signal, or Y / B
Since the processing order of the luminance signal and the color difference signal or the reading order of the R signal from the memory in a macro block unit is known in advance, the Y / C signal or the Y / BR signal is subjected to the nonlinear conversion or the inverse nonlinear conversion. Can be specified. Example 5.

In Embodiments 1 to 4, the input is set to 8 bits and the output is converted to 9 bits. However, the number of bits is not limited to this, and an arbitrary number of bits N to an arbitrary number of bits M (M ≧ N). It does not matter if it is converted to.

Example 6. Although the ROM is used to execute the non-linear conversion and the inverse non-linear conversion in the first to fourth embodiments, the present invention is not limited to this, and the converter may be configured by using a multiplier and an adder.

Example 7. The graph in FIG. 3 approximates the γ characteristic, and in FIG. 3, the input dynamic range is 3
Although the values are shown for the case of first-order approximation with all segments divided into equal parts, the value is not limited to this, and can be divided by any number,
It may be an approximation of an arbitrary number in each segment.

Example 8. In Examples 1 to 7, the nonlinear conversion is performed immediately after the blocking shuffling.
It may be anywhere before the orthogonal transformation such as T is executed.

[0070]

Since the present invention is constructed as described above, it has the following effects.

The present invention makes use of the difference in perception of deterioration of the human eye with respect to light and darkness, makes it difficult for the human eye to perceive the deterioration of the dark portion while suppressing an increase in the code amount as much as possible, and summarizes the entire image in an easy-to-see manner. be able to.

Further, in the present invention, by utilizing the difference in perception of deterioration of human eyes with respect to light and darkness, the deterioration of dark areas and the deterioration of red color which is conspicuous at the time of high-efficiency coding are suppressed by humans while suppressing an increase in code amount as much as possible. It is difficult for the eyes to perceive it, and the entire image can be easily viewed.

[Brief description of drawings]

FIG. 1 is a block diagram showing an embodiment of the present invention.

FIG. 2 is a block diagram of an example in which a conversion process of the present invention is implemented by a ROM.

FIG. 3 is a graph showing a conversion formula of the present invention.

FIG. 4 is a block diagram when an example of performing the inverse conversion process of the present invention is configured by a ROM.

FIG. 5 is a block diagram when an example of performing the conversion processing of the present invention is configured by a ROM.

FIG. 6 is a block diagram when an example of performing the inverse conversion processing of the present invention is configured by a ROM.

FIG. 7 is a block diagram showing another embodiment of the present invention.

FIG. 8 is a block diagram of a YCHK circuit for determining the level of a local luminance signal of the present invention.

FIG. 9 is a block diagram when an example of performing the conversion processing of the present invention is configured by a ROM.

FIG. 10 is a block diagram when an example of performing the inverse conversion process of the present invention is configured by a ROM.

FIG. 11 is a block diagram showing another embodiment of the present invention.

FIG. 12 is a block diagram of a red color detector for locally detecting red color according to the present invention.

FIG. 13 is a block diagram when an example of performing the conversion processing of the present invention is configured by a ROM.

FIG. 14 is a block diagram when an example of performing the inverse conversion process of the present invention is configured by a ROM.

FIG. 15 is a block diagram of a digital VTR.

FIG. 16 is a block diagram showing a conventional example.

FIG. 17 is a diagram showing a scanning order of DCT coefficients after discrete cosine transform (DCT).

[Explanation of symbols]

 1 Video Input Terminal 2 Blocking Shuffling Circuit 3 DCT Circuit I 4 Code Quantity Control Circuit 5 Quantization Circuit 6 Variable Length Coding Circuit 7 Buffer Memory I 8 Output Terminal 11 Nonlinear Converter I 12 DCT Circuit II 23 Nonlinear Conversion ROMI 24 ROMII 43 ROMIII 53 ROMIV 84 ROMV 94 ROMVI 102 Red detector for inverse nonlinear conversion

─────────────────────────────────────────────────── ───

[Procedure amendment]

[Submission date] September 30, 1994

[Procedure Amendment 1]

[Document name to be amended] Statement

[Name of item to be corrected] Claim 7

[Correction method] Change

[Correction content]

[Procedure Amendment 2]

[Document name to be amended] Statement

[Name of item to be corrected] 0037

[Correction method] Change

[Correction content]

On the decoder side, the inverse conversion is performed using the ROMII as shown in FIG. 4 which has an address of 10 bits as an input and an output of 8 bits. The conversion formula at this time is shown below. X ′ = Y ′ / 3 0 ≦ Y ′ ≦ 255 X ′ = (Y′− 85 ) / 2 255 <Y ′ ≦ 425 X ′ = (Y′−255) / 1 425 <Y ′ ≦ 511 Y ′ is Reproduction input data at the time of reproduction, and X'is pixel data at the time of reproduction.

─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. ⁶ Identification code Internal reference number FI Technical indication location H04N 7/30 (72) Inventor Ken Onishi Nagaokakyo Baba-Zousho 1 Mitsubishi Electric Corporation Video System In development lab

Claims (8)

[Claims] 1. Among the digital video signals inputted,
The input dynamic range of the luminance signal is divided into n (n segments: n is a natural number of 2 or more), and converted at a k-th order (k is a natural number) conversion formula so as to be continuous with the input signal at the end points of adjacent segments, In addition, a high-efficiency coding device characterized in that an input in one segment is converted by a k-th order conversion equation that is uniquely determined in the segment. 2. A k-th order conversion formula different for each segment is applied so that a smaller luminance signal has a smaller quantization step than a larger luminance signal. The high efficiency encoding device according to claim 1. 3. A k1 segment is divided into k segments so that the quantization step is relatively smaller when the luminance signal is smaller than when the luminance signal is large.
First-order conversion equation, k2th-order conversion equation for k2 segment, k
2. The high-efficiency coding apparatus according to claim 1, wherein the i-th segment is subjected to conversion by a conversion equation of a different order for each segment, such as a ki-th conversion equation. 4. The input dynamic range of the color difference signals (RY, BY) is divided into m1 and m2 (m1 segment and m2 segment: m1 and m2 are natural numbers of 2 or more).
However, at the end points of the adjacent segments, the input signal is converted by a conversion equation of the kth order so as to be continuous, and in addition, k that is uniquely determined for the input within one segment
A high-efficiency coding device characterized in that color difference signals are independently converted by the following conversion formula. 5. For each divided segment,
The high-efficiency coding apparatus according to claim 4, wherein conversion is performed by conversion equations of different orders according to the magnitude of the input signal. 6. Among input digital video signals,
The magnitude of the luminance signal is detected, and k is uniquely determined with respect to the input of the color difference signal corresponding to the portion on the screen, which includes many signals whose magnitude is smaller than a predetermined threshold.
The conversion according to the following conversion formula is performed.
And the high efficiency encoding device according to claim 4. 7. Of the input digital video signals,
The magnitude of the luminance signal is detected, and a color difference signal (R-
Y, B-Y), one portion on the screen detected as containing a large amount of red color is converted by a k-th order conversion equation that is uniquely determined by the input of a color difference signal corresponding to the portion. The high-efficiency coding apparatus according to claim 1 or 4. 8. A playback input dynamic range of one of a luminance signal and a color difference signal (RY, BY) of a playback digital video signal is divided into m (m segment: m is a natural number of 2 or more), A reproduced digital video signal having a size within each segment is subjected to inverse conversion by a k-th order conversion formula uniquely determined within the segment by its input, and the quantization step of the signal is equivalent to that before high efficiency encoding. A high-efficiency decoding device characterized by: