JPH07112022B2 - MOS semiconductor memory device - Google Patents

Description

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a MOS type semiconductor memory device which is programmed by electron beam exposure after completion of the device.

2. Description of the Related Art In recent years, with the diversification of systems and devices, a MOS type semiconductor memory device specially designed for the system has been required. Furthermore, it is required to shorten the turnaround time from the design to the completion of the MOS type semiconductor memory device. To meet these requirements, there is a PROM that can be programmed after the device is completed. Below is the conventional MO
An electrically programmable EPROM will be described as an example of the S-type semiconductor memory device.

FIG. 2 is a cross-sectional view of a main part of a conventional MOS semiconductor memory device, in which an element isolation region 12 is provided on the upper surface of a silicon substrate 11 except for a substantially central portion, and the central portion of the silicon substrate 11 and the element are A thin oxide film 13 is provided on the isolation region 12, a floating gate 14 is provided inside the upper thin oxide film 13 near the central portion of the substrate 11, and a control gate 15 is provided above the floating gate 14 via the thin oxide film 13. Forming an insulating film on top of it
16 are provided. In the MOS type semiconductor memory device before being programmed, no charges are stored in the floating gate 14. After the device is completed, in order to program, a voltage is applied between the control gate 15 and the silicon substrate 11 so that the charge tunnels the thin oxide film 13 from the silicon substrate 11 to the floating gate 14, and the floating gate 14 is charged. Is accumulated to change the threshold voltage of a predetermined transistor.

DISCLOSURE OF THE INVENTION Problems to be Solved by the Invention However, in the above-described conventional MOS type semiconductor memory device, the voltage generating circuit and wiring for applying at the time of programming are installed in the MOS type semiconductor memory device. Had the problem of increasing the area of.

SUMMARY OF THE INVENTION It is an object of the present invention to solve the above-mentioned conventional problems and to provide a MOS type semiconductor memory device which can be programmed after the completion of the device without providing a programming voltage generating circuit and wiring.

Means for Solving the Problem In order to solve this problem, a MOS semiconductor memory device according to the present invention includes a substrate, an element isolation region for separating adjacent memory cells on an upper surface of the substrate, and an element of the substrate. A thin oxide film provided on the upper surface of the memory cell formation region including the isolation region, a floating gate provided inside the thin oxide film above the memory cell formation region of the substrate, and above a part of the element isolation region. Except for the control gate provided above the floating gate via the thin oxide film and an insulating film provided on the upper surface of the control gate and the thin oxide film, and the floating gate is provided above the control gate. It is characterized in that the electron beam exposure region is provided so as to extend above the element isolation region which is not disposed.

According to the MOS semiconductor memory device of the present invention, after the device is completed, the electron beam exposure region of the floating gate located above the element isolation region is exposed to an electron beam to accumulate charges, and the threshold value of the transistor is set. It is possible to change and program, and it is possible to omit the pattern of the voltage generating circuit and the wiring conventionally provided in the device.

Embodiment An embodiment of the present invention will be described below with reference to the drawings.

FIG. 1 is a sectional view of an essential part of a MOS type semiconductor memory device according to an embodiment of the present invention. That is, the silicon substrate 1
The element isolation region 2 is disposed in a portion of the upper surface of the silicon substrate except for the vicinity of the central portion, and the silicon substrate 1 is provided in the vicinity of the central portion and the element isolation region 2
A thin oxide film 3 is provided on the upper surface of the substrate, and a floating gate 4 is provided inside the upper thin oxide film 3 near the central portion of the substrate 1. A control gate 5 is provided above the thin oxide film 3, and an insulating film 6 is provided on the control gate 5 and the thin oxide film 3. Then, the floating gate 4 is extended above the element isolation region 2 where the control gate 5 is not disposed above to form an electron beam exposure region 7. In this MOS semiconductor memory device, no charge is stored in the floating gate after the device is completed and before programming.

The operation of the above MOS type semiconductor memory device will be described below. After completion of the device, when the electron beam exposure region 7 of the floating gate 4 located above the element isolation region 2 is exposed to an electron beam, charges are accumulated inside the floating gate 4 and the threshold voltage of the transistor changes. Then programmed. Since the electron beam exposure is on the element isolation region 2, it is possible to avoid damage caused by directly exposing the transistor with the electron beam.

As described above, according to the present embodiment, the MOS semiconductor memory device can be programmed by the exposure of the electron beam without providing the voltage generating circuit and the wiring in the MOS semiconductor memory device.

The MOS semiconductor memory device of the present invention can be programmed by electron beam exposure after the device is completed, and a voltage generating circuit and wiring for programming are not provided in the semiconductor memory device. The area of the device can be reduced, and an inexpensive semiconductor memory device can be realized.

[Brief description of drawings]

FIG. 1 is a sectional view of an essential part of a MOS type semiconductor memory device according to an embodiment of the present invention, and FIG. 2 is a sectional view of an essential part of a conventional MOS type semiconductor memory device. 1 ... Silicon substrate, 2 ... Element isolation region, 3 ... Thin oxide film, 4 ... Floating gate, 5 ... Control gate, 6 ... Insulating film, 7 ... Electron beam exposure region.

Claims (1)

[Claims] 1. A substrate, an element isolation region for isolating adjacent memory cells on an upper surface of the substrate, a thin oxide film provided on an upper surface of a memory cell formation region including the element isolation region of the substrate, A floating gate provided inside the thin oxide film above the memory cell formation region of the substrate, and a control provided above the floating gate via the thin oxide film except above some element isolation regions. The gate and the control gate and an insulating film provided on the upper surface of the thin oxide film are provided, and the floating gate is extended above the element isolation region where the control gate is not disposed above to arrange the electron beam exposure region. MOS type semiconductor memory device characterized by being provided.