JPH0697792A - Pulse frequency modulation system - Google Patents

Pulse frequency modulation system

Info

Publication number
JPH0697792A
JPH0697792A JP11638891A JP11638891A JPH0697792A JP H0697792 A JPH0697792 A JP H0697792A JP 11638891 A JP11638891 A JP 11638891A JP 11638891 A JP11638891 A JP 11638891A JP H0697792 A JPH0697792 A JP H0697792A
Authority
JP
Japan
Prior art keywords
pulse frequency
video signal
circuit
signal
frequency modulation
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP11638891A
Other languages
Japanese (ja)
Inventor
Junichi Yoneda
純一 米田
Seiichi Kondo
誠一 近藤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
NEC Cable Media Ltd
Original Assignee
NEC Corp
NEC Cable Media Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, NEC Cable Media Ltd filed Critical NEC Corp
Priority to JP11638891A priority Critical patent/JPH0697792A/en
Publication of JPH0697792A publication Critical patent/JPH0697792A/en
Pending legal-status Critical Current

Links

Landscapes

  • Picture Signal Circuits (AREA)

Abstract

PURPOSE:To perform pulse frequency modulation suppressing the average level fluctuation of an input video signal. CONSTITUTION:A clamper circuit 1 suppresses the average level fluctuation of an input video signal and outputs it as a 1st video signal (a). A pulse frequency conversion circuit 2 modulates the pulse frequency of the video signal (a) according to a D.C. signal 7. A pulse frequency demodulation circuit 3 demodulates a 1st video signal (b) modulating the pulse-frequency and outputs it as a 2nd video signal. An arithmetic amplifier 16 outputs a D.C. signal 7 which is the difference comparing the outputs from the 1st and 2nd low-pass filters 4 and 5 detecting the D.C. level of the 1st and 2nd video signals (a) and (c) to a pulse frequency modulation circuit 1.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明はビデオ伝送の送受信装置
に使用するパルス周波数変調方式に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a pulse frequency modulation method used in a transmitter / receiver for video transmission.

【0002】[0002]

【従来の技術】従来のビデオ信号のパルス周波数変調方
式は、図2に示すようにコンデン18により直流成分が
遮断されたビデオ信号をパルス周波数変調回路12にお
いて、演算増幅器16からの直流信号17に応じてパル
ス周波数変調して出力し、この出力をパルス周波数復調
回路13とローパスフィルタ14とにより検出された直
流分を演算増幅器16に入力していた。演算増幅器16
は、検出された直流分とグランドGレベルとを比較して
直流信号17を出力し、パルス周波数変調回路12がパ
ルス周波数変調を行う際の中心周波数のずれを制御して
いた。
2. Description of the Related Art In the conventional pulse frequency modulation method of a video signal, a video signal of which DC component is blocked by a condenser 18 is converted into a DC signal 17 from an operational amplifier 16 in a pulse frequency modulation circuit 12 as shown in FIG. Accordingly, the pulse frequency is modulated and output, and the DC component detected by the pulse frequency demodulation circuit 13 and the low pass filter 14 is input to the operational amplifier 16. Operational amplifier 16
Compares the detected DC component with the ground G level and outputs a DC signal 17 to control the deviation of the center frequency when the pulse frequency modulation circuit 12 performs the pulse frequency modulation.

【0003】[0003]

【発明が解決しようとする課題】この従来のパルス周波
数変調方式では、コンデンサにより直流成分を遮断した
ビデオ信号を用いていたため、ビデオ信号の平均レベル
(APL=アベレージピクチャーレベル)変動を抑える
ことが困難であった。
In this conventional pulse frequency modulation method, since the video signal in which the direct current component is blocked by the capacitor is used, it is difficult to suppress the fluctuation of the average level (APL = average picture level) of the video signal. Met.

【0004】[0004]

【課題を解決するための手段】本発明のパルス周波数変
調方式は、入力のビデオ信号の平均レベル変動を抑圧し
第1のビデオ信号として出力するクランパー回路と、前
記第1のビデオ信号を直流信号に応じてパルス周波数変
調するパルス周波数変調回路と、前記パルス周波数変調
された第1のビデオ信号を復調し第2のビデオ信号とし
て出力するパルス周波数復調回路と、前記第1と第2の
ビデオ信号の直流レベルをそれぞれ検出する第1と第2
のローパルフィルタと、この第1と第2のローパスフィ
ルタからの出力が比較された差の前記直流信号を出力す
る演算増幅器とを有する。
According to the pulse frequency modulation method of the present invention, a clamper circuit for suppressing an average level fluctuation of an input video signal and outputting it as a first video signal, and a DC signal for the first video signal. A pulse frequency modulation circuit for performing pulse frequency modulation according to the above, a pulse frequency demodulation circuit for demodulating the pulse frequency modulated first video signal and outputting it as a second video signal, and the first and second video signals 1st and 2nd to detect the DC level of
Low-pass filter and an operational amplifier that outputs the DC signal of the difference between the outputs from the first and second low-pass filters.

【0005】[0005]

【実施例】次に、本発明について図面を参照して説明す
る。図1は本発明の一実施例のブロック図である。
DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, the present invention will be described with reference to the drawings. FIG. 1 is a block diagram of an embodiment of the present invention.

【0006】本実施例は、入力のビデオ信号の平均レベ
ル変動を抑圧し第1のビデオ信号aとして出力するクラ
ンパー回路1と、第1のビデオ信号aを直流信号7に応
じてパルス周波数変調するパルス周波数変調回路2とパ
ルス周波数変調された第1のビデオ信号bを復調し第2
のビデオ信号cとして出力するパルス周波数復調回路3
と、第1と第2のビデオ信号a,cの直流レベルをそれ
ぞれ検出する第1と第2のローパルフィルタ4,5とこ
の第1の第2のローパスフィルタ4,5からの出力が比
較された差の直流信号7を出力する演算増幅器6とを有
して構成される。
In this embodiment, a clamper circuit 1 for suppressing an average level fluctuation of an input video signal and outputting it as a first video signal a, and a pulse frequency modulation of the first video signal a according to a DC signal 7. The pulse frequency modulation circuit 2 and the pulse frequency modulated first video signal b are demodulated to the second
Frequency demodulation circuit 3 for outputting as the video signal c
And the outputs from the first and second low pass filters 4 and 5 for detecting the DC levels of the first and second video signals a and c, respectively, and the outputs from the first and second low pass filters 4 and 5. And an operational amplifier 6 that outputs a DC signal 7 of the difference.

【0007】次に動作について説明すると入力されたビ
デオ信号のAPL変動を抑えるクランパー回路1からの
第1のビデオ信号aはパルス周波数変調回路2によりパ
ルス周波数変調され、送信される。その際、パルス周波
数変調されたビデオ信号bを分岐し、パルス周波数復調
回路3に入力し、復調された第2のビデオ信号cを得
る。第2のビデオ信号cの直流成分を第2のローパスフ
ィルタ5により検出する。クランパー回路1から第1の
ビデオ信号aの直流成分を第1のローパスフィルタ5に
より検出する。第1と第2のビデオ信号の直流成分を演
算増幅器6により比較し、パルス周波数変調の際の中心
周波数のずれを検出する。そしてこの検出された中心周
波数のずれをパルス周波数変調回路2に直流信号7とし
て入力し、パルス変調の際の中心周波数のずれを修正す
る。
The operation will now be described. The first video signal a from the clamper circuit 1 for suppressing the APL fluctuation of the input video signal is pulse frequency modulated by the pulse frequency modulation circuit 2 and transmitted. At that time, the pulse frequency-modulated video signal b is branched and input to the pulse frequency demodulation circuit 3 to obtain a demodulated second video signal c. The DC component of the second video signal c is detected by the second low pass filter 5. The DC component of the first video signal a from the clamper circuit 1 is detected by the first low pass filter 5. The DC components of the first and second video signals are compared by the operational amplifier 6 to detect the deviation of the center frequency during pulse frequency modulation. Then, the detected shift of the center frequency is input to the pulse frequency modulation circuit 2 as a DC signal 7, and the shift of the center frequency at the time of pulse modulation is corrected.

【0008】[0008]

【発明の効果】以上説明したように本発明は、パルス周
波数変調回路に入力するビデオ信号と出力が復調された
ビデオ信号とが比較された直流信号によりパルス周波数
変調の中心周波数を制御することにより、入力のビデオ
信号の平均レベル変調を抑圧したパルス周波数変調を行
うことができる。
As described above, according to the present invention, the center frequency of pulse frequency modulation is controlled by the DC signal obtained by comparing the video signal input to the pulse frequency modulation circuit with the demodulated output video signal. It is possible to perform pulse frequency modulation in which the average level modulation of the input video signal is suppressed.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の一実施例のブロック図である。FIG. 1 is a block diagram of an embodiment of the present invention.

【図2】従来のパルス周波数変調方式の一例のブロック
図である。
FIG. 2 is a block diagram of an example of a conventional pulse frequency modulation method.

【符号の説明】[Explanation of symbols]

1 クランパー回路 2 パルス周波数変調回路 3 パルス周波数復調回路 4 第1のローパスフィルタ 5 第2のローパスフィルタ 6 演算増幅器 1 Clamper Circuit 2 Pulse Frequency Modulation Circuit 3 Pulse Frequency Demodulation Circuit 4 First Low Pass Filter 5 Second Low Pass Filter 6 Operational Amplifier

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】 入力のビデオ信号の平均レベル変動を抑
圧し第1のビデオ信号として出力するクランパー回路
と、前記第1のビデオ信号を直流信号に応じてパルス周
波数変調するパルス周波数変調回路と、前記パルス周波
数変調された第1のビデオ信号を復調し第2のビデオ信
号として出力するパルス周波数復調回路と、前記第1と
第2のビデオ信号の直流レベルをそれぞれ検出する第1
と第2のローパルフィルタと、この第1と第2のローパ
スフィルタからの出力が比較された差の前記直流信号を
出力する演算増幅器とを有することを特徴とするパルス
周波数変調方式。
1. A clamper circuit for suppressing an average level fluctuation of an input video signal and outputting it as a first video signal, and a pulse frequency modulation circuit for pulse frequency modulating the first video signal according to a DC signal. A pulse frequency demodulation circuit for demodulating the pulse frequency modulated first video signal and outputting it as a second video signal, and a first frequency detecting circuit for detecting the DC levels of the first and second video signals, respectively.
And a second low-pass filter, and an operational amplifier for outputting the DC signal having a difference obtained by comparing the outputs from the first and second low-pass filters.
JP11638891A 1991-05-22 1991-05-22 Pulse frequency modulation system Pending JPH0697792A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11638891A JPH0697792A (en) 1991-05-22 1991-05-22 Pulse frequency modulation system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11638891A JPH0697792A (en) 1991-05-22 1991-05-22 Pulse frequency modulation system

Publications (1)

Publication Number Publication Date
JPH0697792A true JPH0697792A (en) 1994-04-08

Family

ID=14685790

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11638891A Pending JPH0697792A (en) 1991-05-22 1991-05-22 Pulse frequency modulation system

Country Status (1)

Country Link
JP (1) JPH0697792A (en)

Similar Documents

Publication Publication Date Title
JPH05103024A (en) Automatic gain control method
US4068257A (en) Color video signal recording and/or reproducing system
FI66105B (en) KRETS FOER UNDERTRYCKANDE AV STOERNINGAR I LUMINANSSIGNAL AV FAERG-TV
US4600890A (en) Demodulator comprising a phase-locked loop
JPH0697792A (en) Pulse frequency modulation system
JPH02284547A (en) Orthogonal signal demodulation system
JPH05276487A (en) Digital demodulator
US3961135A (en) Synchronized demodulation system
JPH0463574B2 (en)
JPS59156096A (en) Pal, secam system discriminating circuit
JP3479369B2 (en) Receiver with noise removal function
US3990104A (en) Circuit arrangement for amplitude controlling an NTSC chrominance signal with high noise immunity
JP2948386B2 (en) Demodulator and receiver using the same
JPS605649Y2 (en) Transmitting/receiving device
JPS6134763Y2 (en)
JPH0215415Y2 (en)
SU1450137A1 (en) Transceiver of stereo/color television signal
JPH08307796A (en) Confirmation signal identification circuit in television identification control signal
JPH04286278A (en) Device for removing noise
JP2000244343A (en) Fm modulation circuit and fm demodulation circuit
JPS6057272B2 (en) Burst amplitude detection circuit
JPH04286211A (en) Automatic frequency control circuit
JPH01261979A (en) Superimposed circuit for significant information for video signal
JPH0417485A (en) Video signal processing unit
JPS6312433B2 (en)

Legal Events

Date Code Title Description
A02 Decision of refusal

Free format text: JAPANESE INTERMEDIATE CODE: A02

Effective date: 19990223