JPH0696004A - I/o executing method of computer system - Google Patents

Abstract

PURPOSE:To give a function which allows plural systems to use an area wherein there is no common area on a disk device as reserve/resource when sharing the device, and to prevent the resulting wait time and sinking. CONSTITUTION:This I/O executing means consists of an I/O executing means 1030 and its microprogram 1050, and an interrupting means 1040 and its microprogram 1060 in a CPU 1000, the program 3020 of an IOP 3000, a main storage area 2001, queues 2070 and 2080, a control block group 2090, and a prefix 2110 for virtual computation. Necessary parts in the device can logically be reserved. When the logical resource names of both systems are different, simultaneous access is possible. Only when both the systems which are made to wait access the same logical resource name, a mini disk is regarded as a logical resource and used exclusively by each VM(virtual computer) to enable direct execution.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention is applied to a data processing system constituted by a general-purpose computer system, and more particularly to a logical reserve / resource of files on a secondary storage device.

[0002]

2. Description of the Related Art FIG. 1 shows a main configuration of an actual computer system 10000. 1000 is a central processing unit CPU, 200
0 is the main memory, 3000 is the input / output processor IOP
Is an input / output control unit IOC. 100
Is a signal line between the CPU 1000 and the main storage device 2000, 200 is a signal line between the CPU 1000 and the IOP 3000, and 300 is an IOP 3000 and the main storage device 2.
000 is a signal line, 400 is IOP 3000,
This is a signal line to and from the IOC 4000. The real computer system 10000 is controlled and operated by an operating system (OS) on the main storage device 2000 managing resources (CPU, main storage device, input / output device) of the entire system.

On the other hand, a virtual computer system (VM
FIG. 2 shows a configuration diagram in S). Real computer system 100
The hardware configuration (00, main storage device, input / output device) of 00 is the same as that of FIG. 1 except that a control program VMCP (or simply CP) of the VMS exists on the main storage device 2000. . With the hardware simulation function of the VMCP, a plurality of logical computers (called virtual machines VM) are logically realized. Each VM, ie, 10,000-1 (VM1), 1
0000-2 (VM2), 10000-3 (VM3)
Is a real computer system (called a host system) 100
It is logically realized as having the same hardware configuration as 00. Main storage device 2000-N (N =
1, 2, 3) OS-N that controls and operates each VM
Exists, and the plurality of OSs are running under one host system at the same time. The hardware configuration (CPU, main storage device,
(IOP, IOC) is logically realized by VMCP, but most of these entities exist on the corresponding hardware configuration of the host system. For example, the main storage device of the VM may occupy a part of the main storage device 2000 of the host system or may share the same, and the input / output device of the VM may be the input / output device of the host system VM. It may be shared between them, or it may occupy some I / O devices. Alternatively, there may be a case where there is no corresponding input / output device on the host system and it is realized by being virtually simulated by VMCP. In any case, the main storage device 2000-N of each VM
From the OS on (N = 1, 2, 3), the same hardware configuration (CPU, main memory, IO) as the host system
P, IOC) will be visible. Here, it should be noted that the architecture of each VM (hardware structure and function viewed from the OS) may be slightly different from that of the host system 10000. Similarly, the VMs may have different architectures.
For example, the set of machine instructions of the host system and each VM
The set of machine instructions in does not have to be exactly the same. However, completely different ones are not subject to VMS in the present invention because the load of VMCP becomes large and the simulation mechanism of the host system becomes large. In the virtual machine VM described in the present invention, most of the machine instructions are executed on the host system without intervention of VMCP.
It is necessary to directly execute the program with the same performance as the original performance (execution speed) of the host system. Also in FIG.
Although only three VMs are defined, in general, any number of VMs may be provided, and the upper limit thereof is determined by the balance between the resource capacity of the host system and the performance of each VM. The host system also has a privileged state and a non-privileged state, and machine instructions that have a significant impact on the system (for example, IO instructions, system interrupt mask change instructions) are called privileged instructions and are used only in the privileged state. You cannot do it. This is also well known.

In the real computer system shown in FIG. 1,
One OS controls the entire resources and operates the entire system. However, in the virtual computer system shown in FIG. 2, the control program (VMCP) distributes computer resources to the OSs on each VM, and each OS controls and operates the distributed resources. An important resource in the operation of such a computer system is a secondary storage device such as a magnetic disk or a magnetic tape. The basic technology of the computer system of the present invention is ESA / 390 of IBM Corporation.
Principles of Operation SA22-7201. In addition, Japanese Patent Application No. 59-005587 “I / O execution method of virtual computer system” describes I of virtual computer (VM).
A method is described in which the / O instruction and the I / O interrupt are directly executed by hardware / microprogram without intervention of VMCP. There, the subchannel (the logical representation of the device) is dedicated to the VM so that the I
/ O Direct execution is realized.

[0005]

The capacity of one disk device (hereinafter referred to as a device) is increasing steadily. This causes the following problems.

(1) When a device is shared by a plurality of systems, the entire device is temporarily occupied and exclusively controlled, so that the reserve (necessary) of one system (A) accesses the other system. Has a great effect on (to the device). this is,
Even when the other system accesses a completely different area of the same device, the same system A reserves the entire device, so that the access of the other system (to the same device) is all waited. In particular, if the system A reserves the entire device for a long time or the system A goes down while the system A reserves it, all access to the device of the other system will be depressed.

(2) A method is used in which the device is divided into cylinders, divided into a plurality of minidisks by software, and each minidisk is given to the OS as a disk. IBM's Virtual Machine / Extended Archi
tecture (VM / XA) and Virtual Machine / Enterprise
An example is a mini disk in Systems Architecture (VM / ESA). However, VM for mini disk
I / O commands of the above OS cannot be directly executed.

At present, a sub-channel is defined either for a channel path and a device or for a multiple channel path and a device. Further, the sub-channel is a logical representation of the device as seen from the OS, and is a management entity for controlling the device. Therefore, there is no such thing as a mini disk that manages the divided areas of the device on the hardware, that is, the channel system side. This means that the performance of VMs that use minidisks decreases.
In this case, it is impossible to obtain a performance close to that of a VM real computer.

The present invention aims to solve the above problems.

[0010]

The solution is to define a management entity called a logical resource control block (LRCB). This LRCB is an area where devices do not overlap each other (for example, files defined by the OS or VMs).
It is a logical representation of each area when it is considered to be divided into minidisks defined by CP). This LRCB
Shall be defined by the user at the same time as the conventional sub-channel definition or I / O generation.

Like the parent sub-channel, this LRCB has one of the following states: busy, free, status pending, and not operational. The channel system manages this LRCB as a logical resource and accepts only one I / O request for the logical resource. The OS conventionally issues a I / O command by designating a subchannel number, but in the method of this patent, a logical resource number (Logical Resource Number: LRN) can be further designated. The channel system queues the sub-channel (request block including the address of the sub-channel) which has conventionally issued the I / O request to the logical control device. In this patent, however, the I / O request to the LRCB is issued. Also, the LRCB (request block including the address of the LRCB) is queued. The queuing method is
It is assumed that the corresponding LRCB is mixed and queued in the same I / O request queue as the parent subchannel.
Consecutive (ie immediately preceding I /
Two I / O requests (issued before the O request was completed)
The LRCB is rejected because it is in a busy state, and the busy state is reported to the OS. This is similar to conventional sub-channel operation. In this patent, logical resources (L
A subchannel having an RCB) is defined by the channel system to be free when at least one LRCB under its control is in the free state.

As a result, in the past, only one I / O request for a subchannel could be accepted, but the logical resource (LRC) held by the subchannel was received.
As many as B) are accepted by the channel system. Conventionally, a channel system uses an I / O controller side (IO) by using a channel path identifier and a unit address (UA) (physical address of a device) in a sub-channel.
Although a start signal was sent to C), in this method,
It also sends the logical resource number (LRN). The IOC side has these channel path identifier, unit address, and L
Manage the RN.

The I / O interrupt request generated on the device side is sent to the channel system side by the IOC through the corresponding channel path as before. At this time, the conventional UA
In addition to this, LRN is also sent.

As a result, on the channel system side, I /
The O interrupt request is set in the corresponding logical resource control block LRCB of the corresponding subchannel. The LRCB I / O interrupt request has the same interrupt priority as the parent sub-channel and is queued at the same interrupt priority (ie. Subclass).

[0015]

The above method solves the problems as follows. The first problem (1) of the problem to be solved by the present invention is that each system sharing the device logically stores only a necessary part in the device, for example, a file to be used, without reserving the entire device. Can be reserved as desired. Therefore, if the logical resource names of both systems are different, simultaneous access is possible. Therefore, other systems are less likely to be kept waiting. Only when both systems access the same logical resource name, it is kept waiting.

The problem (2) of the problem to be solved by the present invention is that the minidisk is used as a logical resource and the logical resource (LRCB) is dedicated to each VM, whereby the direct execution becomes possible. . Because the I / O request to each LRCB is similar to the I / O request to the sub-channel,
This is because it is queued in the I / O request queue and is scheduled by the channel system.

[0017]

FIG. 3 shows the internal structure of a real computer system (shown in FIG. 1) in which the present invention is realized in more detail.

Although each constituent element of the CPR 1000 is the same as that of the conventional one, there are some which have a slightly larger function.
In the hardware system area HSA2001,
There is the same one as before (IO request queue 2070,
IO interrupt request queue 2080, real subchannel control block group 2090).

Reference numeral 1030 denotes an I / O instruction executing means 1050.
Is a microprogram for executing I / O instructions, which is modified from the conventional technique to implement the present invention.

Reference numeral 1040 is an I / O interrupt means 1060.
Is a microprogram that executes I / O interrupts,
Modifications to the prior art are made to implement the invention.

Reference numeral 3000 denotes an input / output processor IOP,
It has the same function as the conventional one, but is modified by the present invention. Reference numeral 3020 is a microprogram for realizing the operation of the IOP, which is modified by the present invention.

Reference numeral 2070 denotes an I / O request queue, which is I / O
The I / O request requested by the O instruction is queued. 2080 is an I / O interrupt request queue 2090, which is a real subchannel control block group. From the I / O device,
An I / O interrupt request occurs, but the I / O interrupt request is
I via the channel path and via the data line 400
It is transmitted to OP3000. IOP3000 is the I / O
Queue the O interrupt request to 2080. This is conventional.

This I / O interrupt queue 2080 basically includes a conventional structure, and is further modified according to the present invention. Reference numeral 2090 is a real subchannel control block group.

The real subchannel is a logical representation of an input / output device when viewed from the OS on the real computer system (1000 in FIG. 1). The real subchannel is defined for the channel path and the input / output device, and includes the status information of the device viewed from the channel path. The channel path belongs to the IOP 3000 in FIG. 3, and the interface 4 between the IOP 3000 and the input / output control unit IOC4000.
00 is realized.

When there are a plurality of channel paths reaching the input / output device, one sub-channel may be defined for the plurality of channel paths and devices.

FIG. 4 shows the concept of logical resources. That is, when the magnetic disk device 5800-D is divided into areas that do not overlap each other, the logical representation of each area is called a sub-channel logical resource or simply a logical resource.
A control block on the main memory 2001, which represents it, is a logical resource control block.
ck: LRCB). FIG. 4 represents a group 5800 of consecutive LRCBs. This division is performed by the user at the time of I / O generation.

FIG. 5 shows the relationship between subchannels and their logical resources. A subchannel is conventionally defined as a subchannel control block, which is arranged in a contiguous region 2090 (see also Figure 1). A new logical resource is defined for each subchannel. For example, the sub-channel S has logical resources 0, 1, ..., K
Is defined. They are continuously secured in the logical resource control block group 5800-S (S = 0, 1, 2, ...: Subchannel number). Each logical resource is represented as a logical resource control block (LRCB).

FIG. 6 further illustrates the relationship between subchannels and logical resources in the relationship between device 5800-D and channel paths. It is assumed that there are channel paths 1, 2, 3, 4 to the device 5800-D. Actual subchannel 1 is
It is defined for channel paths 1 and 2 and device 5800-D. Real sub-channel 1 contains state information for device 5800-D as seen from channel paths 1 and 2. The IOP 3000 shown in FIG. 3 is also called a channel system, and this actual subchannel manages the I / O request from the OS and the I / O interrupt from the device. This is the same as the conventional one. The difference from the prior art is that the logical resource control block group 580-1 shown in FIGS. 4 and 5 is placed under the real subchannel 1 and pointed to from the subchannel 1. In the case of FIG. 6, three logical resources LRCB1, LRCB2, and LRCB3 are defined for subchannel 1, and these correspond to the respective logical resources of the device 5800-D. 580-1 logical resource 1,
2 and 3 include state information of the logical resources 1, 2 and 3 (on the device 5800-D) viewed from the channel paths 1 and 2. Subchannel 2 includes channel paths 3 and 4 and device 5
Defined for 800-D. 5800-2 logical resource control blocks LRCB1, LRCB2, LRCB
3 corresponds to the logical resources 1, 2 and 3 of the device 5800-D viewed from the channel paths 3 and 4 and includes the status information thereof.

FIG. 7 shows a logical resource control block (LR
CB) state word LRSW (Logical Resour)
ce Status Word). LRSW shows the state of LRCB, and in it, Pending Status, Busy Sta
tus, Rree Status, Net Operational Status are displayed. Furthermore, CCW (Cha
nnel Command Word) Contains the start address of the execution sequence. These are the same as the information included in the conventional real subchannel in the real computer. Furthermore, a VM information area 5805 is newly included.

FIG. 8 shows a logical resource control block (LR
The details of the VM information area 5805 in CB) are shown.

That is, the status field 5806, LR
It is the number VM # of the exclusive source VM when occupying the CB, the virtual interrupt priority order, the real interrupt priority order (5807), and the CCW address conversion information 5808.

In the status field, this logical resource L
Whether or not the RCB is occupied by the VM, this LRCB is I
There is a flag indicating whether or not the / O direct execution inhibition mode is set. The CCW address translation information 2094 has the same contents as the conventional address translation information. These VM information areas 580 are defined from the VM definition information when defining a VM, when a VMCP command is specified, or when an I / O instruction is processed.
The information in 5 is set.

The exclusive use of the logical resource LRCB or the exclusive use of the actual interrupt priority order is designated at the time of defining the VM or by the VMCP command. When this designation is made, the VM information area 5
The following fields in 805 are set.

The LRCB occupancy flag in the status field 5806. The I / O direct execution mode inhibition flag is normally set to 0, and the I / O direct execution mode is set to the supported state.

VM # of exclusive source CCW address conversion information When the logical resource LRCB is shared between VMs,
That is, in the case of the shared LRCB, these pieces of information are set when the I / O command is processed. In this case, the I / O issuer VM
The VM information area for is set in the corresponding field.

That is, in the case of the shared LRCB, the VM # of the VM information area 5805 of FIG. 8 is the VM of the I / O issue source.
, The destination of the interrupt priority designated by the I / O instruction issued by the OS on the VM, that is, the virtual interrupt priority, and the corresponding actual interrupt priority is set to 5805. In this case, L in the status field 5806 of the LRCB
The RCB exclusive flag is 0 and the I / O direct execution mode inhibition flag is 1. The actual interrupt priority is the same as in the prior art, and 0, 1, ... N representing the priority of the I / O interrupt.
Of each priority. As a conventional technique, by allocating this actual interrupt priority to a VM, the I / O of the VM is
The interrupt is being executed directly. The interrupt priority designated by the OS on the VM is the virtual interrupt priority.

FIG. 9 shows a method of defining a logical resource. This is defined by the user when the I / O system is created. The user defines the required number of required logical resource definition statements 5811 and 5813 immediately after the conventional sub-channel definition statements 5810 and 5812. By processing this, the structure of the sub-channel and the logical resource shown in FIG. 5 is defined. The actual sub-channel control block group 2 of the main storage device 2001 of FIG.
At 090, the structure shown in FIG. 5 is created at system initialization.

FIG. 10 shows an example of queuing of I / O requests to logical resources. When the sub-channel has a logical resource, the I / O request is sent to each logical resource (LRC
Only one can be accepted for B). That is, as shown in FIG. 7, the logical resource LRCB has the same state as that of the sub-channel, and when in the Free state, the I / I
When O request is accepted and it is scheduled by the channel system, it enters Busy state. These controls are performed by the channel system.

The I / O request to the logical resource (LRCB) is queued together with the I / O request to the sub-channel as shown in FIG.

FIG. 11 shows a logical resource control table (LRCT) on the input / output control unit (IOC) side. When an OS on each system or an OS on a VM shares a logical resource, each OS must reserve and use a logical resource (LRCB). At this time, each OS must use the same logical resource number. Although the logical resource number is unique in the device,
In another device, the same logical resource number may be used. Therefore, a unit address (UA) for uniquely identifying the device in the system is set.
Further, the identifier of the channel path or channel path group that reserves the logical resource (LRCB) is registered. These pieces of information are set in the processing (of the I / O instruction) between the channel system and the IOC that is asynchronously performed after the OS has issued the I / O instruction for reserving the logical resource. It

FIG. 12 shows the channel path group control table 5830 in the IOC. Each OS directly performs I / O for each logical resource (LRCB) in the sub-channel.
In order to make it possible to issue a request, a path group is configured for each logical resource (LRCB), its identifier and path mode CHPGID 5834, logical resource number (LRN) 5833, and device address (UA) 5
832 is registered. These are registered for each channel path. The channel path is a channel path identifier (C
HPID) 5831.

FIG. 13 shows an example of queuing of I / O interrupt requests generated in subchannels and logical resources (LRCB). The logical resource (LRCB) waits for the same interrupt priority as the parent subchannel, and is queued together with the I / O interrupt request of the subchannel.

FIG. 14 shows an extended Start Subchannel (SSCH) instruction 584 which is an I / O instruction extended in this patent.
Indicates 0. This includes the subchannel number in the general-purpose register 1 and the ORB (Operation Reservation) as the second operand.
Having a quest block) 6800 is the same as the conventional one. In this patent, a logical resource number 5842 and a validity bit (V) 5841 are newly provided in the ORB. OS
When using a logical resource in a sub-channel, the logical resource number (LRN) must be indicated to the ORB in addition to the sub-channel number. The validity bit (V) is the logical resource number LRN in the ORB.
Is valid (V = 1) or invalid (V = 0), and is specified by the OS when the OS issues an extended SSCH instruction. When the validity bit (V) = 0, the logical resource number LRN is invalid, and its operation specification is
It is the same as the conventional SSCH command.

15 and 16 show the operation flow of this SSCH instruction. It can be stated as follows. These are I / Os in FIG. 3 unless otherwise specified.
Instruction executing means 1030 and microprogram 1050
Executed by

(1) The corresponding subchannel is obtained from the subchannel number which is the operand of the SSCH instruction (58)
50,5851).

(2) The logical resource number (LRN) is obtained from the operand ORB. When this is disabled, it is as before. When this is valid, the corresponding logical resource control block LRCB is obtained from the LRN (585).
2,5853,5855).

(3) Judging the state of the obtained LRCB,
If the status is Pending Status, the condition code is set to 1 and the processing ends (5
854, 5856). This is similar to the Pending Status in the conventional subchannel. The Pending Status indicates a status such as an I / O request by the SSCH instruction, a status that is still queued, or a status that an interrupt is pending.

(4) When the status of the obtained LRCB is the Busy status, the condition code 2 is returned and the processing is terminated (5854,
5857).

(5) The reason why the LRCB is Busy is the same as the conventional sub-channel is Busy.
Indicates that the LRCB is currently scheduled by the channel system and is actually involved in I / O operations (5854, 5857).

(6) When LRCB is Not Operational, condition code 3 is sent and the processing is terminated (5854, 585).
8).

(7) When LRCB is free, the I / O
Accept the request and send LRCB to PendingStatus (SSCH
Instruction Pending), and queue the I / O request block containing the address. (5860) After that, a start signal is sent to the IOP 3000 via the path 200.
With this, the processing on the CPU side ends with condition code 0 (5
862,5863).

(8) Then, asynchronously, the channel system is shown in FIG. The scheduling is performed with the I / O request queue. At this time, the LRCB is also scheduled in the same manner as the subchannel. At this time, in addition to the unit address, the logical resource number is also sent to the input / output control unit side on the corresponding channel path (5861).

The above is the extended SS in the real computer mode.
Although it is a method of executing the CH instruction, in the virtual machine (VM) mode, processing for VM is added. That is, C
When the PU is in the VM mode, the following process is performed after the corresponding LRCB is obtained in process 5853 of FIG.

(A) In the LRCB, a VM information area 58
05, and the VM number VM # of the exclusive source VM is stored therein (see FIG. 8, 5805). This is similar to the occupancy source VM # in the sub-channel, when the VMC is monopolized in advance (before the VMI OS runs), the VMC
Set by P.

(B) A running VM number (this is set at the time of starting the register VM in the CPU 1000 as in the conventional case. Then, it is determined whether the VM numbers in the LRCB are equal.

(C) When these are equal, the status field of the LRCB indicates monopolization, and the I / O direct execution mode is not suppressed, the status judgment of the LRCB ( The process proceeds to 5854) in FIG.

When (d) and (c) are not satisfied, the direct execution is given up, indexed to VMCP, and the simulation is entrusted. The above is the operation on the CPU side and the channel system side for the extended SSCH instruction shown in FIG. 14, and the processing on the input / output device (IOC) side corresponding to the processing 5861 of the channel system shown in FIG. 16 will be described with reference to FIG.

The microprogram 3020 of the channel system 3000 schedules the relevant logical resource control block (LRCB), extracts the CCW from the main memory, and sends it to the IOC side. This is conventional.
The IOC4000 microprogram 4010 interprets and executes the sent CCW, and when it is a reserve CCW, configures the logical resource control table (LRCT) shown in FIG. 11 (see FIG. 17). 586
5, 5866, 5867). If it is the resource CCW, the corresponding entry of the LRCT (FIG. 11) is deleted (5870, 5871 in FIG. 18). This gives L
RCB exclusive control becomes possible.

When the CCW is a command forming a channel path group, the microprogram 4010 forms the channel path group control table CHPGCT shown in FIG. This allows the LRCB
, The channel path group can be configured (5875 and 5876 in FIG. 19).

Now, when an I / O interrupt request is issued from the I / O device, conventionally, the microprogram 4 on the IOC side is used.
010 sends the corresponding device address (UA) to the channel system 3000 side via the path 400 through the path 400. In the method of this patent, the logical resource number (LRN) ) Is also sent to the channel system side (FIGS. 20, 5880, 588).
1).

Thus, the channel system 3000
The microprogram 3020 on the side can find the corresponding LRCB and queue the interrupt request to the interrupt request queue (see FIG. 13) of the corresponding interrupt priority (see FIGS. 21, 5885, 5886, 5887). , 5888)
In response to a busy to free interrupt request on the device side, the channel system 3000 schedules the I / O request to the LRCB and the sub-channel shown in FIG. Further, in response to the I / O interrupt request, the microprogram 3020 of the channel system 3000
Finds the corresponding LRCB, sets an interrupt factor therein, and sets Pending Status of the interrupt factor of the LRCB to on (FIGS. 21, 5886, 5887). This is the same processing that the conventional channel system has performed on the sub-channel.

Further, an interrupt caused by an interrupt set in the sub-channel or LRCB by the IOP 3000 is C
FIG. 22 shows a process that is generated by the I / O interrupt means 1040 of the PU 1000 and the control is transferred to the microprogram 1060 of the CPU 1000. That is, the microprogram 1060 takes out the first element (from the I / O interrupt request queue 2080 in FIG. 13) at the corresponding interrupt priority order as in the conventional case (58 in FIG. 22).
91). It is either a sub-channel address or an LRCB address, but in the former case, it is a conventional process (5891, 5892). If it is the address of the LRCB, the corresponding LRCB is accessed, the information (interrupt parameter etc.) therein is stored in the prefix, and the interrupt is reported (5893, 5894). In this case, the corresponding logical resource number (LRN) is stored in the interrupt parameter in addition to the conventional subchannel number.

[0063]

As described above, the following is possible.

(1) A large-capacity magnetic disk device is divided into areas (logical resources) that do not overlap each other, and each area can be shared by a plurality of processes of a plurality of systems. Each area may be a file defined by the OS. This allows
The time to reserve can be greatly reduced and the sinking of each system can be reduced.

(2) The above-mentioned areas (logical resources) are used from the OS on the virtual machine, and the CPU of the VM is also used.
Direct I / O execution is possible for each area to improve performance.

[Brief description of drawings]

FIG. 1 is a diagram showing an actual computer system.

FIG. 2 is a diagram showing a virtual computer system.

FIG. 3 is a diagram showing an embodiment of the present invention.

FIG. 4 is a conceptual diagram of a logical resource of the present invention.

FIG. 5 is a diagram showing the structure of subchannels and logical resources.

FIG. 6 is a diagram showing the relationship between subchannels, logical resources, and channel paths.

FIG. 7 is a diagram showing an internal structure of a logical resource control block.

FIG. 8 is a diagram showing a VM information area in a logical resource control block.

FIG. 9 is a diagram showing a method of defining subchannels and logical resources.

FIG. 10 is a diagram showing an example of I / O request queuing to a logical resource.

FIG. 11 is a diagram showing a logical resource control table held by the input / output control device IOC.

FIG. 12 is a diagram showing a channel path group control table (CHPGCT) in the input / output control device IOC.

FIG. 13 is a diagram showing the structure of an input / output interrupt request queue.

FIG. 14 is an explanatory diagram of an extended Start Subchannel instruction used in the present invention.

FIG. 15 is a diagram showing operation specifications of an extended Start Subchannel instruction.

FIG. 16 is a diagram showing operation specifications of an extended Start Subchannel instruction.

FIG. 17 is a flowchart of a first part of command processing of an IOC microprogram.

FIG. 18 is a flowchart of the second part of command processing of the IOC microprogram.

FIG. 19 is a flowchart of a third part of command processing of an IOC microprogram.

FIG. 20 is a flowchart of processing of an IOC microprogram for an interrupt from an input / output device.

FIG. 21 is a flowchart of IOP processing in response to an interrupt request from the IOC.

FIG. 22 is a flowchart of processing of an interrupt processing microprogram.

[Explanation of symbols]

10000 ... Real computer system, 1000 ... Central processing unit CPU, 2000 ... Main storage unit, 3000 ... Input / output processor IOP, 4000 ... Input / output control unit IOC, 10
000-1 ... Virtual machine VM1, 10000-2 ... Virtual machine VM2, 10000-3 ... Virtual machine VM3, 1
000-1 ... Virtual CPU, 2000-1 ... VM main memory, 3000-1 ... VM input / output processor, 4000-
1 ... VM input / output control device, 1030 ... I / O instruction execution means, 1050 ... I / O instruction execution microprogram,
Reference numeral 1040 ... I / O interrupt means, 1060 ... I / O interrupt execution microprogram, 3020 ... Input / output processor microprogram, 2070 ... I / O request queue, 208
0 ... I / O interrupt request queue, 2090 ... Real sub-channel control block group, 2001 ... Hardware system area in main memory 2000, 2002 ... Main memory 2
Area for software in 000, 5800-D ... Magnetic disk unit, 5800 ... Logical resource control block group, 2090 ... Subchannel control block group, 5800
-1 ... Sub-channel 1 logical resource control block group,
5800-s ... Logical resource control block group of sub-channel S, 5800-s-i ... i-th logical resource control block of sub-channel s, 5800-s-i-L ... State word (LRSW) of the logical resource control block. ), 5
805 ... VM information area in the logical resource control block,
5820 ... IOC side logical resource control table (LRC
T), 5830 ... Channel path group control table (CHPGCT) in IOC, 5840 ... Extended Start Subc
hannel instruction, 6800 ... Operation Request Block (O
RB).

Claims (8)

[Claims] 1. A computer system having an auxiliary storage device, comprising: a central processing unit CPU for executing machine instructions; a channel system for controlling input / output operations; and an input / output control unit IOC for executing channel command words. The storage area of the auxiliary storage device connected to the computer system is divided into areas where users do not overlap each other, and each area is used as a logical resource, and the channel system is in that state and the I / O to that area.
An I / O execution method in a computer system that manages requests. 2. A logical resource according to claim 1,
An I / O execution method in a computer system having a step in which a channel system accepts only one reserve request from each process to the logical resource when the processes are shared by the computer system. 3. The CP of the computer system according to claim 1.
Each process executed by U issues an I / O request to each logical resource of the auxiliary storage device, and a step in which the channel system temporarily accepts one I / O request for each logical resource. I / O execution method in a computer system having 4. The channel system according to claim 1, wherein
When processing an I / O request for the logical resource, a step of issuing a start signal to the IOC on a certain channel path, a unit address corresponding to the logical resource, and the logical resource number for the IOC. And an I / O execution method in a computer system. 5. The I / O operation for a logical resource according to claim 1, when a completion interrupt request is generated,
The IOC comprises a step of transmitting an interrupt signal to a channel system on a certain channel path, and at that time, a unit address corresponding to the logical resource and a step of transmitting the logical resource number to the channel system. I / O execution method in. 6. The virtual computer system according to claim 1, wherein in a virtual computer system in which a plurality of OSs operate at the same time, the control program of the virtual computing system monopolizes the logical resource to a certain OS, and the control program executes the logical operation. Storing the OS identifier of the exclusive source in the resource control block; and when the OS issues an I / O request command for the logical resource, the command execution means of the CPU responds to the command and A computer system comprising a step of determining whether a logical resource is dedicated to the OS that issued the instruction, and a step of executing the I / O instruction without intervention of the control program when the logical resource is dedicated. I / O execution method in. 7. When the IOC interprets that the I / O request is a reserve request for a logical resource according to claim 4, the reserve request is further provided for each channel path specified by the I / O command. An I / O execution method in a computer system, which comprises a step managed by an IOC for each of the logical resources of the corresponding device. 8. The channel specified by the I / O command according to claim 4, when the IOC interprets that the I / O request is a request for forming a channel path group for a logical resource. An I / O execution method in a computer system, which comprises a step in which the IOC manages the channel path group identifier and the channel path mode for each path and for each logical resource of the device.