JPH0691398B2 - Automatic power control circuit - Google Patents

Automatic power control circuit

Info

Publication number
JPH0691398B2
JPH0691398B2 JP63188263A JP18826388A JPH0691398B2 JP H0691398 B2 JPH0691398 B2 JP H0691398B2 JP 63188263 A JP63188263 A JP 63188263A JP 18826388 A JP18826388 A JP 18826388A JP H0691398 B2 JPH0691398 B2 JP H0691398B2
Authority
JP
Japan
Prior art keywords
voltage
circuit
waveform
error
power control
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP63188263A
Other languages
Japanese (ja)
Other versions
JPH0239611A (en
Inventor
新一 大曲
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP63188263A priority Critical patent/JPH0691398B2/en
Publication of JPH0239611A publication Critical patent/JPH0239611A/en
Publication of JPH0691398B2 publication Critical patent/JPH0691398B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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  • Control Of Amplification And Gain Control (AREA)
  • Digital Transmission Methods That Use Modulated Carrier Waves (AREA)

Description

【発明の詳細な説明】 [産業上の利用分野] 本発明は、衛星通信地球局等に使用する送信装置の送信
電力制御を相当する自動制御回路に関する。
Description: TECHNICAL FIELD The present invention relates to an automatic control circuit corresponding to transmission power control of a transmitter used in a satellite communication earth station or the like.

[従来の技術] 従来、この種の自動電力制御回路としては、第3図に示
す構成のものが知られている。すなわち、第3図に示す
従来回路は、増幅した入力信号を電圧制御減衰器4に通
し、さらに検波器7において出力の一部を検波して、そ
の検波出力をリニアライズおよびピークホールドし、誤
差増幅器10により基準電圧との誤差電圧を検出して電圧
制御減衰器4にフィードバックすることにより出力電力
の制御を行なうものである。
[Prior Art] Conventionally, an automatic power control circuit of this type has a configuration shown in FIG. That is, in the conventional circuit shown in FIG. 3, the amplified input signal is passed through the voltage-controlled attenuator 4, a part of the output is detected by the detector 7, and the detected output is linearized and peak-held to obtain an error. The amplifier 10 detects an error voltage from the reference voltage and feeds it back to the voltage control attenuator 4 to control the output power.

[解決すべき課題] 上述した従来の自動電力制御回路では、出力波形によっ
て検波電圧が異なり、したがってキャリア/変調波、一
波/複数波等の相違により出力電力に差の生じる欠点が
あった。
[Problems to be Solved] In the above-described conventional automatic power control circuit, the detected voltage is different depending on the output waveform, and therefore, there is a drawback in that the output power is different due to the difference in carrier / modulation wave, one wave / a plurality of waves, or the like.

第4図(a),(b),(c)はそれぞれCW波、低ビッ
トレートの位相変調波、高ビットレートの位相変調波を
入力した場合、第3図d,e,f点にあらわれる波形を示す
ものである。この図から、ピークホールド出力(f点)
において、各波形の間の誤差が大きく生じていることが
わかる。
4 (a), (b), and (c) appear at points d, e, and f in FIG. 3 when a CW wave, a low bit rate phase-modulated wave, and a high bit rate phase-modulated wave are input, respectively. It shows a waveform. From this figure, peak hold output (point f)
In, it is understood that a large error occurs between each waveform.

本発明は上述した問題点を解決するためになされたもの
で、入力波形が変化しても出力電力の誤差を小さくおさ
えることのできる自動電力制御回路の提供を目的とす
る。
The present invention has been made to solve the above-mentioned problems, and an object thereof is to provide an automatic power control circuit capable of suppressing an error in output power even if an input waveform changes.

[課題の解決手段] 上記目的を達成するために本発明は、入力信号を増幅し
電圧制御減衰器および検波器を通して出力する回路にお
いて、上記検波器の出力電圧波形を平均化する平均化回
路と、充電時は早く放電時は遅い時定数を有する実効値
回路と、上記平均化回路および実効値回路を通した出力
電圧を入力し基準電圧との誤差相当分の電圧を上記電圧
制御減衰器にフィードバックする誤差増幅器とを具備
し、上記電圧制御減衰器は上記誤差増幅器からの電圧に
もとづき入力信号の減衰量を変化するように構成してあ
る。
[Means for Solving the Problems] In order to achieve the above object, the present invention relates to a circuit that amplifies an input signal and outputs the amplified signal through a voltage-controlled attenuator and a detector, and an averaging circuit that averages the output voltage waveform of the detector. , Inputting the output voltage that passed through the averaging circuit and the rms value circuit, which has a time constant that is fast during charging and slow during discharging, and input a voltage corresponding to the error from the reference voltage to the voltage control attenuator An error amplifier for feedback is provided, and the voltage controlled attenuator is configured to change the attenuation amount of the input signal based on the voltage from the error amplifier.

[実施例] 以下、本発明の一実施例について図面を参照して説明す
る。
[Embodiment] An embodiment of the present invention will be described below with reference to the drawings.

第1図は本実施例に係る自動電力制御回路を示すブロッ
ク図である。図面において、1,2は入力信号を増幅するI
Fアンプ、3はRF帯のパワーアンプである。また、4は
ピンダイオードで構成された電圧制御減衰器、5はアッ
プコンバージョンのミキサ、6は局部発振器、7は出力
の一部を検波する検波器である。
FIG. 1 is a block diagram showing an automatic power control circuit according to this embodiment. In the drawing, 1 and 2 are I for amplifying the input signal.
F amplifier and 3 are RF band power amplifiers. Further, 4 is a voltage controlled attenuator composed of a pin diode, 5 is an upconversion mixer, 6 is a local oscillator, and 7 is a wave detector for detecting a part of the output.

入力された信号はIF帯で増幅後、局部発振器6、ミキサ
ー5でRF帯に周波数変換され、パワーアンプ3により増
幅されて出力となる。検波器7は、この出力の一部を検
波し、検波電圧を次の平均化回路8および実効値回路9
へと送る。
The input signal is amplified in the IF band, then frequency-converted to the RF band by the local oscillator 6 and the mixer 5, amplified by the power amplifier 3 and output. The detector 7 detects a part of this output, and detects the detected voltage by the following averaging circuit 8 and effective value circuit 9
Send to.

平均化回路8は、十分に速い時定数を持つローパスフィ
ルタからなり、検波電圧を平均化する。実効値回路9
は、ダイオード9a,抵抗9b,コンデンサ9cからなり、充電
時は早く放電時は遅い時定数を有している。すなわち、
実効値回路9は、ピークホールド回路と平均化回路の中
間の動作を行なう。
The averaging circuit 8 is composed of a low-pass filter having a sufficiently fast time constant and averages the detected voltage. RMS circuit 9
Is composed of a diode 9a, a resistor 9b, and a capacitor 9c, and has a time constant that is fast during charging and slow during discharging. That is,
The effective value circuit 9 performs an intermediate operation between the peak hold circuit and the averaging circuit.

第2図(a),(b),(c)はそれぞれCW波、低ビッ
トレートの位相変調波(PSK波)、高ビットレートの位
相変調波を入力した場合、第1図のa,b,c点にあらわれ
る波形を示すものである。
2 (a), (b), and (c) are CW wave, low bit rate phase modulated wave (PSK wave), and high bit rate phase modulated wave, respectively. , shows the waveform that appears at point c.

第2図からわかるように、低ビットレートのPSK波が入
力されたときは、平均化回路8では波形がほとんど変化
せず増幅されるが、実効値回路9では、充放電の時定数
が異なるため、平均値(直流分)とピークの間で変化す
ることになる。なお、充放電の時定数は、直流分がほぼ
CWのときの値に等しくなるように決めればよい。
As can be seen from FIG. 2, when a low bit rate PSK wave is input, the waveform is hardly changed in the averaging circuit 8 and is amplified, but in the effective value circuit 9, the charge / discharge time constant is different. Therefore, it changes between the average value (DC component) and the peak. The time constant of charging and discharging is almost DC
It should be decided to be equal to the value at CW.

高ビットレートのPSK波が入力されたときは、平均化回
路8を通った後で波形がなまり、波形の平均値を中心に
振動する。実効値回路9は、このときほぼピークホール
ド回路とみなせるから、第2図(c)のc点における波
形のようになり、CWとの誤差は非常に小さくなる。
When a PSK wave having a high bit rate is input, the waveform is blunted after passing through the averaging circuit 8 and oscillates around the average value of the waveform. Since the effective value circuit 9 can be regarded as a peak hold circuit at this time, it has a waveform at point c in FIG. 2 (c), and the error from CW is very small.

上述のように、実効値回路9は、充放電の時定数を適当
に変えることにより、低ビットレートの変調波が入力さ
れたとき、変調/無変調の差を小さくする。そして、平
均化回路8は、低ビットレートの変調波のときは波形を
そのまま通し、高ビットレートになると平均化を行な
う。この二つの回路で波形の平均化を行なうことによ
り、自動電圧制御の応答速度を落すことなく、広範囲な
伝送速度の変調/無変調、一波/複数波と入力波形が変
化しても、出力電力の誤差を非常に小さくできる。
As described above, the effective value circuit 9 appropriately changes the charging / discharging time constant to reduce the difference between modulation / non-modulation when a low bit rate modulated wave is input. Then, the averaging circuit 8 passes the waveform as it is when the modulated wave has a low bit rate, and averages when the modulated bit has a high bit rate. By averaging the waveforms with these two circuits, the output speed can be changed / unmodulated over a wide range of transmission speeds, even if the input waveform changes, without changing the response speed of automatic voltage control. The error of electric power can be made very small.

平均化回路8および実効値回路9を通り平均化された検
波電圧は、誤差増幅器10に入力される。誤差増幅器10
は、入力された電圧を基準電圧と比較し、その誤差相当
分の電圧を電圧制御減衰器4にフィードバックして電力
の制御を行なう。
The detection voltage averaged through the averaging circuit 8 and the effective value circuit 9 is input to the error amplifier 10. Error amplifier 10
Compares the input voltage with a reference voltage and feeds back a voltage corresponding to the error to the voltage controlled attenuator 4 to control the power.

上述した本実施例に係る自動電力制御回路は、入力波形
に影響されることなく出力電力がほぼ一定に保たれるた
め、RFのハイパワーアンプの最大出力に対するマージン
が少なくて済み、安価である。また、マルチキャリア運
用時における一波/複数波のALC動作や広範囲な伝送速
度の変調波においてALC動作を行なうとき等にも高精度
な制御ができるという特徴を有する。
The above-described automatic power control circuit according to the present embodiment keeps the output power substantially constant without being affected by the input waveform, and therefore has a small margin for the maximum output of the RF high power amplifier, and is inexpensive. . Further, it has a feature that highly precise control can be performed even when performing ALC operation of one wave / plural waves in multi-carrier operation or ALC operation in a modulated wave having a wide transmission rate.

[発明の効果] 以上説明したように本発明の自動電力制御回路は、入力
波形が変化しても出力電力の誤差を小さくおさえること
ができる効果がある。
[Effects of the Invention] As described above, the automatic power control circuit of the present invention has an effect of suppressing an error in output power even if the input waveform changes.

【図面の簡単な説明】[Brief description of drawings]

第1図は本発明の実施例を示すブロック図、第2図
(a),(b),(c)はそれぞれ変調/無変調波を入
力したときの各部の波形図、第3図は従来回路のブロッ
ク図、第4図(a),(b),(c)は従来回路に変調
/無変調を入力したときの各部の波形図である。 1,2:IFアンプ、 3:RFパワーアンプ 4:電圧制御減衰器、5:ミキサー 6:局部発振器、7:検波器 8:平均化回路、9:実効値回路 10:誤差増幅器
FIG. 1 is a block diagram showing an embodiment of the present invention, FIGS. 2 (a), (b), and (c) are waveform diagrams of respective parts when a modulated / unmodulated wave is input, and FIG. FIG. 4A, FIG. 4B, and FIG. 4C are block diagrams of the circuit, and are waveform diagrams of respective parts when modulation / non-modulation is input to the conventional circuit. 1,2: IF amplifier, 3: RF power amplifier 4: Voltage control attenuator, 5: Mixer 6: Local oscillator, 7: Detector 8: Averaging circuit, 9: RMS circuit 10: Error amplifier

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】入力信号を増幅し電圧制御減衰器および検
波器を通して出力する回路において、上記検波器の出力
電圧波形を平均化する平均化回路と、充電時は早く放電
時は遅い時定数を有する実効値回路と、上記平均化回路
および実効値回路を通した出力電圧を入力し基準電圧と
の誤差相当分の電圧を上記電圧制御減衰器にフィードバ
ックする誤差増幅器とを具備し、上記電圧制御減衰器は
上記誤差増幅器からの電圧にもとづき入力信号の減衰量
を変化することを特徴とした自動電力制御回路。
1. A circuit for amplifying an input signal and outputting it through a voltage-controlled attenuator and a wave detector, and an averaging circuit for averaging the output voltage waveform of the wave detector and a time constant that is fast during charging and slow during discharging. And an error amplifier for inputting the output voltage that has passed through the averaging circuit and the rms circuit and feeding back a voltage corresponding to an error from the reference voltage to the voltage control attenuator. The attenuator is an automatic power control circuit characterized by changing the amount of attenuation of an input signal based on the voltage from the error amplifier.
JP63188263A 1988-07-29 1988-07-29 Automatic power control circuit Expired - Lifetime JPH0691398B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP63188263A JPH0691398B2 (en) 1988-07-29 1988-07-29 Automatic power control circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP63188263A JPH0691398B2 (en) 1988-07-29 1988-07-29 Automatic power control circuit

Publications (2)

Publication Number Publication Date
JPH0239611A JPH0239611A (en) 1990-02-08
JPH0691398B2 true JPH0691398B2 (en) 1994-11-14

Family

ID=16220613

Family Applications (1)

Application Number Title Priority Date Filing Date
JP63188263A Expired - Lifetime JPH0691398B2 (en) 1988-07-29 1988-07-29 Automatic power control circuit

Country Status (1)

Country Link
JP (1) JPH0691398B2 (en)

Also Published As

Publication number Publication date
JPH0239611A (en) 1990-02-08

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