JPH0683033B2 - Tuning device - Google Patents

Description

Description: TECHNICAL FIELD OF THE INVENTION The present invention relates to a channel selection device, and more particularly to a frequency synthesizer system channel selection device used in a color television receiver or the like.

[Technical Background of the Invention] Conventionally, a frequency synthesizer type channel selection device used in a television receiver is configured as shown in FIG. The antenna 1 receives a television broadcast signal, and the tuner 2 selects a desired channel signal. The signal is amplified and detected by the video intermediate frequency circuit 3, the synchronizing signal is obtained from the detected output by the synchronizing signal separating circuit 4, and the synchronizing signal is supplied to the signal judging circuit 5 for judging the presence or absence thereof. In order to receive the desired channel in the tuner 2, the tuning frequency applied to the voltage controlled oscillator in the tuner is changed so that the reception frequency can be selected. In order to obtain the tuning voltage, the output of the reference oscillator 9 is pulse width modulated by the pulse width modulation circuit 7 according to the data determined by the pulse width modulation data output circuit 8, and this pulse width modulation output is averaged by the filter circuit 6. Rectify to obtain a DC voltage (tuning voltage). When changing the tuning voltage to change the reception frequency, the operator gives an instruction to the step counter 11 using the control key 10. While the control key 10 is being pressed, the step counter 11 counts the clock signal and overflows the data from the pulse width modulation data output circuit 8 to overflow the data from the pulse width modulation data output circuit 7 when the overflow occurs. change. Step counter 11
The clock signal counted at is the output of the reference oscillator 9 or the output obtained by dividing this output by the frequency divider 12, and its selection is performed by the clock selection circuit 13 according to the result of the signal determination circuit 5 described above. In this case, if the judgment result of the signal judgment circuit 5 is no signal, the clock selection circuit 13 selects the output of the reference oscillator 9 as the clock signal to be added to the step counter 11, and if the judgment result is a signal, the clock selection circuit 13 selects the output of the frequency divider 12 as a clock signal to be added to the step counter 11. When there is no signal, as compared with when there is a signal, the step counter 11 counts a high-frequency reference clock signal, so the overflow output of the step counter 11 is generated at a short interval, and the output of the pulse width modulation circuit 7 is It will change at high speed. Therefore, a signalless state, which is originally unnecessary, can be quickly passed. The difference between the change speed of the output in the pulse width modulation circuit 7 when there is no signal and the change speed when there is a signal is appropriately determined by the number of frequency division stages of the frequency divider 12.

The operation of the above device will be described with reference to FIG.

It is assumed that the operator has instructed the control key 10 to increase the tuning voltage of the tuner 2 at time t = t ₀ . At this time, the tuner 2 is assumed to be in tune with the signal range of the A channel. In response to the tuning voltage up instruction, the step counter 11 counts and changes the data of the pulse width modulation data output circuit 8. At this time, since the judgment output of the signal judgment circuit 5 has a signal, the step counter 11 changes the data of the pulse width modulation data output circuit 8 at a low speed, so that the tuning frequency f of the tuner 2 is time t =. It _goes up at a speed lower than the frequency f _{A0 at} t ₀ .
After that, when the signal goes out of the signal range of the A channel at time t = t ₁ , the signal determination circuit 5 determines that there is no signal. Therefore, the step counter 11 changes the data of the pulse width modulation data output circuit 8 at high speed, and the tuner 2 tuning frequency f is up period high speed that the time t = t ₁ ~t ₂ correspond to no-signal period. At time t = t ₂ , the signal range of the B channel is reached, the signal determination circuit 5 determines that there is a signal, and the tuning frequency f of the tuner 2 increases at a low speed. The signal determination circuit 5 takes time t =
period t ₂ ~t ₃ has detected a signal enable, this period tuning frequency f of the tuner 2 is up at low speed. Time t ₂ ~
The tuning frequency f _B0 of the B channel exists within the period of t ₃ , and the B channel can be tuned at the time t _A. Holding down the control key 10, detects the no-signal state again at time t = t ₃ ~t _4, the tuning frequency f changes at high speed. After that, the same operation as described above is repeated.

[Problems of Background Art] By the way, the operator operates the control key 10 for the purpose of obtaining the synchronization of the television broadcast signal. For example, in FIG.
During t _{2 to} t ₃ , the tuning frequency f changes at a low speed, and the period t ₂
Period corresponding to the lower frequency range of the _{~t 3 a (t 2 ~t 2} +
α) requires an unnecessarily long time, and the period b (t ₂ + α to t ₃ ) corresponding to the high frequency range including the tuning frequency f _B0 is relatively short. Therefore, in order to search for the target channel, an unnecessarily long time is searched at a low speed, which causes a drop in operability. Therefore, per the search for B-channel, the portion indicated by the symbol a may increase the frequency to high speed frequency f _B0
It would be good to search at a low speed only in the vicinity of
It is impossible to perform such a search with the conventional circuit configuration.

OBJECT OF THE INVENTION It is an object of the present invention to search for a target tuning frequency in a television signal band without unnecessarily long time being required.
It is an object of the present invention to provide a channel selection device that can tune a tuner to a target channel frequency in a relatively short time and improve operability.

[Summary of the Invention] The present invention provides a tuner for selectively receiving a television broadcast signal in accordance with a tuning voltage, and a signal determining means for determining whether or not a television signal exists in a signal band selectively received by the tuner. A control means for generating the tuning voltage and continuously varying the tuning voltage based on an instruction from the operating means to control the reception frequency of the tuner so as to continuously change the signal; In the tuning device, the speed of changing the tuning voltage by controlling the control means according to the determination result of is changed at a high speed when no signal is detected and at a low speed when a signal is detected. When the judgment output of the circuit changes from the no-signal state to the signal-existing state, a holder for detecting this and holding the no-signal judgment output state of the signal judging circuit for a predetermined period. By providing this retention period is obtained by so as to fast changing the tuning voltage change speed by said speed changing means.

Embodiments of the Invention Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 is a block diagram showing an embodiment of a channel selection device of the present invention.

In this figure, a tuner 22 selects a desired channel frequency for a television broadcast signal received by an antenna 21, and the selected signal is amplified and detected by a video intermediate frequency circuit 23. Furthermore, from this detection signal, a synchronization signal separation circuit
The sync signal is separated at 24, and the sync signal is supplied to a signal circuit 25 for determining the presence or absence of the signal. The tuner 2 has a voltage controlled oscillator, and the tuning frequency can be changed by the tuning voltage. Tuning voltage is the reference oscillator
It is obtained by supplying the output of 29 to the pulse width modulation circuit 27, performing pulse width modulation with the data from the pulse width modulation data output circuit 28, and rectifying the average value of this pulse modulation output by the filter circuit 26. The control key 30 gives an instruction to the step counter 31 and the pulse width modulation data output circuit 28, and while the control key 30 is pressed, the step counter 31 counts the clock signal from the clock selection circuit 33 and the counter 31 overflows. At the same time, the pulse width modulation output data is changed, and the output of the pulse width modulation circuit 7 is changed. The clock signal counted by the step counter 31 is the output of the reference oscillator 29 or its frequency divider 32.
The output is divided by, and the output is selected by the output of the holding circuit 36 in the clock selection circuit 33. Holding circuit
A control circuit 35 causes the control circuit 35 to put the judgment output from the signal judgment circuit 25 in a holding state or release the holding operation. Further, the output of the signal determination circuit 25 is adapted to be input to the signal presence detection circuit 34 for detecting the change from the no-signal state to the signal presence state, and the rise detection signal of the signal presence is sent to the control circuit 35. The holding operation of the holding circuit 36 is controlled by this control circuit 35. When the holding circuit 36 detects the rising edge of a signal, the holding circuit 36 holds the non-signal determination output state by the signal output from the control circuit 35, and at the same time activates the holding counter 37 by the signal output from the control circuit 35.
Then, the control circuit 35 is controlled so that the holding circuit 36 holds the no-signal determination output state until the holding counter 37 outputs an overflow output. The control circuit 35 is activated by the output of the control key 30, and the clock signal counted by the holding counter 37 is input from the reference oscillator 29.

Next, the operation of the apparatus of the above embodiment will be described with reference to the operation diagram of FIG. Fig. 2 shows the control key 30 on the horizontal axis
The elapsed time t from the time of operating is taken, the vertical axis shows the change in the tuning frequency f of the tuner 2, and the elapsed time t is shown in correspondence with the signal presence / absence determination output of the signal determination circuit 25. . At time t = t ₀ , the operator is instructed to increase the tuning voltage. According to the instruction, the step counter 31 starts counting. At this time, tuner 2
Is in a state of being tuned to the tuning frequency f _A0 of the A channel, and the signal determination circuit 25 detects the presence of a signal. Therefore, the signal rise detection circuit 34 does not start and the control circuit 35 controls the holding circuit 36. Since no signal is output, the holding circuit 36
Is in the reset state. As a result, the output of the signal determination circuit 25 is guided to the clock selection circuit 33 as it is, so the clock selection circuit 33 is controlled by the signal presence determination output of the signal determination circuit 25, and the clock selection circuit 33 is divided by the frequency divider 32. A circular clock signal is selected and the tuning frequency f is increased at a low speed until time t = t ₁ . Eventually, when the time t = t ₁ is reached,
In the no-signal state, the signal judgment circuit 25 shows a no-signal judgment output, and the clock selection circuit 33 selects the output of the reference oscillator 29 as the clock signal of the step counter 31 to increase the tuning frequency f at high speed. , Reset the signal rise detection circuit 34 to prepare for detection. Then time t
= Is reached t _2, signal determination circuit 25 is a signal enable the rising edge detection circuit 34 detects the signal enable is set, a change from no-signal state to the signal present state, and outputs to the control circuit 35. The control circuit 35 confirms that the control key 30 is the tuning-up instruction, and outputs a control signal for holding the non-signal state to the holding circuit 36. At the same time, the output of the control circuit 35 activates the counting operation of the holding counter 37 and continues counting. Control circuit while the holding counter 37 is counting
Since 35 continues to output the control signal and causes the holding circuit 36 to hold the no-signal determination output state, the tuning frequency f continues to increase to a high speed. Then, at time t = t ₂ ′, the holding counter 37 overflows, its overflow output is given to the control circuit 35, and the control circuit 35 is reset.
The holding operation of the holding circuit 36 is released. At this time, the output of the signal determination circuit 25 (signal presence determination output) is the clock selection circuit.
It is added to 33 as it is, and the clock selection circuit 33 is a frequency divider 32.
Select the clock signal of the step counter 31 as the output of
The sync up speed is changed from high speed to low speed. Period or signal determination circuit 25 of the time t _'2 ~t ₃ is tuned up to the detection of the no-signal state becomes lower speed. The tuning frequency f _B0 of the B channel exists at the time t _A ′ within this low speed period. After that, the same operation as at times t ₃ , t ₄ , t ₄ ′ is repeated.

Here, comparing the time required to change from the tuning frequency f _A0 of the A channel at the start to the tuning frequency f _B0 of the next B channel, in the circuit of the conventional example of FIG. 4, as shown in FIG. ₀ well ~t in the circuit of the present invention of FIG. 1 as compared to that required time _a t ₀ ~t _a 'time _{(t a'<t a)} ,
It is clear that the time t _A ′ is sufficiently shorter than the time t _A.

FIG. 3 is a block diagram showing another embodiment of the channel selection device of the present invention.

The embodiment shown in this figure is obtained by adding a frequency divider 38 and a pulse selection circuit 39 to the circuit shown in the embodiment of FIG.
The tuner 22 selects reception band information (VHF low band) from the output of the reference oscillator 29 or the output of the reference oscillator 29 obtained by dividing the output of the reference oscillator 29 by the frequency divider 38. , VHF high band and UHF band), and the pulse selection circuit 39 performs them. With this configuration, the time until the holding counter 37 overflows can be changed depending on the reception band, and the time for holding the no-signal determination output state in the holding circuit 36 can be changed depending on the reception band. As a result, it is possible to correct the difference in sensitivity of changes in the reception frequency with respect to changes in the tuning voltage.

In the above embodiment, a plurality of independent circuits are used, but recently, a microcomputer has been used as a tuning controller. The present invention can also be applied to a channel selection device using such a microcomputer.

[Advantages of the Invention] As described above, according to the present invention, the rate of continuous change of the reception frequency of the tuner can be controlled arbitrarily by adding a simple circuit. As a result, in order to search for a target tuning frequency in the television signal band, it is possible to perform a search at a high speed in an unnecessary signal band and a low speed in an originally necessary signal band. That is, when searching for the target frequency, it is possible to realize a channel selection device with extremely good operability, which can be executed in a short time without unnecessarily long time.

[Brief description of drawings]

FIG. 1 is a block diagram showing an embodiment of a channel selection device of the present invention, FIG. 2 is an operation explanatory view of FIG. 1, FIG. 3 is a block diagram showing another embodiment of the present invention, and FIG. Is a block diagram showing a conventional channel selecting device, and FIG. 5 is an operation explanatory diagram of FIG. 22 …… Tuner, 25 …… Signal judgment circuit 26 …… Filter circuit, 27 …… Pulse width modulation circuit 28 …… Pulse width modulation data output circuit 29 …… Reference oscillator, 30 …… Control key 31 …… Step counter 32 ...... Frequency divider, 33 …… Clock selection circuit 34 …… Signal rise detection circuit 35 …… Control circuit, 36 …… Holding circuit 37 …… Holding counter

Claims (2)

[Claims] 1. A tuner for selectively receiving a television broadcast signal according to a tuning voltage, a signal determining means for determining whether or not a television signal is present in a signal band selectively received by the tuner, and a tuner for adding the signal to the tuner. Control means for creating a tuning voltage, continuously varying the tuning voltage based on an instruction from the operating means, and controlling the receiving frequency of the tuner so as to continuously change the signal, and the presence / absence of a signal of the signal determining means. A speed changing means for changing the speed at which the tuning voltage of the control means is changed according to the judgment result of 1., and a speed changing means for changing the tuning voltage at a high speed when there is no signal, and at a low speed when there is a signal. When the decision output of the decision circuit changes from the no-signal state to the signal-present state, this is detected to maintain the no-signal decision output state of the signal decision circuit for a predetermined period. And a holding means for holding and supplying the speed changing means. 2. The period during which the holding means holds the no-signal determination output state is changed according to a change in the reception band of the tuner.
Channel selection device described in the item.