JPH0681418B2 - Overdrive protection circuit for load drive - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a circuit for protecting a device for driving a load such as various kinds of lamps mounted on a vehicle from overvoltage.

2. Description of the Related Art For example, in a vehicle-mounted electronic device, a driving integrated circuit having a function of turning on various alarm lamps based on outputs of various detection devices regarding exhaust temperature, a door open / closed state, and the like is widely used. Such a driving integrated circuit is
It includes an input stage that includes a comparison unit that determines whether or not the output signal is a signal of a normal level, and an output stage that drives an actual lamp load based on a drive control signal.

FIG. 14 shows a typical prior art driving integrated circuit (hereinafter,
FIG. 3 is a block diagram showing a configuration regarding a drive circuit (abbreviated as 1). The first conventional example will be described with reference to FIG. In the first conventional example, the output terminal 2 of the drive circuit 1 is the resistor 3
Is connected to a load 4 via a power line 5 connected to a power source 5 such as a battery via a switch 6.
Connected to. In addition, the power line 7 has a pull-down resistor 8
The power supply terminal (+ B) 9 of the drive circuit 1 is connected via the.

The drive circuit 1 is configured to include a comparator 10 to which drive power is supplied from a power supply terminal 9, and Darlington-connected transistors 11 and 12. A reference voltage is connected to one of the inverting input terminal and the non-inverting input terminal of the comparator 10, and signals from the above-mentioned various sensors are input to the other input terminal, and the input signal is at an appropriate level. Determine whether or not.

FIG. 15 is a block diagram showing the configuration of the second conventional example. The conventional example is similar to the first conventional example, and corresponding parts are designated by the same reference numerals. In this conventional example, a ballast 13 that stabilizes the voltage (+ B) from the power supply 5 to the power supply terminal 9 of the drive circuit 1
The output Vcc from is supplied.

That is, the + B system power supply is used as the power supply voltage for the in-vehicle electronic devices (the voltage value varies depending on the type of vehicle, for example, 12
V) and the Vcc system power supply (5V or 8V), and there are two systems of power supply, and the configuration shown in FIG. 14 or FIG. 15 is used. In such a configuration, a positive polarity surge may occur in the + B system power supply, and in order to prevent the situation where the drive circuit 1 is destroyed by this, in any of the types shown in FIGS. 14 and 15, It is necessary to have an overvoltage protection function.

That is, with respect to the resistance of the control device (ECU) to the positive surge in the + B power supply, JIS (Japanese Industrial Standards) states that "a positive surge voltage with a maximum of 110 V and a duration of 0.188 seconds must not be destroyed." Load dump test) is specified. On the other hand, the breakdown voltage of the in-vehicle integrated circuit is V _CEO = 40-60V. Therefore, if the power supply terminal (assuming the Vcc terminal) of the integrated circuit is directly connected to the + B power supply, the integrated circuit will be destroyed in the case of the surge voltage.

If the lamp load connected to the output terminal of the integrated circuit is directly pulled up to the + B power source and used, the output transistor will be destroyed when the output is cut off. In addition, for example, it is assumed that the + B power supply (about 12V) of an ordinary passenger car is charged with the power supply (about 24V), such as a truck, in a state of "attractive".
Selected for 26V or higher.

FIG. 16 is an electric circuit diagram showing a configuration of a third conventional example which meets such a demand. In the conventional example, in the configuration shown in FIG. 14, a clamp circuit 14 having a working voltage of about 27 V, which is composed of a Zener diode, is provided between the output terminal of the comparator 10, that is, the base of the transistor 11 and the power supply terminal 9.

In such a configuration, the power supply line 7 is a clamp circuit.
When the overvoltage exceeds the preset limit voltage in 14, the clamp circuit 14 keeps the potential of the power supply terminal 9 or the limit voltage. On the other hand, the transistors 11 and 12 become conductive and the load 4 is grounded.
To prevent damage due to high voltage.

However, in such a configuration, in a vehicle or the like, the load 4 is arranged at a distance from the drive circuit 1, and a relatively long wiring is routed. Therefore, when a surge voltage occurs in the power supply line 7, the voltage level of the power supply terminal 9 does not always rise before the output terminal 2, and the potential of the output terminal 2 may rise first. In such a case, the transistor due to the action of the clamp circuit 14
There is a problem that the transistors 11 and 12 are broken down due to the surge voltage because the switching to the conductive state of the transistors 11 and 12 cannot be made in time.

FIG. 17 is a block diagram showing the configuration of a fourth conventional example which attempts to solve such a problem. In this conventional example, a resistor 1 is placed between the output terminal 2 and the power supply terminal 9 from the output terminal 2 side.
5, the diode 16 and the transistor 17 are provided. The diode 16 has a resistor 15 side as an anode, and the transistor 17 is a PNP transistor while the remaining transistors 11 and 12 are NPN transistors.

With such a configuration, when an overvoltage is generated at the output terminal 2 and no overvoltage is generated at the power supply terminal 9, the overvoltage at the output terminal 2 causes the power supply terminal (Vcc
The potential difference from the voltage of the terminal (about 13 V) increases, and the transistor 17 becomes conductive to raise the base potential of the transistor 11. As a result, the transistors 11 and 12 become conductive, and the output terminal 2 becomes low level. This level is the same as the clamp circuit
14 clamps the Vcc voltage to 13V. That is, by holding the potential of the output terminal 2 at a relatively low level as described above, destruction of the transistors 11 and 12 can be prevented.

However, in such a configuration of the related art, when Vcc power is supplied to the power supply terminal 9, the potential of the transistor 17 becomes V
The cc voltage is applied, and the transistor 17 is always turned on. As a result, the transistors 11 and 12 are turned on and the load 4
A current will flow through this, causing malfunctions such as the lamp being constantly lit.

Therefore, the power supply terminal 9 is connected to the above-mentioned Vcc power supply or + B.
When using any of the system power supplies, it is necessary to have a configuration as shown in FIG.

As another conventional technique for solving such a problem, there is a configuration shown in FIG. In this conventional example, the clamp circuits 14 and 18 are separately provided so as to clamp the potentials at the power supply terminal 9 and the output terminal 2. As a result, even if an overvoltage is applied from either side of the power supply terminal 9 and the output terminal 2, the terminals 9 and 2 can be clamped to a predetermined constant level. Even if the Vcc voltage is applied to the power supply terminal 9, the transistor 17
It is possible to avoid a situation where is always on.

However, in such a conventional technique, when an overvoltage occurs on the output terminal 2 side, the base potential of the transistor 17 is clamped to the voltage of four Zener diodes forming the clamp circuit 18, and therefore the potential of the output terminal 2 is increased. Is stable at the corresponding voltage (about 30V). As a result, the output terminal 2 cannot be switched to the low level and the transistors 11,1
The power consumption of 2 becomes large and it causes a thermal destruction.

That is, in such a situation, as shown in FIG. 19, the load 4 is normally used by being pulled up to the + B power source in the vehicle-mounted drive integrated circuit. Therefore, when a positive surge voltage of about 110V is generated at the peak time on the + B power supply, the voltage (30V) clamped by the clamp circuit 18 is applied to the transistors 11 and 12, and the peak voltage causes Since a large amount of current flows, the power consumed by the transistors 11 and 12 increases, causing breakdown breakdown in these transistors.

DISCLOSURE OF THE INVENTION Problems to be Solved by the Invention In each of the above-mentioned conventional techniques, it is impossible to prevent destruction of the transistors 11 and 12 forming the output stage of the drive circuit 1 when an overvoltage occurs at the output terminal 2. In addition to the problem, there is a problem that neither Vcc system nor + B system can be used as the power source of the drive circuit 1 in order to prevent thermal destruction.

An object of the present invention is to solve the above-mentioned technical problem, to prevent thermal destruction when an overvoltage occurs in a driving device, and to set a power source of a load driving circuit to a second power source different from the first power source voltage. It is an object of the present invention to provide an overvoltage protection circuit for a load driving device that can be used with any of the power supply voltage.

Means for Solving the Problems The present invention provides an output stage including a semiconductor switching means interposed between the other end of a load having one end connected to a first power supply voltage and a ground potential, and a first power supply voltage. A different second power supply voltage is input and is limited to a predetermined first limiting voltage, and at the time of the limitation, the semiconductor switching means is controlled to be conductive.
Voltage limiting means, second voltage limiting means provided in parallel with the output stage for limiting the drive voltage of the semiconductor switching means to a second limiting voltage, and second voltage limiting means provided with the first power supply voltage. An overvoltage protection circuit for a load driving device, comprising: switching limiting means for switching and limiting the drive voltage to a third limit voltage lower than the second limit voltage when the voltage exceeds the two limit voltage.

Further, according to the present invention, an output stage including a semiconductor switching means interposed between the other end of a load having one end connected to the first power supply voltage and the ground potential, and a second power supply voltage different from the first power supply voltage are provided. A first limiting voltage which is inputted and is limited to a predetermined first limiting voltage, and at the time of the limitation, the semiconductor switching means is controlled to be in a conducting state.
Voltage limiting means, second voltage limiting means provided in parallel with the output stage for limiting the drive voltage of the semiconductor switching means to a second limiting voltage, and the first power source voltage or the second power source voltage provided in the output stage. Or an overvoltage of the load driving device, comprising: when at least one of the output stages an overvoltage exceeding the second limit voltage is generated, a switching drive means for detecting the overvoltage and switching the semiconductor switching means to a conductive state. It is a protection circuit.

According to the present invention, when the first power supply voltage exceeds the second limit voltage, the drive voltage of the semiconductor switching means of the output stage by the second voltage control means for limiting the first power supply voltage is set to the second voltage. The switching limiting means limits switching to a third limiting voltage lower than the limiting voltage. If the third limiting voltage is selected to such an extent that the semiconductor switching means is not destroyed, thermal destruction of the semiconductor switching means in such a case can be prevented. Further, the second power supply voltage input to the first voltage limiting means is limited to the predetermined first limiting voltage. When the second power supply voltage rises and exceeds the first limit voltage, the first voltage limit means controls the semiconductor switching means to the conductive state. As a result, the load driving device is
Even when the power supply voltage and the second power supply voltage are overvoltages, respectively, they are protected.

Further, according to the present invention, when an overvoltage exceeding the second control voltage occurs in either the first power supply voltage or the second power supply voltage or the output stage, the switching drive means detects this overvoltage and conducts the semiconductor switching means. You may make it switch to a state. This also protects the load driving device from overvoltage.

Embodiment FIG. 1 is a block diagram showing the basic construction of an embodiment of the present invention, and FIG. 2 is an electric circuit diagram showing the construction of FIG. The configuration of this embodiment will be described with reference to FIGS. 1 and 2. For example, a load 21 such as various warning lights arranged on a vehicle instrument panel or the like is connected via a resistor 24 to an output terminal 23 of a drive circuit 22 which is a load driving device realized by an integrated circuit element or the like that lights this. Connected. Such a load 21 is + B as described in the section of the prior art.
It is connected to the power supply line 25 of the system power supply. The power supply line 25 is connected to the power supply terminal 27 of the drive circuit 22 via the resistor 26.

The drive circuit 22 is provided with input terminals 28 and 29, one of the input terminals 28 and 29 receives signals from various sensors, and the other input terminal receives a reference voltage.
The comparator 30 compares the signal levels to determine whether the signal level is a normal level. This comparator 30 has the power supply terminal
Power supply Vcc from 27 is given.

The output of the comparator 30 is input to the base of the transistor 32 that constitutes the output stage 31, the collector of the transistor 32 is connected to the output terminal 23, and the emitter is connected to the base of the transistor 33. The collector of transistor 33 is a transistor
Connected to 32 collectors, the emitter is grounded. A first voltage limiting means 34 having a configuration described later is connected between the power supply terminal 27 and the output stage of the comparator 30, and a second voltage limiting means is provided between the output terminal 23 and the base of the transistor 32. 35 is connected.

As shown in FIG. 2, the first voltage limiting means 34 has a structure in which Zener diodes D1, D2, D3, D4 having an operating voltage of 6.7 V are connected, for example. Second voltage limiting means
The numeral 35 includes transistors 37 and 38 which are connected to the output terminal 23 through a resistor 36 and each resistor is connected to the resistor 36. The bases of the transistors 37 and 38 are commonly connected by a line 39, the collector of the transistor 37 is directly connected to the output stage of the comparator 30 and the base of the transistor 32 via the resistor 40. Connected to line 41.

Zener diodes D5, D6, D7 and D8 having an operating voltage of 6.7 V are connected in series between the lines 39 and 40 with the line 40 side serving as an anode. In addition, between Zener diodes D5 and D6,
For example, Zener diodes D11 and D12 with operating voltage 5.4V are
The Zener diode D5 side is connected in series with the cathode as the cathode, and the anode of the Zener diode D12 is the transistor 42.
And the emitter is connected to line 41. The base is connected to the collector of the transistor 37. The Zener diodes D11 and D12 and the transistor 42 form a first voltage limiting means.

3 to 8 are diagrams and graphs schematically showing the operation of the drive circuit 22 of this embodiment. The present embodiment will be described with reference to these drawings as well.

Normal state Voltage Vcc is applied to power supply terminal 27 and + B of power supply line 25
When the power supply is properly connected to the first and second voltage limiting means 34 and 35, the output stage 31 operates in the comparator 3
It is determined by the output of 0. That is, when the output of the comparator 30 is at a high level or a low level, the transistors 32 and 33 are in a conductive / cutoff state, and the load 21 is turned on / off, for example.

At the time of overvoltage of the power supply terminal 27, the case where a surge voltage of up to 110V is about to flow into the power supply terminal 27 will be described. In FIG. 5, the horizontal axis is the surge voltage and the vertical axis is the potential of the power supply terminal 27. Due to the surge voltage inflow, the potential of the power supply terminal 27 is changed to line 1 in Fig. 4.
As shown in FIG. 1, the first limit voltage set by the zener diodes D1 to D4 constituting the first voltage limiting means 34, that is, the zener diodes D1 connected in series are increased.
When the operating voltage determined by D4 to D4 reaches, for example, about 27V, the first voltage limiting means 34 operates and the power supply terminal 27 is maintained at the first limiting voltage.

At this time, the electric charge is injected into the transistor 32 by the current passing through the first voltage limiting means 34, the transistor 33 is turned on according to the transistor 32, and the time of the line l2 showing the level of the output terminal 23 in FIG. Like the change in t1, the output terminal 23 is switched to the low level.

At the time of overvoltage of the output terminal 23 A case where a surge voltage of, for example, 110 V at maximum flows into the output terminal 23 will be described. It is assumed that the power supply terminal 27 is connected to the + B power supply. The potential of output terminal 23 is shown in Fig. 8 line
If it rises as shown by l3, line 41 is low when comparator 30 is not operating and
42 is shut off. Therefore, the level of the output terminal 23 is the operating voltage which is the second limit voltage set by the zener diodes D5 to D8, as shown by the line l9 in FIG.
For example, at the time t2 when the voltage reaches about 27V, the line 39 is clamped to this level and the transistors 37 and 38 maintain the conductive state.

This provides a voltage to the base of transistor 42,
The transistor 42 becomes conductive. Therefore, the line 39 has a third limiting voltage which is an operating voltage basically defined by the zener diodes D5, D11, D12, for example, about 20V 6.7V + 5.4V × 2 + 0.7V × 3 = 20.7V. ) 6.7V: Operating voltage of transistor D5 5.4V: Operating voltage of soena diodes D11, 12 0.7V: The voltage is clamped to the voltage between the base and the emitter of transistor 42, and as shown in Fig. 6, output terminal 23 The potential drops. This allows transistors 32, 33
The power consumption of the transistors 32, 33 can be reduced.
It is possible to prevent the thermal destruction of the.

When the potential of the output terminal 23 drops from the third limit voltage (18V), the output terminal 23 keeps the third limit voltage (about 18V) even if the surge voltage which is about to flow into the output terminal 23 gradually decreases. ), So that the transistor 42 is cut off when the surge voltage is dropped, and the transistors 37 and 38 are cut off. This allows the output terminal 23
Potential decreases in accordance with the surge voltage decreasing from the third limit voltage.

Overvoltage between power supply terminal 27 and output terminal 23 A case will be described in which a surge voltage of 110 V at maximum is applied to both the power supply terminal 27 and the output terminal 23. As the surge voltage gradually increases as shown in FIG. 8, the potentials of the power supply terminal 27 and the output terminal 23 correspondingly increase. When the surge voltage exceeds the second limit voltage (about 27V),
At the power supply terminal 27, the first voltage limiting means 34 operates to perform the operation described in the above section. Output terminal
At 23, the operation as described in the above section is performed. Here, in the above item, the output terminal 23 is clamped to the third limit voltage by the zener diodes D5, D1, and D12, but in the present operation example, the output stage 31 conducts to the ground potential,
As shown in FIG. 8, it drops to the ground potential (0V).

In this way, in the present embodiment, even when an overvoltage is generated in at least one of the power supply terminal 27 and the output terminal 23, a situation in which an excessive current flows into the drive circuit 22 and is destroyed, particularly the output terminal 23 It is possible to prevent thermal destruction of the transistors 32 and 33 in the output stage 31 due to excessive voltage.

Further, according to the present embodiment, even in the usage such that the Vcc voltage is supplied to the power supply terminal 27, it is possible to prevent the output terminal 23 from being constantly at the low level as described in the section of the prior art. It is possible to improve the usability.

FIG. 9 is an electric circuit diagram showing a detailed structure of another embodiment of the present invention. This embodiment will be described with reference to FIG. The present embodiment is similar to the above-mentioned embodiment, and corresponding parts are designated by the same reference numerals. In the configuration of the present embodiment, in addition to the configuration of the above embodiment, a delay circuit 44 to which power is supplied from the power supply terminal 27 is provided in parallel with the first voltage limiting means 34. The delay circuit 44 includes a constant current source 45 fed by the power supply terminal 27, and a capacitor 47 is connected between the constant current source 45 and the ground line 46. Constant current source
A connection point 48 between 45 and the capacitor 47 is connected to the collector of the transistor 49 and the inverting input terminal of the comparator 50. A constant voltage is supplied from the power supply 51 to the non-inverting input terminal of the comparator 50. On the other hand, the emitter of the transistor 49 is connected to the ground line 46, and the base is connected to the collector of the transistor 37 (multi-collector type).

The output of the comparator 50 is the transistor 53 that constitutes the drive circuit 52.
Connected to the base of. The emitter of the transistor 53 is connected to the ground line 46, and the collector is connected to the base of the transistor 54 which also constitutes the drive circuit 52. The collector of the transistor 54 is connected to the base of the transistor 55 which also constitutes the drive circuit 52, and the emitter of the transistor 54 and the collector of the transistor 55 are connected to the output terminal 23. The emitter of the transistor 55 is connected to the base of the transistor 33 forming the output stage.

On the other hand, the transistors 37 and 39 are provided in the second voltage limiting means 35.
The bases of the transistors are commonly connected, and transistors 56 and 57 having the same conductivity type as these are provided. The emitters of the transistors 56 and 57 are commonly connected and connected to the drive output terminal 59 of the drive circuit 22 via the resistor 58. The drive output terminal 59 is connected to the power supply line 25 via the resistor 60. The collector of the transistor 57 is connected to the base of the transistor 32, and the collector of the transistor 56 is connected to the base of the transistor 42 together with the remaining collector of the transistor 37 other than towards the transistor 49.

Here, the output stage 31 is configured to include the transistors 32 and 33.

10 to 12 are graphs for explaining the configuration shown in FIG. The operation of this embodiment will be described with reference to these drawings.

When the power supply terminal 27 is overvoltage As shown in FIG. 10, the surge voltage gradually rises, and accordingly, the voltage Vcc of the power supply terminal 27 also rises and the first limit voltage (eg 27V), the voltage rises corresponding to the surge voltage as shown by line l4 in Fig. 10. At time t5 in FIG. 10 when the potential of the power supply terminal 27 reaches the first limiting voltage, the first voltage limiting means 34 operates to inject charges into the base of the transistor 55 to make the transistors 55 and 33 conductive. Switch.
In particular, the level of the output terminal 23 is forced to switch to the low level as shown in the line 15 of FIG. Further, the level of the power supply terminal 27 is clamped to the first limit voltage by the first voltage limit means 34.

When the drive output terminal 59 is overvoltage As shown in FIG. 11, when the surge voltage flowing into the drive output terminal 59 rises, the output voltage VDR of the drive output terminal 59 also rises accordingly. The voltage VDR is the second voltage limiting means 35.
When a second limiting voltage (for example 27V) set by is reached, transistors 56 and 57 will be conductive and transistor 42 will be conductive even if line 39 is clamped to that voltage. As a result, the second voltage limiting means is clamped to the third limiting voltage (for example, about 20V = three Zener diodes having an operating voltage of, for example, 6.7V) by the diodes D6 and D7. When the operating voltage decreases from the state of exceeding 27V, the transistor 42 is cut off when the third limit voltage is reached, but at this time, the level of the drive output terminal 59 becomes lower than the second limit voltage. Therefore, the level according to the surge voltage is output. This is shown in Figure 11, line l6.

On the other hand, at time t6 when the surge voltage reaches 27V, the transistors 56 and 57, and thus the transistor 32, become conductive and the transistor 33 becomes conductive. As a result, the level of the output terminal 23 is switched to the low level as shown by the line l7 in FIG.
When the surge voltage decreases, the transistors 37, 39: 56, 57 are cut off at the time t7 when the surge voltage becomes 20V, and accordingly the transistors 32, 33 are also cut off, and the level of the output terminal 23 is high (for example, 14V). ).

When the surge voltage rises at the output terminal 23 when the output terminal 23 is overvoltage In the same manner as described above, when the surge voltage becomes 27V, the second voltage limiting means 35 operates and the transistor 42 conducts to output. The level of the terminal 23 is clamped to the third voltage.

On the other hand, due to the conduction of the transistor 37, electric charge is also injected into the base of the transistor 49, so that the transistor 49 becomes conductive.
As a result, the electric charge of the capacitor 47 charged by the constant current source 45 is rapidly discharged, and the output of the comparator 50 switches from low level to high level.

As a result, the output of the comparator 50 is inverted from the low level to the high level, the transistor 53 becomes conductive and the transistor 54 becomes conductive. As a result, the transistors 55 and 33 are also turned on, and the output terminal 23 is switched to the low level as shown by the line 18 in FIG.

When the output terminal 23 becomes low level, the transistors 37, 39, 56 and 57 are in the cut-off state as in the above-mentioned cases, so that the transistor 49 is also cut off and the capacitor 47 receives the constant current from the constant current source 45. Therefore, the electric charge is supplied. As a result, after the time t shown in the second equation, the output of the comparator 50 is inverted from high level to low level, and
53 is also cut off. As a result, the transistor 54 is also cut off, and the level of the output terminal 23 becomes the clamp level obtained by the diodes D5 to D7.

Assuming that the surge voltage gradually rises, the level of the output terminal 23 becomes 27 V or higher, and the operation as described above is performed again to switch the level of the output terminal 23 to the low level. That is, when the surge voltage rises above 27V, the level of the output terminal 23 repeats between 20V and the ground potential.

On the other hand, it is assumed that the surge voltage decreases from the state where it exceeds 27V. In this case, the transistors 53, 54, 55, 33 are cut off, the transistor 42 is cut off when the potential becomes 20 V or less in the state where the output terminal 23 is cut off from the ground potential, and the transistors 37, 38, 56, 57 remains stuck. Therefore, the delay circuit 44 does not operate and the level of the output terminal 23 decreases corresponding to the surge potential.

As described above, according to each of the above-described embodiments, even when an overvoltage is applied to any of the output terminal 23, the power supply terminal 27, and the drive output terminal 59, this is clamped to a voltage at which the drive circuit 22 is not destroyed. Or can be forced to ground potential. As a result, destruction of the drive circuit 22 due to overvoltage or heat due to large power consumption can be prevented. As the power source, either Vcc system or + B system can be used.

FIG. 13 is an electric circuit diagram showing still another configuration example of the present invention. This configuration example is similar to the configuration example shown in FIG. 9, and corresponding parts are designated by the same reference numerals. In this configuration example, the first voltage limiting means 34 is composed of a constant current source 61 and diodes 62, 63, 64. In the delay circuit 44, the comparator 50 is specifically, a transistor 65 whose collector is connected to the base and whose collector is connected to the power supply terminal 27.
, A collector is connected to the base of the transistor 65, and a transistor 66 connected to the emitter of the transistor 65 is used as the base.

A resistor 67 is interposed between the emitter and the base of the transistor 56, and this resistor is connected to the ground line 46 via a diode 68 and a resistor 69. The cathode of the diode 68 is connected to the base of the transistor 70,
Is connected to the cathode of the diode 64 constituting the first voltage limiting means, and the emitter is connected to the ground line 46. With such a configuration, the above-described operations and effects can be similarly realized.

As described above, according to the present invention, when the first power source voltage exceeds the second limit voltage, the second voltage limiting means for limiting the first power source voltage drives the semiconductor switching means in the output stage. The voltage is switched to the third limiting voltage lower than the second limiting voltage, and the switching is limited by the limiting means. If the third limiting voltage is selected to such an extent that the semiconductor switching means is not destroyed, thermal destruction of the semiconductor switching means in such a case can be prevented. Further, in the load driving device, even when the first power supply voltage and the second power supply voltage are overvoltage, the load drive device is protected.

Further, according to the present invention, when an overvoltage exceeding the second limit voltage occurs in any of the first power supply voltage or the second power supply voltage or the output terminal, the switching drive means detects this overvoltage and turns on the semiconductor switching means. You may make it switch to a state. This also protects the load driving device from overvoltage.

[Brief description of drawings]

FIG. 1 is a block diagram showing the constitution of an embodiment of the present invention, and FIG. 2 is an electric circuit diagram showing the constitution example of FIG. 1, FIG. 3, and FIG.
FIG. 7 and FIG. 7 are block diagrams showing the operation state of this embodiment in detail, FIGS. 4, 6 and 8 are graphs for explaining the operation of this embodiment, and FIG. 9 is another of the present invention. FIG. 10 is an electric circuit diagram illustrating an embodiment, FIG. 10 to FIG. 12 are graphs illustrating the operation of the present embodiment, FIG. 13 is an electric circuit diagram illustrating a configuration of still another embodiment of the present invention, and FIG. , Figure 15 shows typical first and second
An electric circuit diagram for explaining a conventional example, FIG. 16 is an electric circuit diagram showing a configuration of a typical third conventional technique, FIG. 17 is an electric circuit diagram showing a configuration of a fourth conventional example, and FIG. 18 is FIG. 19 is an electric circuit diagram showing the configuration of the fifth conventional example, and FIG. 19 is an electric circuit diagram for explaining the problem. 21 ... Load, 22 ... Drive circuit, 23 ... Output terminal, 25 ... Power supply line, 27 ... Power supply terminal, 31 ... Output stage, 34 ... First voltage limiting means, 35 ... Second voltage limiting means, 44 ... Delay circuit, 52 ... Drive circuit, 59 ... Drive output terminal

Claims (2)

[Claims] 1. An output stage including a semiconductor switching means interposed between the other end of a load whose one end is connected to the first power supply voltage and the ground potential, and a second power supply voltage different from the first power supply voltage. A first limiting voltage which is inputted and is limited to a predetermined first limiting voltage, and at the time of the limitation, the semiconductor switching means is controlled to be in a conducting state.
Voltage limiting means, second voltage limiting means provided in parallel with the output stage for limiting the drive voltage of the semiconductor switching means to a second limiting voltage, and second voltage limiting means provided with the first power supply voltage. An overvoltage protection circuit for a load drive device, comprising: switching limiting means for switching the driving voltage to a third limiting voltage lower than the second limiting voltage when the voltage exceeds the second limiting voltage. 2. An output stage including a semiconductor switching means interposed between the other end of a load having one end connected to the first power supply voltage and the ground potential, and a second power supply voltage different from the first power supply voltage. A first limiting voltage which is inputted and is limited to a predetermined first limiting voltage, and at the time of the limitation, the semiconductor switching means is controlled to be in a conducting state.
Voltage limiting means, second voltage limiting means provided in parallel with the output stage for limiting the drive voltage of the semiconductor switching means to a second limiting voltage, and the first power source voltage or the second power source voltage provided in the output stage. Or an overvoltage of the load driving device, comprising: when at least one of the output stages an overvoltage exceeding the second limit voltage is generated, a switching drive means for detecting the overvoltage and switching the semiconductor switching means to a conductive state. Protection circuit.