JPH0681417B2 - Digital bus protection relay - Google Patents

Digital bus protection relay

Info

Publication number
JPH0681417B2
JPH0681417B2 JP31897788A JP31897788A JPH0681417B2 JP H0681417 B2 JPH0681417 B2 JP H0681417B2 JP 31897788 A JP31897788 A JP 31897788A JP 31897788 A JP31897788 A JP 31897788A JP H0681417 B2 JPH0681417 B2 JP H0681417B2
Authority
JP
Japan
Prior art keywords
current
calculation
data
calculation means
waveform
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP31897788A
Other languages
Japanese (ja)
Other versions
JPH02164225A (en
Inventor
伸夫 江田
正司 臼井
俊夫 安斉
好文 大浦
邦夫 松沢
和芳 吉田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Tokyo Electric Power Company Holdings Inc
Original Assignee
Tokyo Electric Power Co Inc
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Electric Power Co Inc, Mitsubishi Electric Corp filed Critical Tokyo Electric Power Co Inc
Priority to JP31897788A priority Critical patent/JPH0681417B2/en
Publication of JPH02164225A publication Critical patent/JPH02164225A/en
Publication of JPH0681417B2 publication Critical patent/JPH0681417B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Description

【発明の詳細な説明】 〔産業上の利用分野〕 この発明は電力系統の母線の事故を電流差動原理を用い
て検出するデイジタル比率差動母線保護継電装置に関す
るものである。
Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a digital ratio differential busbar protective relay device for detecting an accident in a busbar of a power system by using a current differential principle.

〔従来の技術〕[Conventional technology]

第6図は例えば特公昭58-18863号公報に示された従来の
デイジタル母線保護継電装置である。図において(9)
は加算器、(10)は差動量導出演算回路、(11-1)〜
(11-n)は絶対値導出回路、(12)は加算器、(13)は
抑制量導出演算回路、(14)は減算器、(15)は比較器
である。
FIG. 6 shows a conventional digital busbar protective relay device disclosed in, for example, Japanese Patent Publication No. 58-18863. In the figure (9)
Is an adder, (10) is a differential amount derivation arithmetic circuit, (11-1) ~
(11-n) is an absolute value deriving circuit, (12) is an adder, (13) is a suppression amount deriving arithmetic circuit, (14) is a subtractor, and (15) is a comparator.

次に動作について説明する。母線の事故を検出する方法
には一般的にキルヒホツフ第1法則を適用した差動方式
があり、具体的には母線に接続する全回線に設置された
各変流器の2次電流をベクトル合成し、そのベクトル和
が規定値以上あれば母線の事故と判定するものである。
しかし、実際的には変流器の飽和等による誤差電流でリ
レーが誤動作することを防止する目的で比率原理とする
ことが多く、第6図の実施例ではその抑制量として変流
器2次電流絶対値の和に比例したものを利用している。
変流器より導入したアナログ量の電流は図示なしのアナ
ログ−デイジタル変換器でデイジタル電流量に変換さ
れ、第6図に示す電流I1,I2…Inとなる。加算器(9)
では瞬時値の電流I1,I2…Inを加算して、瞬時的な差動
値IDを求め、これを演算回路(10)にて演算し、例えば
現時点データの2乗値と1/4サイクル前データとの2乗
値を加算し、差動値IDの2乗ピーク値に比例した動作量
ID 2をとり出す。導出回路(11-1)〜(11-n)は各変流
器の2次電流よりサンプリングされた電流I1,I2…In
絶対値を各々導出し、これを加算器(12)により瞬時絶
対値の抑制量IRを|I1|+|I2|+…|In|=IRとして
求める。この抑制量IRはまだ瞬時値データのため、サン
プリング周期毎に大きさが変化するもので、演算回路
(13)に導入し、1/2サイクル間積分し、サンプリング
周期により変化しない値とし、さらに動作量と協調がと
れるように2乗演算した上に抑制比率としての定数Kを
乗じて抑制量KIR 2を得る。減算器(14)はリレーの比
率特性を作るもので、演算回路(10)の動作量ID 2と演
算回路(13)の抑制量KIR 2を導入し、ID 2−KIR 2の減
算を行なう。この結果を比較器(15)で定数KOと比較
し、定数KOより大の時は母線の内部事故と判定し、保護
動作を実行させるための信号を出力する。
Next, the operation will be described. Generally, there is a differential method applying Kirchhoff's first law to detect an accident on a bus. Specifically, the secondary current of each current transformer installed on all lines connected to the bus is vector-synthesized. However, if the vector sum is greater than or equal to the specified value, it is determined that the busbar has an accident.
However, in practice, the ratio principle is often used for the purpose of preventing the relay from malfunctioning due to an error current due to saturation of the current transformer, and in the embodiment of FIG. A value proportional to the sum of absolute current values is used.
An analog amount of current introduced from the current transformer is converted into a digital current amount by an analog-digital converter (not shown) and becomes currents I 1 , I 2 ... I n shown in FIG. Adder (9)
Then, the instantaneous currents I 1 , I 2 ... I n are added to obtain an instantaneous differential value I D , and this is calculated by the arithmetic circuit (10). For example, the square value of the current data and 1 / 4 The cycle value of the previous data is added, and the operation amount is proportional to the square peak value of the differential value I D.
Take out I D 2 . The derivation circuits (11-1) to (11-n) derive the absolute values of the currents I 1 , I 2 ... I n sampled from the secondary currents of the respective current transformers, and add them to the adder (12). Then, the suppression amount I R of the instantaneous absolute value is determined as | I 1 | + | I 2 | + ... | I n | = I R. Since this suppression amount I R is still instantaneous value data, its magnitude changes at each sampling cycle, so it is introduced into the arithmetic circuit (13), integrated for 1/2 cycle, and made a value that does not change depending on the sampling cycle. Further, a square calculation is performed so as to obtain cooperation with the motion amount, and then a constant K as a suppression ratio is multiplied to obtain a suppression amount KI R 2 . Subtractor (14) intended to make the ratio characteristic of the relay, the arithmetic circuit suppression quantity KI R 2 operation amount I D 2 and the arithmetic circuit (10) (13) is introduced, the I D 2 -KI R 2 Perform subtraction. This result is compared with a constant K O by a comparator (15), and when it is larger than the constant K O , it is determined to be an internal accident in the bus and a signal for executing a protection operation is output.

〔発明が解決しようとする課題〕[Problems to be Solved by the Invention]

従来のデイジタル母線保護継電装置は以上のように構成
されているので、演算式ID 2−KIR 2でも明らかなよう
に、2乗演算を要するため演算に時間がかかり、又内部
事故時に確実な動作をさせるために、抑制量KIR 2をあ
る一定値以下にする必要があり、外部事故時の極端なCT
飽和に対しては誤動作する可能性があるなどの問題点が
あつた。
Since the conventional digital bus protective relay device is constructed as above, as it is clear even arithmetic expression I D 2 -KI R 2, takes time operation because it takes square operation, also when an internal fault In order to ensure reliable operation, it is necessary to set the suppression amount KI R 2 to a certain value or less, and extreme CT during an external accident
There was a problem such as the possibility of malfunction due to saturation.

この発明は上記のような問題点を解消するためになされ
たもので、演算時間が早く、外部事故時に極端なCT飽和
を生じても誤動作の心配がないデイジタル母線保護継電
装置を得ることを目的とする。
The present invention has been made to solve the above problems, and it is an object of the invention to obtain a digital busbar protective relay device which has a short calculation time and does not have a risk of malfunction even if extreme CT saturation occurs in the event of an external accident. To aim.

〔課題を解決するための手段〕[Means for Solving the Problems]

この発明に係るデイジタル母線保護継電装置は差動電流
が一定値以上ある場合に動作する差動要素と各回線の変
流器2次電流の内最大値に比例した電流の絶対値|IT
と差動電流の絶対値|ID|の瞬時値を利用し、|IT|−
(η1|ID|+η2|IDt|)>K2(但しη1,η2,K2
定数、IDtは例えば90°前サンプリングデータによる差
動電流)の演算をする比率要素とを設け、この比率要素
が動作時は一定時間差動要素の動作出力をロツクするよ
うにしたものである。
The digital bus protection relay device according to the present invention operates when the differential current exceeds a certain value and the absolute value of the current proportional to the maximum value of the secondary current of the current transformer of each line | I T
The absolute value of the differential current | using an instantaneous value of, | | I D I T | -
1 | I D | + η 2 | I Dt |)> K 2 (where η 1 , η 2 and K 2 are constants, I Dt is a differential current based on 90 ° pre-sampled data, for example) Is provided, and the operation output of the differential element is locked for a certain period of time during operation of this ratio element.

〔作用〕[Action]

この発明における比率要素は、内部事故時には不動作と
するために差動電流|ID|又は|IDt|の効果により端
子電流|IT|を完全に打消して動作を阻止し、外部事故
時には大電流が貫通して差動要素が誤動作しても、この
比率要素が完全に動作して最終出力をロックするように
したものであり、その着眼点は外部事故時に大電流が貫
通してCT飽和を生じる場合でも、必ず一定時間は不飽和
期間があり、この期間内に外部事故を判定するものであ
る。
The ratio element in this invention prevents the operation by canceling the terminal current │I T │ completely by the effect of the differential current │I D │ or │I Dt │ in order to make it inoperative in the case of an internal accident. Sometimes, even if a large current penetrates and the differential element malfunctions, this ratio element operates completely and locks the final output.The point is that a large current penetrates in the event of an external accident. Even if CT saturation occurs, there is always an unsaturation period for a certain period of time, and an external accident is judged within this period.

〔発明の実施例〕Example of Invention

以下、この発明の一実施例を図について説明する。第1
図において(1)は母線、(2-1)〜(2-n)は変流器、
(3-1)〜(3-n)は変流器(2-1)〜(2-n)の2次電流
に比例した適当な出力を変換し、不要な高調波分を除去
する入力変換器、(4)はデジタルリレー、(5)はA/
D変換器、(6)は入力データや計算結果等を一時的に
記憶するメモリー(以下RAMと称する)、(7)はプロ
グラムを記憶しているメモリー(以下ROMと称する)、
(8)はマイクロプロセツサー(以下CPUと称する)。
An embodiment of the present invention will be described below with reference to the drawings. First
In the figure, (1) is a bus bar, (2-1) to (2-n) are current transformers,
(3-1) to (3-n) are input converters that convert an appropriate output proportional to the secondary current of the current transformers (2-1) to (2-n) and remove unnecessary harmonic components. Vessel, (4) digital relay, (5) A /
D converter, (6) memory for temporarily storing input data, calculation results, etc. (hereinafter referred to as RAM), (7) memory for storing programs (hereinafter referred to as ROM),
(8) is a microprocessor (hereinafter referred to as CPU).

変流器(2-1)〜(2-n)の2次電流は図示していない
が、サンプルホールド回路、マルチプレクサー、アナロ
グ−デジタル変換器等から構成されるA/D変換器(5)
により、一定周期毎の電流瞬時値に比例したデジタル量
I1〜Inに変換される。このデジタル電流入力はRAM(1
2)に書き込まれ、ROMに記憶している演算プログラムに
従がい、データをRAMより読み出しながらCPUが演算を実
行する。デジタルリレーの保護性能はプログラムの組み
方が決定され、その優劣は、いかに効率的に(演算時間
を短かく)目的を達成できるかにある。
Although the secondary currents of the current transformers (2-1) to (2-n) are not shown, an A / D converter (5) composed of a sample hold circuit, a multiplexer, an analog-digital converter, etc.
The digital amount proportional to the instantaneous current value for each fixed period
It is converted to I 1 ~I n. This digital current input is RAM (1
The CPU executes the calculation while reading the data from the RAM according to the calculation program written in 2) and stored in the ROM. The protection performance of the digital relay is determined by how the program is set up, and its advantage lies in how efficiently the objective can be achieved (shortening the calculation time).

第2図は本発明の原理を説明するための波形図、第3図
は原理ブロツク図、第4図は動作特性を表わす1端子比
率特性図、第5図は本原理のプログラムを作るためのフ
ロー図である。第2図は母線外部事故時、事故端の変流
器に事故電流が集中し極端なCT飽和を生じた場合の例を
示している。波形ΣI1Nは流入端変流器2次電流の和
で、きびしい条件を考え流入端変流器は飽和してないも
のとしている。波形IOUTは外部事故端変流器の2次電流
で過大電流と過渡直流分電流が影響で極端なCT飽和を生
じた場合を示している。波形IDは差動電流で流入端電流
和I1Nと流出端電流IOUTをベクトル合成したものを示
し、比率差動リレーの動作量として作用する。波形|IT
|は各変流器2次電流中最も大きい値に比例した電流の
絶対値で、これを最大値抑制量と称する。通常の比率差
動リレーは波形IDの大きさと波形|IT|の大きさを比較
し、大きさの比が一定値以上で波形IDが大きい場合動作
するもので、その大きさの比K=ID/IR又はK=ID 2/I
R 2は前述の通り内部事故で完全に動作できるようにK<
1の適当値となつているので、例えば事故電流中に直流
分を含有すれば、変流器は極端に飽和してしまい誤動作
することになる。本原理の目的は、このように極端なCT
飽和を生じても誤動作しない高性能なものとすることに
ある。尚波形|IT|の点線部では実線には、流入端電流
によるものが発生するが、簡単のため、省略し、きびし
い側にしている。波形η1|ID|は波形IDの絶対値に定
数η1を乗じたもので、波形η2|IDt|は波形IDより時
間t前のサンプリングデータより演算した差動量|IDt
|に定数η2を乗じたもの、すなわち波形η1|ID|を時
間tだけ位相シフトしたものに定数η2を乗じたものと
なる。波形|IR|は波形|IT|より波形η1|ID|+η2
|IDt|を減じて、その差が正となつた場合のみ、その
差分が現われる事を示している。波形(118)は、波形
|IR|のレベルがK2以上の時のみ発生するもので、|IR
|=|IT|−(η1|ID|+η2|IDt|)の演算結果が
|IR|K2で出力(118)を生じる事を示す。波形(11
9)は波形(118)が発生すれば時間TRの間その信号を引
延すことを示しており、波形(118)のパルス信号を波
形LOCKのように連続化するものである。
FIG. 2 is a waveform diagram for explaining the principle of the present invention, FIG. 3 is a principle block diagram, FIG. 4 is a one-terminal ratio characteristic diagram showing operating characteristics, and FIG. 5 is a program for making this principle. It is a flowchart. Fig. 2 shows an example of a case in which an accident current concentrates on the current transformer at the accident end and causes an extreme CT saturation during an external bus line accident. The waveform ΣI 1N is the sum of the secondary current of the inflow end current transformer, and it is assumed that the inflow end current transformer is not saturated in consideration of severe conditions. Waveform I OUT shows the case where the secondary current of the external fault end current transformer causes excessive CT saturation due to the influence of excessive current and transient DC component current. Waveform I D shows the vector sum of the inflow end current sum I 1N and the outflow end current I OUT as a differential current, and acts as the operation amount of the ratio differential relay. Waveform | IT
| Is the absolute value of the current proportional to the largest value among the secondary currents of the respective current transformers, and this is called the maximum suppression amount. The normal ratio differential relay compares the size of the waveform I D with the size of the waveform | I T | and operates when the ratio of the sizes is greater than a certain value and the waveform I D is large. K = I D / I R or K = I D 2 / I
As mentioned above, R 2 is designed to be fully operational in an internal accident K <
Since it is an appropriate value of 1, for example, if a DC component is included in the fault current, the current transformer will be extremely saturated and malfunction. The purpose of this principle is to
It is to be a high-performance device that does not malfunction even if saturation occurs. I T | | waveform Note the dotted portion in solid line, but by inflow end current occurs, for simplicity, omitted, and the severe side. The waveform η 1 │I D │ is the absolute value of the waveform I D multiplied by a constant η 1 , and the waveform η 2 │I Dt │ is the differential amount | I calculated from the sampling data before time t of the waveform I D. Dt
It is a product of | multiplied by a constant η 2 , that is, a product of the waveform η 1 | I D | phase-shifted by time t multiplied by a constant η 2 . Waveform │I R │ is waveform │I T │ waveform η 1 | I D | + η 2
It is shown that the difference appears only when | I Dt | is subtracted and the difference becomes positive. Waveform (118) is a waveform | those levels occurs only when the K 2 or more, | | I R I R
It is shown that the calculation result of | = | I T | − (η 1 | I D | + η 2 | I Dt |) produces an output (118) at | I R | K 2 . Waveform (11
9) shows that if the waveform (118) occurs, the signal is stretched for the time T R , and the pulse signal of the waveform (118) is made continuous like the waveform LOCK.

この出力波形LOCKはリレーの動作をロツクするものであ
る。本原理の着眼点はCT飽和現象を波形的に活用するも
ので、どんな変流器でも事故発生直後一定時間は不飽和
期間があり、又第2波以降も事故電流中の直流分減衰に
応じて発生する交流分の負波期間と負波面積に見合つた
正波面積相当時間の不飽和期間があるので、この不飽和
期間で外部事故判定をし、その結果(ロツク出力)を一
定時間継続させることにより飽和期間の誤動作を防止す
るものである。一方内部事故時は各回線のCT2次電流よ
り差動電流の方が必ず大きいか等しい関係にあるため、
波形IRは差動電流で消去されてしまうことになり、ロツ
ク出力は発生しないことになる。又、内部事故時は各回
線の電流位相が異なる場合とか、事故時の歪波電流等
で、差動電流IDに対し、各回線の電流に比例して発生す
る端子抑制電流|IT|の位相がずれても、確実に波形|
IT|を消去できるように波形η1|ID|とは別に補助の
η2|IDt|を|ID|より作り、η1|ID|+η2|ID|又
はη1|ID|とη2|IDt|の内大きい方で抑制消去する
ようにしている。尚波形η2|IDt|のη2は定数でη|
η2の適当値とし|IDt|は|ID|より時間tだけ移相シ
フトしたものである。第3図の(101)は差動電流ID
一定値以上の時動作する差動要素、(102)は第2図で
説明した性能を有する瞬時絶対値の端子抑制量|IT|と
差動量|ID|を瞬時比較演算する瞬時絶対値比較比率要
素、(103)は要素(102)の出力を一定時間引延すため
の引延しタイマー、(104)は否定入力端子付のAND要素
で、要素(101)が動作し、引延しタイマー(103)の出
力が無い時に動作する。(105)は要素(104)の出力が
連続して複数回動作した場合出力を出すものである。尚
以上の構成要素はすべてデイジタルリレー(4)でソフ
トウエアー的に処理されるものである。第4図は本発明
の基本特性の一つである基本波入力1端子比率特性で差
動量IDと端子抑制量ITとの関係を示している。特性(10
6)は差動量IDが一定値以上の時動作する動作特性(要
素(101)の特性)、(107)は差動量IDと抑制量|IT
の比が一定値以下で動作する特性(要素(102)の特
性)で、総合的には特性(106)の動作域と特性(107)
の不動作域の重なり部分がリレーの動作域である。尚特
性(107)は前記第2図で説明したように、その演算原
理が|IT|−(η1|ID|+η2|IDt|)=|IT|−|I
R|K2であるため、定数K2をK2≒0とすれば|IT|とI
Dが一定比の関係となることを示している。
This output waveform LOCK locks the operation of the relay. The main point of this principle is to utilize the CT saturation phenomenon in a waveform. Any current transformer has an unsaturated period for a certain time immediately after the accident occurs, and after the second wave, it depends on the DC component attenuation in the accident current. Since there is a negative wave period corresponding to the alternating current generated and an unsaturated period corresponding to the positive wave area corresponding to the negative wave area, an external accident judgment is made during this unsaturated period and the result (lock output) is continued for a certain period of time. This prevents malfunction during the saturation period. On the other hand, at the time of an internal accident, the differential current is always greater than or equal to the CT secondary current of each line.
The waveform I R will be erased by the differential current, and the lock output will not occur. Further, when an internal accident Toka when the current phase of each line is different, a strain wave current or the like at the time of the accident, the differential current I D to the terminal inhibition current generated in proportion to the respective line current | I T | Waveform even if the phase of
I T | waveform eta 1 to allow erased | I D | Separately aid of eta 2 is | I Dt | a | I D | make more, η 1 | I D | + η 2 | I D | or eta 1 | The larger of I D | and η 2 | I Dt | is used for suppression elimination. Incidentally waveform η 2 | I Dt | of eta 2 are constants eta |>
│I Dt │ is an appropriate value of η 2 and is phase-shifted from │I D │ by time t. (101) in FIG. 3 is a differential element that operates when the differential current I D is a certain value or more, and (102) is the terminal suppression amount | I T | of the instantaneous absolute value having the performance described in FIG. Instantaneous absolute value comparison ratio element for instantaneous comparison calculation of the differential amount | I D |, (103) is a delay timer for delaying the output of the element (102) for a certain period of time, and (104) is a negative input terminal With the AND element of, the element (101) operates and operates when there is no output of the delay timer (103). (105) outputs an output when the output of the element (104) operates continuously a plurality of times. All the above components are processed by the digital relay (4) as software. FIG. 4 shows the relationship between the differential amount I D and the terminal suppression amount I T in the fundamental wave input 1 terminal ratio characteristic which is one of the basic characteristics of the present invention. Characteristic (10
6) is the operating characteristic (characteristic of element (101)) that operates when the differential amount I D is a certain value or more, and (107) is the differential amount I D and the suppression amount | IT |
Is a characteristic (the characteristic of the element (102)) that operates when the ratio of is less than a certain value. Overall, the operating range of the characteristic (106) and the characteristic (107)
The overlapping part of the non-operating area of is the operating area of the relay. As described with reference to FIG. 2, the characteristic (107) has a calculation principle of | I T |-(η 1 | I D | + η 2 | I Dt |) = | I T |-| I
Since R | K 2 , if the constant K 2 is K 2 ≈0, then | I T | and I
It shows that D has a constant ratio relationship.

本発明の原理プログラムを示すフロー図を第5図に示
す。(110)の処理ブロツクは第1図に示す変流器(2-
1)〜(2-n)の2次電流に比例した出力を変換器(3-
1)〜(3-n)で適当な電圧に変換し、A/D変換器(5)
でこれらの瞬時値を一斉に同一時刻一定周期でサンプリ
ングしたものをさらにアナログ/デジタル変換し、この
出力データI1〜Inをメモリー(6)に一時記憶していた
ものを順次読み出すことを示す。メモリー(6)よりデ
ータI1〜Inを読み出しCPU(8)で加算して を求め(ブロツク(113)の処理)、さらに差動量ID
絶対値|ID|を算出(ブロツク(114)の処理)し結果
をメモリー(6)に一時格納する。又別の分岐処理とし
て、データI1〜Inの絶対値|I1|〜|In|を算出(ブロ
ツク(111)の処理)し、その内の最大値|IT|=|Max
〔|I1|〜|In|〕|を算出(ブロツク(112)の処
理)し、結果をメモリー(6)に一時格納する。次にメ
モリー(6)に一時記憶しているデータ|IT|,|ID|及
びt時間前例えば90°前サンプリングデータによる|I
Dt|を順次読み出し|IR|=|IT|−(η1|ID|+η2
|IDt|)を演算(ブロツク(116)の処理)し、|IR
K2(K2は定数)を判定した場合出力信号を出す(ブロ
ツク(117)の処理)。尚、この出力信号は一定時間TR
の間動作保持させ、保持時間TRの間に再度ブロツク(11
7)の動作信号がくればタイマーをカウントし直し、さ
らにTR時間保持するようにする(ブロツク(119)の処
理)。次にブロツク(120)の処理として差動量IDの振
幅値演算をするが、これは絶対値|ID|を1/2サイクル
分加算して で平均値を演算する整流形とか瞬時値IDの現データ2乗
値と1/2サイクル前データ2乗値の和を求めるベクトル
形等既知の手法で演算する。以上の演算結果(118)
(要素(102)動作)と(122)(要素(101動作)の論
理判定をNOT回路123、AND回路(124)で実施し、最終的
に複数回連続動作を確認すれば母線事故と判定してリレ
ー出力を出すものである。
A flow chart showing the principle program of the present invention is shown in FIG. The processing block of (110) is the current transformer (2-
1) to (2-n) output proportional to the secondary current
1) to (3-n) convert to an appropriate voltage and A / D converter (5)
Indicating that those sampled at the same time a constant period in unison these instantaneous values further analog / digital conversion, reads what the output data I 1 ~I n has been temporarily stored in the memory (6) sequentially in . Data I 1 to I n are read from the memory (6) and added by the CPU (8) (Block (113) processing), the absolute value | I D | of the differential amount I D is calculated (block (114) processing), and the result is temporarily stored in the memory (6). As a branch processing Matabetsu, the absolute value of the data I 1 ~I n | I 1 | ~ | I n | ( processing block (111)) calculated by the maximum value of which | I T | = | Max
[| I 1 |-| I n |] | is calculated (block (112) processing), and the result is temporarily stored in the memory (6). Next, the data temporarily stored in the memory (6) | I T |, | I D |
Dt | is read sequentially | I R | = | I T |-(η 1 | I D | + η 2
| I Dt |) is calculated (block (116) processing) and | I R |
When K 2 (K 2 is a constant) is determined, an output signal is output (block (117) processing). Note that this output signal is a predetermined time T R
Is operated maintained for, again blocks during the holding time T R (11
If me operation signal 7) is re-counts the timer, so as to hold more T R-time processing (block (119)). Next, the amplitude value of the differential amount I D is calculated as the process of the block (120). This is done by adding 1/2 cycle of the absolute value | I D | The calculation is performed by a known method such as a rectification type in which the average value is calculated, or a vector type in which the sum of the current data square value of the instantaneous value I D and the data square value before 1/2 cycle is calculated. Calculation results above (118)
The logical judgment of (element (102) operation) and (122) (element (101 operation) is performed by the NOT circuit 123 and the AND circuit (124), and finally, if continuous operation is confirmed a plurality of times, it is judged as a bus accident. Relay output.

なお、上記実施例では第5図の処理ブロツク(116)で
|IR|=|IT|−(η1|ID|+η2|IDt|)とした
が、(η1|ID|+η2|IDt|)の替わりにη1|ID|又
はη2|IDt|の内大きい方を利用するようにしても良い
し、|IDtは現在データ|ID|より90°前又は60°前等
のデータを使用してもよい。さらに(η1|ID|+η2
IDt|)は の内最大値を利用してもよい。但しη1,η2,η3はη1
>η2>η3の定数、 は|ID|よりt1時間前(例えば60°)データ は|ID|よりt2時間前(例えば90°)データである。
In the above embodiment FIG. 5 of the treatment with block (116) | I R | = | I T | - (η 1 | I D | + η 2 | I Dt |) and the but, (η 1 | I D | + η 2 | I Dt | ) instead eta 1 of | I D | or eta 2 | may be utilized whichever larger, | | I Dt I Dt is now data | I D | than 90 Data such as before 60 ° or before 60 ° may be used. Furthermore, (η 1 | I D | + η 2 |
I Dt |) is You may use the maximum value of. Where η 1 , η 2 , and η 3 are η 1
> Η 2 > η 3 constant, Is │ I D │ t 1 hour before (eg 60 °) data Is data t 2 hours before (| D |) (for example, 90 °).

〔発明の効果〕〔The invention's effect〕

以上のように、この発明によればCT飽和対策として電流
の瞬時値データを加減算と定数の乗算を基本にして演算
する比率差動方式を採用したため演算時間が早く、かつ
変流器不飽和期間の電流データのみを外部事故判定用に
利用し、飽和期間は論理的に動作ロツクとするように構
成したので、外部事故時変流器が極端に飽和しても確実
に不動作とできる高性能なものが得られる効果がある。
As described above, according to the present invention, as a countermeasure against CT saturation, since the ratio differential method that calculates the instantaneous value data of the current based on the addition and subtraction and the multiplication of the constant is adopted, the calculation time is short and the current transformer unsaturated period Only the current data of is used for external accident judgment, and it is configured to operate logically during the saturation period. Therefore, even if the current transformer during an external accident is extremely saturated, it can be surely inoperative. It has the effect of obtaining

【図面の簡単な説明】[Brief description of drawings]

第1図はこの発明の一実施例によるデイジタル母線保護
継電装置の原理構成図、第2図はこの発明の原理を説明
するための外部事故時波形図例、第3図はこの発明のア
ルゴリズムを表わす基本原理図例、第4図はこの発明の
特性図例、第5図はこの発明のプログラムを表わすフロ
ー図例、第6図は従来のデイジタル母線保護継電装置の
原理ブロツク図である。 図において、(1)は母線、(2-1)〜(2-n)は変流
器、(3-1)〜(3-n)は入力変換器、(4)はデイジタ
ルリレー、(5)はA/D変換器、(6)はメモリー(RA
M)、(7)はメモリー(ROM)、(8)はマイクロプロ
セツサ(CPU) なお図中同一符号は同一又は相当部分を示す。
FIG. 1 is a principle block diagram of a digital busbar protective relay device according to an embodiment of the present invention, FIG. 2 is an example of a waveform diagram at the time of an external accident for explaining the principle of the present invention, and FIG. 3 is an algorithm of the present invention. FIG. 4 is an example of a characteristic diagram of the present invention, FIG. 5 is an example of a flow diagram showing a program of the present invention, and FIG. 6 is a principle block diagram of a conventional digital bus protection relay device. . In the figure, (1) is a bus bar, (2-1) to (2-n) are current transformers, (3-1) to (3-n) are input converters, (4) is a digital relay, (5) ) Is an A / D converter, (6) is a memory (RA
M) and (7) are memories (ROM), and (8) is a microprocessor (CPU). The same reference numerals in the drawings indicate the same or corresponding parts.

───────────────────────────────────────────────────── フロントページの続き (72)発明者 安斉 俊夫 兵庫県神戸市兵庫区和田崎町1丁目1番2 号 三菱電機株式会社制御製作所内 (72)発明者 大浦 好文 東京都千代田区内幸町1丁目1番3号 東 京電力株式会社内 (72)発明者 松沢 邦夫 東京都千代田区内幸町1丁目1番3号 東 京電力株式会社内 (72)発明者 吉田 和芳 東京都千代田区内幸町1丁目1番3号 東 京電力株式会社内 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Toshio Anzai 1-2-2 Wadazaki-cho, Hyogo-ku, Kobe, Hyogo Prefecture Mitsubishi Electric Corporation Control Works (72) Inventor Yoshifumi Oura 1-chome, Uchisaiwai-cho, Chiyoda-ku, Tokyo 1-3, Tokyo Electric Power Co., Inc. (72) Inventor, Kunio Matsuzawa, 1-3-1, Uchisaiwaicho, Chiyoda-ku, Tokyo Tokyo Electric Power Co., Ltd. (72) Inventor, Kazuyoshi Yoshida, 1-1, Uchisaiwai-cho, Chiyoda-ku, Tokyo No. 3 in Tokyo Electric Power Company

Claims (3)

【特許請求の範囲】[Claims] 【請求項1】母線に接続された全回線の電流を各々同一
時刻に一定間隔でサンプリングし、これをディジタル符
号化するA/D変換器と、その出力電流データ、又は演算
結果等を一時的に保存するメモリー(RAM)と、予め定
めた演算プログラムを保存するメモリー(ROM)と、プ
ログラムに従って演算処理するマイクロプロセッサ(CP
U)とを備え、全回線電流の瞬時絶対値データの内最大
値を算出し、これを抑制量|IT|とし、これと同一時刻
の全回線電流の瞬時値データを加算して得る差動量I
Dと、IDより所定時間前の差動量IDtとで、 |IT|−(η1|ID|+η2|IDt|)≧K2 但し、η1、η2、K2は定数である。 を判定する第1の演算手段と、差動量IDの大きさを判定
する第2の演算手段と、第1の演算手段の演算結果が動
作判定時は一定時間TRの間その出力信号を引延すと共
に、引延し時間TR内に第1の演算結果が動作判定出力を
出せばTRを再カウントする第3の演算手段とを有し、第
3の演算手段の演算結果である引延し信号が発生してい
る期間中は第2の演算手段の演算結果である動作出力信
号をロックすることを特徴とするディジタル母線保護継
電装置。
1. An A / D converter that samples the currents of all lines connected to a bus at the same time at regular intervals and digitally encodes them, and outputs the output current data, operation results, etc. temporarily. A memory (RAM) for storing data in a memory, a memory (ROM) for storing a predetermined calculation program, and a microprocessor (CP) for calculation processing according to the program.
U) and the maximum value of the instantaneous absolute value data of all line currents is calculated, this is defined as the suppression amount | I T |, and the difference obtained by adding the instantaneous value data of all line currents at the same time Momentum I
D and the differential amount I Dt a predetermined time before I D , | I T | − (η 1 | I D | + η 2 | I Dt |) ≧ K 2 However, η 1 , η 2 , K 2 Is a constant. For determining the magnitude of the differential amount I D , and the output signal of the calculation result of the first calculation means for a fixed time T R when the operation is determined. And a third calculation means for counting T R again when the first calculation result outputs a motion determination output within the delay time T R , and the calculation result of the third calculation means During the period in which the extension signal is generated, the operation output signal which is the calculation result of the second calculation means is locked.
【請求項2】第1の演算手段は、 |IT|−(η1|ID|+η2|IDt|)≧K2 の内(η1|ID|+η2|IDt|)をη1|ID|又はη2|I
Dt|の内大きい方のみを作用させることを特徴とする特
許請求の範囲第1項記載のディジタル母線保護継電装
置。
2. The first calculation means is: | I T |-(η 1 | I D | + η 2 | I Dt |) ≧ K 21 | I D | + η 2 | I Dt |) To η 1 | I D | or η 2 | I
The digital busbar protective relay device according to claim 1, wherein only the larger one of Dt | is made to act.
【請求項3】第1の演算手段は、 |IT|−(η1|ID|+η2|IDt|)≧K2 の内(η1|ID|+η2|IDt|)を (η1|ID|+η2|IDt1|+η3|IDt2|) 但し、η1,η2,η3はη1>η2>η3の定数、 |IDt1|は|ID|よりt1時間前サンプリングデータ、 |IDt2|は|ID|よりt2時間前サンプリングデータであ
る。 とすることを特徴とする特許請求の範囲第1項記載のデ
ィジタル母線保護継電装置。
3. The first calculation means is: | I T |-(η 1 | I D | + η 2 | I Dt |) ≧ K 21 | I D | + η 2 | I Dt |) Where (η 1 | I D | + η 2 | I Dt1 | + η 3 | I Dt 2 |) where η 1 , η 2 and η 3 are constants of η 1 > η 2 > η 3 and | I Dt 1 | is | I Sampling data t 1 hours before D |, | I Dt2 | is sampling data t 2 hours before | I D |. The digital busbar protective relay device according to claim 1, wherein
JP31897788A 1988-12-16 1988-12-16 Digital bus protection relay Expired - Fee Related JPH0681417B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP31897788A JPH0681417B2 (en) 1988-12-16 1988-12-16 Digital bus protection relay

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP31897788A JPH0681417B2 (en) 1988-12-16 1988-12-16 Digital bus protection relay

Publications (2)

Publication Number Publication Date
JPH02164225A JPH02164225A (en) 1990-06-25
JPH0681417B2 true JPH0681417B2 (en) 1994-10-12

Family

ID=18105110

Family Applications (1)

Application Number Title Priority Date Filing Date
JP31897788A Expired - Fee Related JPH0681417B2 (en) 1988-12-16 1988-12-16 Digital bus protection relay

Country Status (1)

Country Link
JP (1) JPH0681417B2 (en)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3808624B2 (en) * 1998-04-21 2006-08-16 株式会社東芝 System protection relay device
ATE523938T1 (en) 2006-06-29 2011-09-15 Abb Technology Ltd DISTANCE PROTECTION METHOD AND DISTANCE PROTECTION RELAYS
JP5441625B2 (en) * 2009-11-06 2014-03-12 三菱電機株式会社 Busbar protection device

Also Published As

Publication number Publication date
JPH02164225A (en) 1990-06-25

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