JPH0680654B2 - Silicon semiconductor wafer etching method - Google Patents

Silicon semiconductor wafer etching method

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Publication number
JPH0680654B2
JPH0680654B2 JP13510289A JP13510289A JPH0680654B2 JP H0680654 B2 JPH0680654 B2 JP H0680654B2 JP 13510289 A JP13510289 A JP 13510289A JP 13510289 A JP13510289 A JP 13510289A JP H0680654 B2 JPH0680654 B2 JP H0680654B2
Authority
JP
Japan
Prior art keywords
silicon
wafer
etching
shape accuracy
surface roughness
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP13510289A
Other languages
Japanese (ja)
Other versions
JPH031537A (en
Inventor
泰章 中里
教夫 長谷川
貴裕 神田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shin Etsu Handotai Co Ltd
Original Assignee
Shin Etsu Handotai Co Ltd
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Application filed by Shin Etsu Handotai Co Ltd filed Critical Shin Etsu Handotai Co Ltd
Priority to JP13510289A priority Critical patent/JPH0680654B2/en
Publication of JPH031537A publication Critical patent/JPH031537A/en
Publication of JPH0680654B2 publication Critical patent/JPH0680654B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Description

【発明の詳細な説明】 [産業上の利用分野] 本発明は、シリコン半導体ウエーハ特に集積回路素子製
造のためのウエーハの化学エッチング方法に関する。
Description: TECHNICAL FIELD The present invention relates to a method for chemically etching a silicon semiconductor wafer, particularly a wafer for manufacturing integrated circuit devices.

[従来の技術] 前記シリコン半導体ウエーハは、シリコン単結晶を切断
して得た薄円板をラッピング、エッチング、ポリシング
の順に加工される。近年集積度が向上するにつれ、例え
ば超LSI用のウエーハには、きわめて高い形状精度が要
求されるようになった。
[Prior Art] The silicon semiconductor wafer is processed by lapping, etching, and polishing a thin disk obtained by cutting a silicon single crystal in this order. As the degree of integration has improved in recent years, extremely high shape precision has been required for wafers for VLSI, for example.

ポリシング工程がいわゆるメカニカルケミカルポリシン
グで行われる場合、仕上げ鏡面上の加工傷を極力低減す
るために、アルカリ性水溶液に分散したサブミクロンの
シリカゾルを研摩剤とし、ウエーハを湿潤状態で軟質の
多孔性ウレタンフォーム上に軽荷重、例えば50〜100g/c
m2(ウエーハ)で研摩するので、該ポリシング工程前の
ウエーハ表面の形状精度が悪いと、それ以上の鏡面の形
状精度を期待することはできない。したがって高集積度
のウエーハでは、エッチング工程における面の形状精度
を高めることが強く要望されている。
When the polishing process is performed by so-called mechanical chemical polishing, in order to reduce processing scratches on the finished mirror surface as much as possible, submicron silica sol dispersed in an alkaline aqueous solution is used as an abrasive, and the wafer is a soft porous urethane foam in a wet state. Light load on top, for example 50-100g / c
Since the polishing is performed with m 2 (wafer), if the shape accuracy of the wafer surface before the polishing step is poor, it is impossible to expect a higher mirror surface shape accuracy. Therefore, for highly integrated wafers, it is strongly desired to improve the surface shape accuracy in the etching process.

シリコンウエーハのエッチング面の形状精度を高めるに
は、種々の化学エッチング用混酸水溶液を用いたり、さ
らにこれに触媒を加える等の工夫がなされてきた。
In order to improve the shape accuracy of the etched surface of the silicon wafer, various chemical etching aqueous solutions for chemical etching have been used, and a catalyst has been added thereto.

また、B.Schwartz and H.Robbins “Chemical Etching
of Silicon IV .Etching Technology" J.Electrochem.
Soc.:SOLID-STATESCIENCE AND TECHNOLOGY,123,Vol.12
3,No.12,pp.1903-1909の中にもシリコンウエーハのエッ
チングについて述べられている。すなわち、弗酸、硝酸
と水または酢酸の稀釈混酸水溶液中のシリコンの溶解速
度とその反応機構及びその反応機構に関連してエッチン
グ対象の形状精度の観察結果が詳細に記載されている。
これによると、硝酸濃度が高いときは拡散律速、弗酸濃
度が高いときは表面反応律速であり、水及び酢酸はとも
に稀釈剤として働く。表面反応律速の条件では、マクロ
な形状精度は維持されるが、ミクロな形状精度すなわち
面粗さにおいて劣る。逆に拡散律速の条件では、ミクロ
な形状精度すなわち面の粗さは向上するが、マクロな形
状精度が劣化する。
Also, B. Schwartz and H. Robbins “Chemical Etching
of Silicon IV .Etching Technology "J. Electrochem.
Soc.:SOLID-STATESCIENCE AND TECHNOLOGY, 123, Vol.12
3, No. 12, pp. 1903-1909 also describes the etching of silicon wafers. That is, the observation results of the shape accuracy of an etching target in relation to the dissolution rate of silicon in a dilute mixed acid aqueous solution of hydrofluoric acid, nitric acid and water or acetic acid, its reaction mechanism, and the reaction mechanism are described in detail.
According to this, when the nitric acid concentration is high, the diffusion rate is controlled, and when the hydrofluoric acid concentration is high, the surface reaction rate is controlled, and both water and acetic acid act as diluents. Under the surface reaction rate-determining condition, the macroscopic shape accuracy is maintained, but the microscopic shape accuracy, that is, the surface roughness is inferior. On the contrary, under the diffusion-controlled condition, the micro shape accuracy, that is, the surface roughness is improved, but the macro shape accuracy is deteriorated.

従来の半導体ウエーハは、拡散律速の条件で化学エッチ
ングされていた。例えば、弗酸(約50%):硝酸(約70
%):酢酸(約100%)=3:5:3(容量比)がその代表的
なエッチング混酸である。拡散律速条件では、結晶表面
の方位、結晶欠陥等に反応速度は依存せず、結晶表面に
おける撹拌効果が主体的な効果をもつ。このため選択的
なエッチングが行われないので、シリコンウエーハ表面
の面粗さは平滑化し、少なくともミクロな形状精度が向
上する。しかしながら、エッチングが進行するにつれ
て、逆にシリコンウエーハ表面のマクロな形状精度の劣
化が進む。従来の半導体ウエーハの加工工程において
は、シリコンウエーハ表面のかかるマクロ、ミクロの形
状精度のバランスをはかり、いずれかの形状精度を犠牲
にし、エッチング条件を選ぶのが実状であった。
Conventional semiconductor wafers have been chemically etched under diffusion-controlled conditions. For example, hydrofluoric acid (about 50%): nitric acid (about 70%)
%): Acetic acid (about 100%) = 3: 5: 3 (volume ratio) is a typical etching mixed acid. Under the diffusion-controlled condition, the reaction rate does not depend on the orientation of the crystal surface, crystal defects, etc., and the stirring effect on the crystal surface has the main effect. Therefore, since selective etching is not performed, the surface roughness of the silicon wafer surface is smoothed, and at least the microscopic shape accuracy is improved. However, as the etching progresses, on the contrary, the macroscopic shape accuracy of the silicon wafer surface deteriorates. In the conventional semiconductor wafer processing step, it is the actual situation that the etching conditions are selected by balancing the macro and micro shape accuracy of the surface of the silicon wafer and sacrificing either shape accuracy.

[発明が解決しようとする課題] 本発明者らは、従来の平滑化エッチング混酸例えば前述
の弗酸(約50%):硝酸(約70%):酢酸(約100%)
=3:5:3(容量比)等の混酸の組成を種々に変えなが
ら、シリコンウエーハ表面のエッチング後のマクロ及び
ミクロの形状精度を測定し、マクロの形状精度を劣化さ
せずに、ミクロのそれを効果的に向上せしめる条件を検
討したが、成功しなかった。そこでミクロの形状精度を
詳細に検討したところ、表面粗さは、大小2種のピッチ
からなる粗さで構成され、これらの山、谷の高低もエッ
チング液の組成の影響を受けるが、従来方法では、小さ
なピッチの表面粗さは良くなっても大きなピッチの表面
粗さの改善は困難であった。
[Problems to be Solved by the Invention] The present inventors have proposed a conventional smoothing etching mixed acid such as the above-mentioned hydrofluoric acid (about 50%): nitric acid (about 70%): acetic acid (about 100%).
= 3: 5: 3 (capacity ratio) while varying the composition of the mixed acid, the macro and micro shape accuracy after etching of the silicon wafer surface is measured, and the micro shape accuracy is not deteriorated. We examined the conditions that could effectively improve it, but were unsuccessful. Therefore, when the micro shape accuracy was examined in detail, the surface roughness was composed of two types of pitches, large and small, and the height of these peaks and valleys was also affected by the composition of the etching solution. Then, it was difficult to improve the surface roughness of the large pitch even if the surface roughness of the small pitch was improved.

かかる知見のもとに、本発明者らは混酸中の水分に特に
注目し、通常の硝酸(約70%)の代わりに、水分の少な
い発煙硝酸にシリコンを溶解させたものを使って上述の
方法でシリコンウエーハのエッチングを行ったところ、
驚くべきことにマクロな形状精度の劣化が少なく、また
ミクロな形状精度においても大きなピッチの面粗さが向
上し、もちろん小さなピッチの面粗さについても、所期
の粗さを得ることができることを発見し、本発明に到達
した。
Based on this finding, the present inventors pay particular attention to the water content in the mixed acid, and instead of the usual nitric acid (about 70%), a solution of silicon in fuming nitric acid having a low water content is used. When the silicon wafer was etched by the method,
Surprisingly, there is little deterioration of macro shape accuracy, the surface roughness of large pitch is improved even in micro shape accuracy, and of course the desired surface roughness can be obtained even for surface roughness of small pitch. And has reached the present invention.

[課題を解決するための手段] 本発明の目的は、シリコン半導体ウエーハのエッチング
工程において、エッチング液の組成に注目し、マクロな
形状精度を犠牲にせず、平滑度の勝れたシリコンウエー
ハを得、次のポリッシング工程で特にマクロに形状精度
の勝れた鏡面が容易に得られるエッチング方法を提供す
ることにある。
[Means for Solving the Problems] An object of the present invention is to obtain a silicon wafer having excellent smoothness, paying attention to the composition of an etching solution in an etching process of a silicon semiconductor wafer without sacrificing macroscopic shape accuracy. An object of the present invention is to provide an etching method capable of easily obtaining a mirror surface having excellent macroscopic shape accuracy in the next polishing step.

本発明の方法は、シリコン半導体ウエーハの中間製品で
ある例えばシリコンラップウエーハを、HF/HNO3=0.25
〜1.00、HF+HNO3/CH3COOH=1.5〜5.0、HF+HNO3/H2O=
3〜9(いずれも重量比)の組成の弗酸、硝酸、酢酸及
び水の4成分からなる混酸に、該混酸に11〜17g/lのシ
リコンを溶解したエッチング液で、所要時間エッチング
するもので、これにより、該ウエーハのマクロな面精度
を劣化せずに、効果的にミクロな面精度を向上したシリ
コンエッチングウエーハを得ることができる。
The method of the present invention uses an intermediate product of a silicon semiconductor wafer, for example, a silicon lap wafer, to obtain HF / HNO 3 = 0.25.
~1.00, HF + HNO 3 / CH 3 COOH = 1.5~5.0, HF + HNO 3 / H 2 O =
Etching for a required time with an etching solution in which 11 to 17 g / l of silicon is dissolved in a mixed acid consisting of four components of hydrofluoric acid, nitric acid, acetic acid and water having a composition of 3 to 9 (all in weight ratio) With this, it is possible to obtain a silicon etching wafer with effectively improved micro surface accuracy without deteriorating the macro surface accuracy of the wafer.

[作用] 本発明の方法の実施においては、エッチング液の組成
は、拡散律速領域にあると考えて良いことが確かめられ
ており、シリコン半導体ウエーハの中間体例えばラップ
ウエーハのエッチング液が、その液組成全体及び該ウエ
ーハの表面近傍において充分に撹拌されることが重要で
ある。
[Operation] In the practice of the method of the present invention, it has been confirmed that the composition of the etching solution can be considered to be in the diffusion-controlled region, and the etching solution for an intermediate of a silicon semiconductor wafer, for example, a lap wafer is the solution. It is important that the whole composition and the vicinity of the surface of the wafer are sufficiently stirred.

本発明における混酸中のシリコン溶解量の調節は、まず
弗酸、硝酸、酢酸及び水よりなる混酸を調製し、これに
本発明のシリコン溶解量の下限量のシリコンを溶解して
行う。以後、シリコンウエーハのエッチングが進行し、
同一液が繰返し使われる場合は、一部を除去し、新鮮な
混酸で置換する必要があり、これは循環系を使って連続
的に行うこともできる。実施例では、シリコンウエーハ
のエッチングの際のシリコン溶解の増加は無視できた。
工業的に行う場合には弗酸、硝酸もエッチングの進行に
より消費されるので、溶解シリコン量と同様に調節され
なければならない。
The amount of silicon dissolved in the mixed acid in the present invention is adjusted by first preparing a mixed acid of hydrofluoric acid, nitric acid, acetic acid and water, and dissolving the lower limit amount of silicon of the present invention, which is silicon, in the mixed acid. After that, the etching of the silicon wafer progressed,
If the same liquid is used repeatedly, it is necessary to remove a part and replace it with a fresh mixed acid, which can also be carried out continuously using a circulation system. In the examples, the increase in silicon dissolution during etching of the silicon wafer was negligible.
In the case of industrial use, hydrofluoric acid and nitric acid are also consumed by the progress of etching, so the amount of dissolved silicon must be adjusted in the same manner.

本発明の方法におけるェッチング液は、弗酸、硝酸、酢
酸及び水の4成分からなる混酸において、その中に溶解
されているシリコンが該混酸1に対し11〜17gの範囲
内のある値のものであり、またその混酸組成が、 …HF/HNO3=0.25〜1.00、 …HF+HNO3/CH3COOH=1.5〜5.0、 …HF+HNO3/H2O=3〜9 (いずれも重量比) である限り、シリコンウエーハはエッチング後におい
て、マクロ及びミクロな形状精度において勝れている。
酢酸及び水は稀釈剤であるので、上記、式の比率が
それぞれ1.5及び3以下になるとエッチング速度が低下
する。
The etching liquid in the method of the present invention is a mixed acid consisting of four components of hydrofluoric acid, nitric acid, acetic acid and water, and the silicon dissolved therein has a value within a range of 11 to 17 g relative to 1 of the mixed acid. And the mixed acid composition is: HF / HNO 3 = 0.25 to 1.00, HF + HNO 3 / CH 3 COOH = 1.5 to 5.0, HF + HNO 3 / H 2 O = 3 to 9 (all by weight) As far as possible, the silicon wafer excels in macro and micro shape accuracy after etching.
Since acetic acid and water are diluents, the etching rate decreases when the ratios of the above formulas are 1.5 and 3 or less, respectively.

シリコン溶解量は大きくなるにつれて、ミクロな形状精
度のうち小さなピッチの面粗さが悪くなるが、マクロ及
びミクロな形状精度のうち大きなピッチの面粗さは、逆
に改善されるという傾向にある。したがってシリコン溶
解量にはある特定の好適範囲があって、それは約10g/l
から18g/lの間である。ミクロな形状精度のうち小ピッ
チの面粗さは、13g/l以下でほぼ一定となり、マクロな
形状精度及びミクロな形状精度のうち大ピッチの面粗さ
は10g/l以上でほぼ一定となるので、最適なシリコンの
溶解量は12.5g/l近傍にあるとみることができる。しか
し、シリコン溶解量が11〜17g/lの間にある限り、従来
のエッチング方法よりも、総体的に形状精度の勝れたウ
エーハを得ることができる。
As the amount of dissolved silicon increases, the surface roughness of small pitches in the micro shape accuracy becomes worse, but the surface roughness of large pitches in the macro and micro shape accuracy tends to improve conversely. . Therefore, there is a certain preferred range for the amount of silicon dissolved, which is about 10 g / l.
Between 18 and 18 g / l. Of the micro shape accuracy, the small-pitch surface roughness is almost constant below 13g / l, and of the macro shape accuracy and the micro shape accuracy, the large-pitch surface roughness is almost constant above 10g / l. Therefore, it can be considered that the optimum amount of silicon dissolved is around 12.5 g / l. However, as long as the amount of silicon dissolved is in the range of 11 to 17 g / l, it is possible to obtain a wafer having an overall better shape accuracy than the conventional etching method.

本発明の方法でエッチングされたシリコンウエーハをポ
リシング工程に用いれば、良好な形状面精度の鏡面を効
率的に達成し得る。これは特にミクロな形状の大ピッチ
面粗さが良好に制御されていることにより、ポリシング
工程での研摩量が少なくて所望の鏡面加工が可能になる
ためである。
If the silicon wafer etched by the method of the present invention is used in the polishing step, a mirror surface with good shape surface accuracy can be efficiently achieved. This is because the large-pitch surface roughness of the microscopic shape is well controlled, so that the polishing amount in the polishing step is small and desired mirror surface processing can be performed.

これに対して、従来方法によってエッチングされたシリ
コンウエーハは、ミクロな形状精度のうち大きなピッチ
の面粗さが良くないので、ポリシング工程後の研摩面に
みられた面粗さがほとんどそのまま残存する。
On the other hand, since the silicon wafer etched by the conventional method does not have a good surface roughness with a large pitch among the microscopic shape accuracy, the surface roughness observed on the polished surface after the polishing step remains almost unchanged. .

[実施例] 直径4″n型約10Ωcmのシリコン単結晶をスライスして
ウエーハをつくり、これを♯1200のアランダム砥粒によ
って両面ラップし、片側30μmを除去して得た厚さ約40
0μmのラップウエーハを洗浄乾燥した。つぎに第1図
に示すように、テフロン製ビーカー(500cc)1中にエ
ッチング液2を入れ、液のほぼ中央にラップウエーハ3
を直立保持し、液全体をビーカー底部の磁石回転子4で
撹拌し液流5を生じさせてエッチングを行い、片面より
38〜42μmエッチオフし、ウエーハの形状精度を測定し
た。シリコンウエーハはエッチングすると、その断面形
状は周縁において角がエッチオフされ、第2図に示すよ
うに、丸みを帯びていわゆるダレを生ずる。
[Example] A wafer was prepared by slicing a silicon single crystal having a diameter of 4 "n type and about 10 Ωcm, and the wafer was lapped on both sides with # 1200 alundum abrasive grains.
A 0 μm lap wafer was washed and dried. Next, as shown in FIG. 1, the etching solution 2 was placed in a Teflon beaker (500 cc) 1 and the lap wafer 3 was placed almost in the center of the solution.
Is held upright, the whole liquid is agitated by the magnet rotor 4 at the bottom of the beaker to generate a liquid flow 5 and etching is performed.
38-42 μm was etched off and the shape accuracy of the wafer was measured. When a silicon wafer is etched, the corners of the cross-sectional shape of the silicon wafer are etched off at the periphery, and as shown in FIG. 2, the silicon wafer is rounded and so-called sagging occurs.

第2図(a)の6は、ラップウエーハを示し、第2図
(b)の7はエッチウエーハを示す。エッチウエーハ周
縁の丸みを帯び始めた点Aと周縁の最外側Bとの半径方
向の距離Lをダレと定義する。
Reference numeral 6 in FIG. 2 (a) indicates a lap wafer, and reference numeral 7 in FIG. 2 (b) indicates an etch wafer. The distance L in the radial direction between the point A that starts to be rounded on the edge of the etch wafer and the outermost side B of the edge is defined as sag.

つぎに、ミクロな形状精度は、触針式表面粗さ測定器
(小坂表面粗さ計SE-3F)を用い、これから得られる粗
さRaをもって小さなピッチの面粗さを表現し、さらに瀘
波最大うねりWCMをもって大きな面粗さ(通常うねりと
いわれる)を表すこととした。このRaとWCMの関係は、
第3図のとおりである。
Next, for microscopic shape accuracy, a stylus type surface roughness measuring instrument (Kosaka surface roughness meter SE-3F) is used to express the surface roughness of a small pitch with the roughness Ra obtained from this, and the Maximum waviness W CM is used to represent large surface roughness (usually called waviness). The relationship between this Ra and W CM is
This is as shown in FIG.

第3図の(1)の部分は小さなピッチの、(2)の部分
は大きなピッチの山と谷の状況を示す。図中のRmaxとW
CMはそれぞれ小さなピッチと大きなビッチの山と谷の距
離の最大値である。小さなピッチの山と谷のプロファイ
ルの平均高さに対する、山または谷との距離のいずれか
の最大値の比を別にRaとして表現する。
The part (1) of FIG. 3 shows the situation of a small pitch, and the part (2) of FIG. 3 shows the situation of a large pitch. R max and W in the figure
CM is the maximum distance between the small pitch and the large bitch's peaks and valleys, respectively. The ratio of the maximum value of the distance between the peak and the valley to the average height of the profile of the small pitch peak and valley is expressed separately as Ra.

第1表は、本発明と従来の方法における各種組成のエッ
チング液によってエッチングしたときの形状精度を一覧
表にしたものである。
Table 1 is a list of shape accuracies when etching with etching solutions of various compositions according to the present invention and the conventional method.

本発明の方法によればL,WCM及びRaがすべて従来方法の
ものより小さい。従来方法の中にはRaが本発明のRaに近
くなる場合もあるが、LとWCMは大きい。またシリコン
の溶解量が本発明の方法の範囲を越えて大きい場合に、
従来方法でも本発明の方法に近い形状精度を示すが、特
にWCM、Raでは満足できない。Raが大きいと表面の光沢
度が失われるので目視で判別できる。
According to the method of the present invention, L, W CM and Ra are all smaller than those of the conventional method. Although Ra may be close to Ra of the present invention in some conventional methods, L and W CM are large. Further, when the dissolved amount of silicon is large beyond the range of the method of the present invention,
Although the conventional method shows shape accuracy close to that of the present invention, W CM and Ra are not particularly satisfactory. If Ra is large, the glossiness of the surface is lost, so it can be visually discerned.

[発明の効果] 本発明の方法は、従来のエッチング液の組成比の中で水
分を小さい領域に、シリコンの溶解量をある範囲に制限
した点に特徴があり、エッチウエーハのミクロ及びマク
ロの形状精度に勝れ、後のポリシング工程を容易にし、
総体的には経済的でかつ形状精度の勝れた鏡面シリコン
半導体ウエーハを製造するに適したエッチウエーハを提
供することができる。
[Effects of the Invention] The method of the present invention is characterized in that the amount of dissolved silicon is limited to a certain range in a region where the water content is small in the composition ratio of the conventional etching solution. It excels in shape accuracy and facilitates the subsequent polishing process.
It is possible to provide an etch wafer suitable for producing a mirror-finished silicon semiconductor wafer that is economical in general and excels in shape accuracy.

【図面の簡単な説明】 第1図は実施例におけるエッチング装置の縦断面図、第
2図(a)はラップウエーハ、(b)はエッチウエーハ
の側面図、第3図はエッチウエーハの大、小ピッチの面
粗さの説明図である。 1……ビーカー、2……エッチング液、 3……ラップウエーハ、4……磁石回転子、 5……液流、6……ラップウエーハ、 7……エッチウエーハ。
BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a longitudinal sectional view of an etching apparatus in an embodiment, FIG. 2 (a) is a lap wafer, FIG. 2 (b) is a side view of an etch wafer, and FIG. It is explanatory drawing of the surface roughness of a small pitch. 1 ... Beaker, 2 ... Etching liquid, 3 ... Lap wafer, 4 ... Magnet rotor, 5 ... Liquid flow, 6 ... Lap wafer, 7 ... Etch wafer.

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】HF/HNO3=0.25〜1.00、HF+HNO3/CH3COOH
=1.5〜5.0、HF+HNO3/H2O=3〜9(いずれも重量比)
の組成を有する混酸に11〜17g/lのシリコンを溶解した
エッチング液を用いることを特徴とするシリコン半導体
ウエーハのエッチング方法。
1. HF / HNO 3 = 0.25 to 1.00, HF + HNO 3 / CH 3 COOH
= 1.5~5.0, HF + HNO 3 / H 2 O = 3~9 ( both by weight)
A method for etching a silicon semiconductor wafer, which comprises using an etching solution in which 11 to 17 g / l of silicon is dissolved in a mixed acid having the composition of.
JP13510289A 1989-05-29 1989-05-29 Silicon semiconductor wafer etching method Expired - Lifetime JPH0680654B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13510289A JPH0680654B2 (en) 1989-05-29 1989-05-29 Silicon semiconductor wafer etching method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13510289A JPH0680654B2 (en) 1989-05-29 1989-05-29 Silicon semiconductor wafer etching method

Publications (2)

Publication Number Publication Date
JPH031537A JPH031537A (en) 1991-01-08
JPH0680654B2 true JPH0680654B2 (en) 1994-10-12

Family

ID=15143887

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13510289A Expired - Lifetime JPH0680654B2 (en) 1989-05-29 1989-05-29 Silicon semiconductor wafer etching method

Country Status (1)

Country Link
JP (1) JPH0680654B2 (en)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05304134A (en) * 1992-04-27 1993-11-16 Sharp Corp Method and system for wet etching
JP2001250807A (en) * 1999-12-28 2001-09-14 Shin Etsu Handotai Co Ltd Etchant, etching method, and semiconductor silicon wafer
KR100792774B1 (en) 2000-06-29 2008-01-11 신에쯔 한도타이 가부시키가이샤 Method for processing semiconductor wafer and semiconductor wafer
JP3406283B2 (en) 2000-08-11 2003-05-12 本田技研工業株式会社 Belt for continuously variable transmission

Also Published As

Publication number Publication date
JPH031537A (en) 1991-01-08

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