JPH0677636A - Surface mounting method for semiconductor component - Google Patents

Surface mounting method for semiconductor component

Info

Publication number
JPH0677636A
JPH0677636A JP22903992A JP22903992A JPH0677636A JP H0677636 A JPH0677636 A JP H0677636A JP 22903992 A JP22903992 A JP 22903992A JP 22903992 A JP22903992 A JP 22903992A JP H0677636 A JPH0677636 A JP H0677636A
Authority
JP
Japan
Prior art keywords
semiconductor component
circuit board
end surface
pad
frame
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
JP22903992A
Other languages
Japanese (ja)
Inventor
Masao Hodozuka
昌男 程塚
Seiji Kogure
誠司 木暮
Yasushi Kobayashi
泰 小林
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP22903992A priority Critical patent/JPH0677636A/en
Publication of JPH0677636A publication Critical patent/JPH0677636A/en
Withdrawn legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341Surface mounted components
    • H05K3/3421Leaded components

Landscapes

  • Electric Connection Of Electric Components To Printed Circuits (AREA)

Abstract

PURPOSE:To provide a surface mounting method of semiconductor component in which reliability is enhanced in the connection between lead and pad. CONSTITUTION:When a semiconductor component is mounted on a circuit board by applying cream solder 10 onto pads 6 arranged on the surface of a circuit board 5 and then subjecting the pads 6 and the leads 3 of the semiconductor component to reflow soldering, a bonding tool 40 comprising a frame body 41 having stepped H end face 45 is employed after temporarily mounting a semiconductor component 1 on the circuit board 5 while aligning the seat part 3A of the lead 3 with a corresponding pad 6. Top face of the seat part 3A is then pressed by the inner stepped end face 47 of the bonding tool 40 to abut the outer peripheral stepped end face 46 on the surface of the circuit board 5 thus reflow soldering the leads 3 and the pads 6.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、半導体部品の表面実装
方法に関する。リード付半導体部品は、図3に図示した
ようにリフロー半田付けして表面実装するのが一般であ
る。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a surface mounting method for semiconductor parts. The leaded semiconductor component is generally surface-mounted by reflow soldering as shown in FIG.

【0002】図3において、1はQFP(Quad Flated
Package)型の半導体部品であって、パッケージ2の底面
の4周縁のそれぞれに、ほぼZ形のリード3を等ピッチ
に並列して配設している。
In FIG. 3, 1 is a QFP (Quad Flated).
Package) type semiconductor components, in which substantially Z-shaped leads 3 are arranged in parallel at equal intervals on each of the four peripheral edges of the bottom surface of the package 2.

【0003】半導体部品1を表面実装する回路基板5に
は、所望の個所に半導体部品1のリード3に対応して、
枠形にパッド6を配列形成している。なお、パッド6
は、幅がリード3の着座部3Aの幅よりも僅かに大きく、
長さが着座部3Aの長さよりも十分に大きい短冊形であ
る。
On the circuit board 5 on which the semiconductor component 1 is surface-mounted, corresponding to the leads 3 of the semiconductor component 1 at desired positions,
Pads 6 are arrayed in a frame shape. The pad 6
Is slightly wider than the width of the seat 3A of the lead 3,
It is a strip shape whose length is sufficiently larger than the length of the seating portion 3A.

【0004】このような回路基板5に半導体部品1が載
置され、それぞれのリード3の着座部3Aとパッド6とが
リフローした半田10を介して接着して、半導体部品1が
回路基板5に表面実装されている。
The semiconductor component 1 is placed on such a circuit board 5, and the seating portions 3A of the respective leads 3 and the pads 6 are adhered to each other via the reflowed solder 10, so that the semiconductor component 1 is attached to the circuit board 5. Surface mounted.

【0005】この際、パッド6の形状を上述のように着
座部3Aの形状よりも大きくしてあるので、半田10は着座
部3Aの後部で着座部3Aの側面に付着して立ち上がってヒ
ール11となり、また着座部3Aの前部で着座部3Aの側面に
付着して立ち上がってフィレット12となっている。
At this time, since the shape of the pad 6 is made larger than the shape of the seat 3A as described above, the solder 10 adheres to the side surface of the seat 3A at the rear of the seat 3A and rises to the heel 11. Further, the fillet 12 is attached to the side surface of the seat 3A at the front of the seat 3A and stands up.

【0006】したがって、単に着座部3Aの下面とパッド
6の上面とが半田を介して接着しているものに較べて、
半田付けの強度が強い。
Therefore, as compared with the case where the lower surface of the seat 3A and the upper surface of the pad 6 are simply bonded via solder,
Strong soldering strength.

【0007】[0007]

【従来の技術】従来の半導体部品の表面実装方法を図4
に示す。図4において、20は、中央部の下部に、半導体
部品1のパッケージ2の平面視形状に相似でそれよりも
所望に大きい角形の空洞を有する枠形本体21を、備えた
ボンディングツールである。
2. Description of the Related Art A conventional surface mounting method for semiconductor parts is shown in FIG.
Shown in. In FIG. 4, reference numeral 20 denotes a bonding tool provided with a frame-shaped main body 21 having a rectangular cavity similar to the shape of the package 2 of the semiconductor component 1 in plan view and having a desired larger size in the lower portion of the central portion.

【0008】半導体部品1を表面実装するには、先ず、
回路基板5の表面に枠形に並列したパッド6のそれぞれ
の表面に、クリーム状半田10A をスクリーン印刷して塗
布する。
To surface mount the semiconductor component 1, first,
The cream-like solder 10A is applied by screen printing to the respective surfaces of the pads 6 arranged in a frame shape on the surface of the circuit board 5.

【0009】次に図示省略したロボットハンドで、半導
体部品1を吸着して、回路基板5上に移し、リード3を
対応するパッド6に位置合わして、リード3の着座部3A
をクリーム状半田10A 上に載せて、半導体部品1を回路
基板5に仮載置する。
Next, with a robot hand (not shown), the semiconductor component 1 is sucked and transferred onto the circuit board 5, the lead 3 is aligned with the corresponding pad 6, and the seat 3A of the lead 3 is seated.
Is placed on the cream solder 10A, and the semiconductor component 1 is temporarily placed on the circuit board 5.

【0010】その後、枠形本体21をほぼ 240℃に加熱し
たボンディングツール20を降下して、枠形本体21の下端
面22で着座部3Aの上面を押圧する。なお、着座部への加
圧力は10g /mm2 である。
After that, the bonding tool 20 in which the frame-shaped main body 21 is heated to approximately 240 ° C. is lowered, and the lower end surface 22 of the frame-shaped main body 21 presses the upper surface of the seating portion 3A. The pressure applied to the seat is 10 g / mm 2 .

【0011】このことによりクリーム状半田10A が再溶
融して、着座部3Aの下面とパッド6の上面との間の膜厚
が約10μm の半田層が生ずるとともに、溶融半田の表面
張力により図2に図示したようにヒール11とフィレット
12とが生じ、半導体部品1が回路基板5上にリフロー半
田付けされる。
As a result, the cream-like solder 10A is re-melted to form a solder layer having a film thickness of about 10 μm between the lower surface of the seating portion 3A and the upper surface of the pad 6, and the surface tension of the molten solder causes the solder layer 10A of FIG. Heel 11 and fillet as shown in
12, and the semiconductor component 1 is reflow-soldered on the circuit board 5.

【0012】[0012]

【発明が解決しようとする課題】上述のように表面実装
された半導体部品は、周囲温度の上昇、或いは半導体部
品の稼働による発熱等により、半導体部品と回路基板が
それぞれ膨張する。
In the surface-mounted semiconductor component as described above, the semiconductor component and the circuit board respectively expand due to an increase in ambient temperature or heat generated by the operation of the semiconductor component.

【0013】ところで、半導体部品のパッケージの熱膨
張係数と回路基板の熱膨張係数とは約1桁異なるので、
半導体部品のリードと回路基板のパッド間の半田に、引
張力が作用する。
By the way, since the coefficient of thermal expansion of the package of the semiconductor component and the coefficient of thermal expansion of the circuit board differ by about one digit,
A tensile force acts on the solder between the leads of the semiconductor component and the pads of the circuit board.

【0014】一方、従来方法による半田層の膜厚は、上
述のように約10μm である。したがって、半田がこの引
張応力に耐えられず、半田に亀裂が発生してリードとパ
ッド間が断線したり、或いは接続不良になるという問題
点があった。
On the other hand, the thickness of the solder layer formed by the conventional method is about 10 μm as described above. Therefore, there is a problem in that the solder cannot withstand this tensile stress, a crack is generated in the solder, the lead and the pad are disconnected, or the connection becomes defective.

【0015】本発明はこのような点に鑑みて創作された
もので、リードとパッド間の接続の信頼度が高い半導体
部品の表面実装方法を提供することを目的としている。
The present invention was created in view of the above circumstances, and an object of the present invention is to provide a surface mounting method for a semiconductor component having high reliability of connection between leads and pads.

【0016】[0016]

【課題を解決するための手段】上記の目的を達成するた
めに本発明は、図1に例示したように、回路基板の表面
に配設したパッドにクリーム状半田を塗布し、半導体部
品のリードとパッドとをリフロー半田付けして、半導体
部品を回路基板に実装するにあたり、それぞれのリード
3の着座部3Aを、対応するパッド6に位置合わして、半
導体部品1を回路基板5に仮載置する。
In order to achieve the above object, the present invention, as illustrated in FIG. 1, applies a cream solder to a pad arranged on the surface of a circuit board to lead a semiconductor component. When the semiconductor component is mounted on the circuit board by reflow soldering the pad and the pad, the seating portions 3A of the leads 3 are aligned with the corresponding pads 6, and the semiconductor component 1 is temporarily mounted on the circuit board 5. To do.

【0017】次に、枠形の端面を所定の段差Hの段付端
面45とした枠形本体41を、備えたボンディングツール40
を用い、加熱したボンディングツールの段付端面45の内
側段端面47で着座部3Aの上面を押圧し、段付端面45の外
周側段端面46を回路基板5の表面に当接し、リード3と
パッド6とをリフロー半田付けするものとする。
Next, a bonding tool 40 provided with a frame-shaped main body 41 having a stepped end surface 45 having a predetermined step H as the frame-shaped end surface.
The upper surface of the seating portion 3A is pressed by the inner step end surface 47 of the stepped end surface 45 of the heated bonding tool, the outer peripheral step end surface 46 of the stepped end surface 45 is brought into contact with the surface of the circuit board 5, and the lead 3 and The pads 6 are to be reflow-soldered.

【0018】或いは、図2に例示したように、枠形の端
面を所定の段差Hの段付端面45とした枠形本体41と、枠
形本体41の内側に半導体部品1を吸着する手段とを、備
えたボンディングツール40を用い、枠形本体41内に半導
体部品1を吸着して半導体部品1を運搬し、それぞれの
リード3の着座部3Aを対応するパッド6に位置合わせす
る。
Alternatively, as illustrated in FIG. 2, a frame-shaped main body 41 having a stepped end surface 45 having a predetermined step H as a frame-shaped end surface, and means for adsorbing the semiconductor component 1 inside the frame-shaped main body 41. Using the provided bonding tool 40, the semiconductor component 1 is sucked into the frame-shaped body 41 to carry the semiconductor component 1, and the seating portions 3A of the leads 3 are aligned with the corresponding pads 6.

【0019】次に加熱したボンディングツール40の段付
端面45の内側段端面47で着座部3Aの上面を押圧し、段付
端面45の外周側段端面46を回路基板5の表面に当接し
て、リード3とパッド6とをリフロー半田付けするもの
とする。
Next, the inner step end surface 47 of the stepped end surface 45 of the heated bonding tool 40 presses the upper surface of the seating portion 3A, and the outer peripheral step end surface 46 of the stepped end surface 45 is brought into contact with the surface of the circuit board 5. , The lead 3 and the pad 6 are reflow-soldered.

【0020】[0020]

【作用】本発明の段付端面の段差Hの深さは、パッドの
層厚と着座部の厚さの和よりは約50μm 大きいものとす
る。
The depth of the step H on the stepped end face of the present invention is about 50 μm larger than the sum of the layer thickness of the pad and the thickness of the seating portion.

【0021】このことにより、リフロー半田付けした後
のリードの着座部と回路基板のパッド間の半田層の膜厚
が約50μm となる。したがって、この半導体装置の稼働
時に温度が変化し、半導体部品のリードと回路基板のパ
ッド間に引張力が作用しても、半田層が厚いので半田に
加わる引張応力が小さくなる。
As a result, the thickness of the solder layer between the seating portion of the lead and the pad of the circuit board after reflow soldering becomes about 50 μm. Therefore, even if the temperature changes during the operation of this semiconductor device and a tensile force acts between the lead of the semiconductor component and the pad of the circuit board, the tensile stress applied to the solder becomes small because the solder layer is thick.

【0022】即ち、半田に亀裂が発生することが阻止さ
れ、リードとパッド間が断線したり、或いは接続不良に
なることがない。
That is, the generation of cracks in the solder is prevented, and there is no disconnection between the leads and pads, or no connection failure.

【0023】[0023]

【実施例】以下図を参照しながら、本発明を具体的に説
明する。なお、全図を通じて同一符号は同一対象物を示
す。
The present invention will be described in detail with reference to the drawings. The same reference numerals denote the same objects throughout the drawings.

【0024】図1は本発明の実施例の図で、(A) は実装
前の断面図、(B) 実装時の要所断面図であり、図2は本
発明の他実施例の図で、(A) は実装前の断面図、(B) 実
装時の要所断面図である。
FIG. 1 is a view of an embodiment of the present invention, (A) is a cross-sectional view before mounting, (B) is a cross-sectional view of a main part at the time of mounting, and FIG. 2 is a view of another embodiment of the present invention. , (A) is a cross-sectional view before mounting, and (B) is a cross-sectional view of a main part at the time of mounting.

【0025】図1において、40は、中央部の下部に、半
導体部品1のパッケージ2の平面視形状に相似でそれよ
りも所望に大きい角形の空洞を有する枠形本体41を、備
えたボンディングツールである。
In FIG. 1, reference numeral 40 denotes a bonding tool provided with a frame-shaped main body 41 having a rectangular cavity similar to the shape of the package 2 of the semiconductor component 1 in plan view and having a larger desired size in the lower portion of the central portion. Is.

【0026】枠形本体41の下端の枠形の端面は、外周部
が下方に枠形に突出した所定の段差Hの段付端面45とし
ている。なお、この所定の段差Hとは、パッド6の層厚
とリード3の着座部3Aの厚さの和よりは約50μm 大きい
段差である。
The frame-shaped end surface at the lower end of the frame-shaped main body 41 is a stepped end surface 45 having a predetermined step H whose outer peripheral portion projects downward in a frame shape. The predetermined step H is a step that is about 50 μm larger than the sum of the layer thickness of the pad 6 and the thickness of the seat 3A of the lead 3.

【0027】また、段付端面45の外周側段端面46の内枠
寸法は、回路基板5に枠形に配列形成されたパッド6の
外側縁が構成する枠寸法よりも所望に(約1mm )大きく
している。
The inner frame size of the outer peripheral side step end face 46 of the stepped end face 45 is more desirable (about 1 mm) than the frame size formed by the outer edges of the pads 6 arranged in a frame shape on the circuit board 5. Making it big.

【0028】上述のようなボンディングツール40を用い
て、半導体部品1を回路基板5に表面実装するには、ま
ず、それぞれのパッド6の表面に、70μm 〜 100μm 厚
にクリーム状半田10A をスクリーン印刷して塗布する。
To surface-mount the semiconductor component 1 on the circuit board 5 using the bonding tool 40 as described above, first, the solder paste 10A having a thickness of 70 μm to 100 μm is screen-printed on the surface of each pad 6. And apply.

【0029】次に図示省略したロボットハンド等で、半
導体部品1を吸着して、回路基板5上に移し、リード3
を対応するパッド6に位置合わして、リード3の着座部
3Aをクリーム状半田10A 上に載せて、半導体部品1を回
路基板5に仮載置する。
Next, the semiconductor component 1 is adsorbed by a robot hand or the like (not shown), transferred onto the circuit board 5, and the leads 3 are attached.
Align the pad with the corresponding pad 6, and seat the lead 3
3A is placed on the cream solder 10A, and the semiconductor component 1 is temporarily placed on the circuit board 5.

【0030】その後、ボンディングツール40を約240 ℃
に加熱して、ボンディングツール40を降下し、段付端面
45の内側段端面47で着座部3Aの上面を押圧し、段付端面
45の外周側段端面46を回路基板5の表面に当接させる。
After that, the bonding tool 40 is set to about 240 ° C.
Heating to lower the bonding tool 40, stepped end face
The inner step end surface 47 of 45 presses the upper surface of the seating portion 3A to form a stepped end surface.
The outer peripheral side step end surface 46 of 45 is brought into contact with the surface of the circuit board 5.

【0031】このことにより、図1の(B) に図示したよ
うに、クリーム状半田10A が再溶融して、着座部3Aの下
面とパッド6の上面との間に膜厚が約50μm の半田層が
生ずるとともに、溶融半田の表面張力により着座部3Aの
後部にヒール11が、着座部3Aの前部にフィレット12とが
生じ、半導体部品1がパッド6上にリフロー半田付けさ
れる。
As a result, as shown in FIG. 1B, the cream-like solder 10A is remelted, and the solder having a film thickness of about 50 μm is formed between the lower surface of the seat 3A and the upper surface of the pad 6. As the layer is formed, the surface tension of the molten solder causes the heel 11 at the rear portion of the seating portion 3A and the fillet 12 at the front portion of the seating portion 3A, and the semiconductor component 1 is reflow-soldered on the pad 6.

【0032】上述のように半田層の膜厚を50μm とする
ことで、従来方法による10μm の膜厚の半田層に較べ
て、半田に負荷する引張応力が30%〜40%低減する。し
たがって本発明方法によれば、半田付けの信頼度が向上
する。
By setting the thickness of the solder layer to 50 μm as described above, the tensile stress applied to the solder is reduced by 30% to 40% as compared with the conventional solder layer having a thickness of 10 μm. Therefore, according to the method of the present invention, the reliability of soldering is improved.

【0033】図2に示したボンディングツール40が、図
1に示したボンディングツール40と異なる点は、枠形本
体41内に半導体部品1を吸着する手段を設けた点であ
る。以下吸着手段について詳述する。
The bonding tool 40 shown in FIG. 2 is different from the bonding tool 40 shown in FIG. 1 in that a frame body 41 is provided with a means for sucking the semiconductor component 1. The suction means will be described in detail below.

【0034】枠形本体41の内壁を上方が縮小した角錐台
面とし、その角錐台面の上部に平面視が半導体部品1の
パッケージ2の平面形状に相似でそれよりも僅かに大き
い下方が開口した空洞部を設け、この空洞に皿形ゴム30
を挿入し、その上端面を枠形本体41に接着剤等を用いて
固着している。
The inner wall of the frame-shaped main body 41 is a truncated pyramid surface whose upper part is reduced, and the upper part of the truncated pyramid surface is similar to the planar shape of the package 2 of the semiconductor component 1 in plan view and is slightly larger than that. And the dish-shaped rubber 30
Is inserted, and its upper end surface is fixed to the frame-shaped main body 41 with an adhesive or the like.

【0035】そして、皿形ゴム30の中心及びボンディン
グツール40の軸心を貫通する孔33を設け、図示省略した
真空ポンプの吸入口をこの孔33に連結し、真空ポンプを
駆動することで、皿形ゴム30の内空間を減圧するように
している。
Then, a hole 33 penetrating the center of the dish-shaped rubber 30 and the axis of the bonding tool 40 is provided, and the suction port of a vacuum pump (not shown) is connected to this hole 33 to drive the vacuum pump. The inner space of the dish-shaped rubber 30 is decompressed.

【0036】図2に図示したボンディングツール40を用
いて、半導体部品1を回路基板5に表面実装するには、
まず、それぞれのパッド6の表面に、クリーム状半田10
A をスクリーン印刷して塗布する。
To surface mount the semiconductor component 1 on the circuit board 5 using the bonding tool 40 shown in FIG.
First, cream solder 10 is applied to the surface of each pad 6.
Screen print A and apply.

【0037】次に回路基板5近傍の台上に載置した半導
体部品1上に、約240 ℃に加熱したボンディングツール
40を移動し降下して半導体部品1のパッケージ2の上端
面に皿形ゴム30の縁部端面31を押しつけ、真空ポンプを
駆動して半導体部品1を皿形ゴム30で吸着する。
Next, a bonding tool heated to about 240 ° C. is placed on the semiconductor component 1 mounted on the table near the circuit board 5.
40 is moved and lowered to press the edge end surface 31 of the dish-shaped rubber 30 against the upper end surface of the package 2 of the semiconductor component 1, and the vacuum pump is driven to adsorb the semiconductor component 1 with the dish-shaped rubber 30.

【0038】次に、ボンディングツール40を回路基板5
上に移動し降下して、半導体部品1のリード3を対応す
るパッド6に位置合わして、リード3の着座部3Aをクリ
ーム状半田10A 上に載せ、段付端面45の内側段端面47で
着座部3Aの上面を押圧し、段付端面45の外周側段端面46
を回路基板5の表面に当接させる。
Next, the bonding tool 40 is attached to the circuit board 5.
The lead 3 of the semiconductor component 1 is moved to the upper position, aligned with the corresponding pad 6, and the seating portion 3A of the lead 3 is placed on the cream-like solder 10A, and seated on the inner step end surface 47 of the step end surface 45. Press the upper surface of part 3A, and the outer peripheral side step end surface 46 of the stepped end surface 45
Are brought into contact with the surface of the circuit board 5.

【0039】このことにより、図2の(B) に図示したよ
うに、クリーム状半田10A が再溶融して、着座部3Aの下
面とパッド6の上面との間に、膜厚が約50μm の半田層
が生ずるとともに、溶融半田の表面張力により着座部3A
の後部にヒール11が、着座部3Aの前部にフィレット12と
が生じ、半導体部品1がパッド6上にリフロー半田付け
される。
As a result, as shown in FIG. 2B, the cream-like solder 10A is remelted, and the film thickness of about 50 μm is formed between the lower surface of the seat 3A and the upper surface of the pad 6. As the solder layer is generated, the surface tension of the molten solder causes the seat 3A
The heel 11 is formed on the rear portion and the fillet 12 is formed on the front portion of the seating portion 3A, and the semiconductor component 1 is reflow-soldered on the pad 6.

【0040】図2のように吸着手段を備えたボンディン
グツール40を使用することで、半導体部品を回路基板に
位置合わせして載置する作業と半田付け作業とを同時に
実施し得るという利点がある。
By using the bonding tool 40 provided with the suction means as shown in FIG. 2, there is an advantage that the work of aligning and mounting the semiconductor component on the circuit board and the soldering work can be carried out at the same time. .

【0041】[0041]

【発明の効果】以上説明したように本発明は、段付端面
を有するボンディングツールを用いて半導体部品を表面
実装することで、温度が変化しても実装された半導体部
品のリードと回路基板のパッド間が断線することもまた
接続不良になることがなくて、接続の信頼度が高いとい
う実用上で優れた効果を有する。
As described above, according to the present invention, by mounting a semiconductor component on the surface using a bonding tool having a stepped end face, the leads of the mounted semiconductor component and the circuit board can be mounted even when the temperature changes. The disconnection between the pads does not cause a defective connection, and has a practically excellent effect that the reliability of the connection is high.

【0042】また、半導体部品の吸着手段を設けたボン
ディングツールをもちいることで、半導体部品の表面実
装作業時間が著しく短縮されるという効果を有する。
Further, the use of the bonding tool provided with the semiconductor component suction means has the effect of significantly reducing the surface mounting work time of the semiconductor component.

【図面の簡単な説明】[Brief description of drawings]

【図1】 本発明の実施例の図で (A) は実装前の断面図 (B) 実装時の要所断面図FIG. 1 is a diagram of an embodiment of the present invention (A) is a cross-sectional view before mounting (B) is a cross-sectional view of a main part at the time of mounting

【図2】 本発明の他実施例の図で (A) は実装前の断面図 (B) 実装時の要所断面図FIG. 2 is a view of another embodiment of the present invention, (A) is a cross-sectional view before mounting, (B) is a cross-sectional view of a main part at the time of mounting

【図3】 半導体部品の実装図[Fig. 3] Mounting diagram of semiconductor components

【図4】 従来方法を示す図FIG. 4 is a diagram showing a conventional method.

【符号の説明】[Explanation of symbols]

1 半導体部品 2 パッケ
ージ 3 リード 3A リード 5 回路基板 6 パッド 10 半田 10A クリー
ム状半田 11 ヒール 12 フィレ
ット 20,40 ボンディングツール 21,41 枠
形本体 30 皿形ゴム 45 段付端
面 46 外周側段端面 47 内側段
端面
1 semiconductor component 2 package 3 lead 3A lead 5 circuit board 6 pad 10 solder 10A cream solder 11 heel 12 fillet 20,40 bonding tool 21,41 frame body 30 plate-shaped rubber 45 stepped end surface 46 outer peripheral side stepped end surface 47 inside Step face

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】 回路基板の表面に配設したパッドにクリ
ーム状半田を塗布し、半導体部品のリードと該パッドと
をリフロー半田付けして、該半導体部品を該回路基板に
実装するにあたり、 それぞれの該リード(3) の着座部(3A)を、対応する該パ
ッド(6) に位置合わして、該半導体部品(1) を該回路基
板(5) に仮載置した後に、 枠形の端面を所定の段差(H)の段付端面(45)とした枠
形本体(41)を、備えたボンディングツール(40)を用い、 加熱した該ボンディングツール(40)の該段付端面(45)の
内側段端面(47)で該着座部(3A)の上面を押圧し、該段付
端面(45)の外周側段端面(46)を該回路基板(5)の表面に
当接して、該リード(3) と該パッド(6) とをリフロー半
田付けすること特徴とする半導体部品の表面実装方法。
1. When mounting a semiconductor component on a circuit board by applying cream solder to a pad provided on the surface of the circuit board and reflow soldering the lead of the semiconductor component and the pad, respectively. After the seating portion (3A) of the lead (3) is aligned with the corresponding pad (6) and the semiconductor component (1) is temporarily mounted on the circuit board (5), the frame-shaped end face Using a bonding tool (40) provided with a frame-shaped main body (41) having a stepped end surface (45) of a predetermined step (H), the stepped end surface (45) of the heated bonding tool (40) is heated. The upper step of the seating portion (3A) is pressed by the inner stepped end surface (47) of the stepped end surface (45), and the outer peripheral stepped end surface (46) is brought into contact with the surface of the circuit board (5), A surface mounting method for semiconductor parts, characterized in that the leads (3) and the pads (6) are reflow-soldered.
【請求項2】 回路基板の表面に配設したパッドにクリ
ーム状半田を塗布し、半導体部品のリードと該パッドと
をリフロー半田付けして、該半導体部品を該回路基板に
実装するにあたり、 枠形の端面を所定の段差(H)の段付端面(45)とした枠
形本体(41)と、該枠形本体(41)の内側に該半導体部品
(1) を吸着する手段とを、備えたボンディングツール(4
0)を用い、 該枠形本体(41)内に該半導体部品(1) を吸着して該半導
体部品(1) を運搬し、それぞれの該リード(3) の着座部
(3A)を対応する該パッド(6) に位置合わせした後に、 加熱した該ボンディングツール(40)の該段付端面(45)の
内側段端面(47)で該着座部(3A)の上面を押圧し、該段付
端面(45)の外周側段端面(46)を該回路基板(5)の表面に
当接して、該リード(3) と該パッド(6) とをリフロー半
田付けすること特徴とする半導体部品の表面実装方法。
2. A frame for mounting a semiconductor component on the circuit board by applying cream solder to a pad provided on the surface of the circuit board and reflow soldering the lead of the semiconductor component and the pad. A frame-shaped main body (41) having a stepped end surface (45) having a predetermined step (H), and the semiconductor component inside the frame-shaped main body (41).
(1) is attached to the bonding tool (4
0) is used to carry the semiconductor component (1) by adsorbing the semiconductor component (1) into the frame-shaped body (41), and seating portions of the leads (3) respectively.
After aligning (3A) with the corresponding pad (6), the upper surface of the seating portion (3A) is heated by the inner step end surface (47) of the stepped end surface (45) of the heated bonding tool (40). Pressing the outer peripheral side step end surface (46) of the stepped end surface (45) against the surface of the circuit board (5) to reflow solder the lead (3) and the pad (6). Surface mounting method for characteristic semiconductor components.
JP22903992A 1992-08-28 1992-08-28 Surface mounting method for semiconductor component Withdrawn JPH0677636A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP22903992A JPH0677636A (en) 1992-08-28 1992-08-28 Surface mounting method for semiconductor component

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP22903992A JPH0677636A (en) 1992-08-28 1992-08-28 Surface mounting method for semiconductor component

Publications (1)

Publication Number Publication Date
JPH0677636A true JPH0677636A (en) 1994-03-18

Family

ID=16885791

Family Applications (1)

Application Number Title Priority Date Filing Date
JP22903992A Withdrawn JPH0677636A (en) 1992-08-28 1992-08-28 Surface mounting method for semiconductor component

Country Status (1)

Country Link
JP (1) JPH0677636A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0681416A3 (en) * 1994-05-06 1996-07-03 Seiko Epson Corp Printed circuit board and method of connecting electronic parts.
JP2011054649A (en) * 2009-08-31 2011-03-17 Ihi Corp Method of manufacturing electronic device, and the electronic device

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0681416A3 (en) * 1994-05-06 1996-07-03 Seiko Epson Corp Printed circuit board and method of connecting electronic parts.
US5943217A (en) * 1994-05-06 1999-08-24 Seiko Epson Corporation Printed circuit board for mounting at least one electronic part
US6201193B1 (en) 1994-05-06 2001-03-13 Seiko Epson Corporation Printed circuit board having a positioning marks for mounting at least one electronic part
JP2011054649A (en) * 2009-08-31 2011-03-17 Ihi Corp Method of manufacturing electronic device, and the electronic device

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Effective date: 19991102