JPH0677522A - Light emitting/light detecting element and their manufacture - Google Patents

Light emitting/light detecting element and their manufacture

Info

Publication number
JPH0677522A
JPH0677522A JP22399292A JP22399292A JPH0677522A JP H0677522 A JPH0677522 A JP H0677522A JP 22399292 A JP22399292 A JP 22399292A JP 22399292 A JP22399292 A JP 22399292A JP H0677522 A JPH0677522 A JP H0677522A
Authority
JP
Japan
Prior art keywords
semiconductor
substrate
conductivity type
forming
reflective film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP22399292A
Other languages
Japanese (ja)
Other versions
JP3225103B2 (en
Inventor
Yasuhiro Tsuno
康宏 津野
Tsutomu Munakata
務 宗像
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Oki Electric Industry Co Ltd
Original Assignee
Oki Electric Industry Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Oki Electric Industry Co Ltd filed Critical Oki Electric Industry Co Ltd
Priority to JP22399292A priority Critical patent/JP3225103B2/en
Publication of JPH0677522A publication Critical patent/JPH0677522A/en
Application granted granted Critical
Publication of JP3225103B2 publication Critical patent/JP3225103B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Landscapes

  • Photo Coupler, Interrupter, Optical-To-Optical Conversion Devices (AREA)
  • Led Devices (AREA)
  • Light Receiving Elements (AREA)

Abstract

PURPOSE:To realize excellent light emitting/light detecting elements, by forming a semiconductor DBR reflecting film so as to surround a PN junction part which film is formed by laminating several tens layers of two kinds of thin films different in refractive index. CONSTITUTION:On the surfaces of recessed parts formed on a substrate 101, the following are laminated in order; a first buffer layer 102 composed of N- GaAs or the like, a semiconductor DBR reflecting film layer 103 which is formed by laminating several tens layers of thin films which are composed of GaAs/ AlAs or the like and different in refractive index, a second buffer layer 104, and an epitaxial layer 105 composed of low defective N-GaAs or the like. In a selected region of the epitaxial layer 105, a diffusion layer 106 having impurities of a conductivity type opposite to the epitaxial layer 105 is formed by selective diffusion using a diffusion mask 108. A PN junction part 107 is formed between the epitaxial layer 105 and the diffusion layer 106. Hence a light emitting element of high luminous efficiency and a light detecting element of high photoelectric conversion efficiency can be realized.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】この発明は、LEDプリンタの光
源に用いられる発光素子、センサ等に用いられる発光・
受光素子及び光通信等に用いられる発光・受光素子の構
造と、それらの製造方法に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a light emitting element used for a light source of an LED printer, a light emitting element for a sensor,
The present invention relates to a structure of a light receiving element and a light emitting / light receiving element used for optical communication and the like, and a manufacturing method thereof.

【0002】[0002]

【従来技術】図5に従来の発光素子の断面図を示す。こ
の発光素子は、ある導電型の基板501の上にバッファ層5
02が形成され、更にこのバッファ層502上に、基板501と
同一の導電型のエピタキシャル層503が形成されてい
る。そして、表面に形成された拡散マスク505をマスク
として不純物拡散が行われ、エピタキシャル層503に逆
導電型の拡散層504が形成されている。この結果、エピ
タキシャル層503と拡散層504の間にPN接合が形成され
る。
2. Description of the Related Art FIG. 5 is a sectional view of a conventional light emitting device. This light-emitting element has a buffer layer 5 on a certain conductivity type substrate 501.
02, and an epitaxial layer 503 of the same conductivity type as the substrate 501 is formed on the buffer layer 502. Impurity diffusion is performed using the diffusion mask 505 formed on the surface as a mask to form a diffusion layer 504 of the opposite conductivity type in the epitaxial layer 503. As a result, a PN junction is formed between the epitaxial layer 503 and the diffusion layer 504.

【0003】受光素子の構造も、発光素子と基本的に同
一であり、従来の発光素子あるいは受光素子は、ある導
電型の基板の上に、この基板と同一の導電型の第1のエ
ピタキシャル層を形成し、この第1のエピタキシャル層
に逆導電型の拡散層を形成するか、あるいは第1のエピ
タキシャル層上に逆導電型の第2のエピタキシャル層を
形成していた。この2つの導電型領域のPN接合部によ
って、発光素子では電流を光に、受光素子では光を電流
に変換していた。
The structure of the light receiving element is also basically the same as that of the light emitting element. In the conventional light emitting element or light receiving element, a first epitaxial layer of the same conductivity type as this substrate is formed on a substrate of a certain conductivity type. And a diffusion layer of opposite conductivity type was formed on the first epitaxial layer, or a second epitaxial layer of opposite conductivity type was formed on the first epitaxial layer. Due to the PN junctions of the two conductivity type regions, current is converted into light in the light emitting element and light is converted into current in the light receiving element.

【0004】[0004]

【発明が解決しようとする課題】しかし、以上述べた発
光素子および受光素子には、以下に述べる問題点があっ
た。従来の発光素子に於いては、図6の断面図に示すよ
うに、発光部である、エピタキシャル層503と逆導電型
の拡散層504が形成するPN接合部から、表面方向に放
射された光E1しか利用することができず、裏面方向に
放射された光E2は利用することができなかった。この
ため、目的とする光出力を得るためには、裏面方向に無
駄に放射される光のための電流も供給しなければなら
ず、供給される電流と、光出力の関係を示す、発光効率
がよくなかった。
However, the above-mentioned light emitting element and light receiving element have the following problems. In the conventional light emitting device, as shown in the cross-sectional view of FIG. 6, the light emitted in the surface direction from the PN junction formed by the diffusion layer 504 of the opposite conductivity type to the epitaxial layer 503 which is the light emitting portion. Only E1 could be used, and the light E2 emitted toward the back surface could not be used. Therefore, in order to obtain a desired light output, it is necessary to also supply a current for light that is wastefully radiated in the back surface direction, which shows the relationship between the supplied current and the light output. Was not good.

【0005】また、従来の受光素子に於いても、図7の
断面図に示すように、受光部である、エピタキシャル層
503と逆導電型の拡散層504が形成するPN接合部に入射
された光S1が全て電流に変換されるのではなく、入射
光S1の一部はPN接合部を透過した透過光S2として、
無駄に用いられていた。更に、PN接合部外周域の拡散
マスク505部へ入射された入射光も、PN接合部で電流
に変換されることなく、無駄に用いられていた。その結
果、供給される光と、電流出力の関係を示す、光電変換
効率がよくなかった。
Also, in the conventional light receiving element, as shown in the sectional view of FIG.
Not all the light S1 incident on the PN junction formed by the diffusion layer 504 of the opposite conductivity type to that of 503 is converted into a current, but a part of the incident light S1 is transmitted light S2 transmitted through the PN junction.
It was used in vain. Further, the incident light that has entered the diffusion mask 505 portion in the outer peripheral region of the PN junction portion is also wasted without being converted into a current at the PN junction portion. As a result, the photoelectric conversion efficiency showing the relationship between the supplied light and the current output was not good.

【0006】この発明は以上述べた通り、発光素子に於
いては、PN接合部で発生した光のうち、一部しか取り
出していないことと、受光素子に於いては、PN接合部
及びその周辺に入射された光のうち、一部しか電流に変
換されていないことを解決した、優れた発光・受光素子
及びそれらの製造方法を提供することにある。
As described above, according to the present invention, in the light emitting element, only a part of the light generated in the PN junction is extracted, and in the light receiving element, the PN junction and its periphery are taken out. An object of the present invention is to provide an excellent light-emitting / light-receiving element and a method for manufacturing the same, which solves the problem that only a part of the light incident on is converted into a current.

【0007】[0007]

【課題を解決するための手段】この発明は、前記問題点
を解決するために、発光・受光素子に、基板表面に形成
された凹部と、前記凹部に形成された屈折率の異なる2
種類の薄膜を数十層積み重ねた半導体DBR(Distribu
ted Bragg Reflecton)反射膜と、前記凹部の前記半導
体DBR反射膜上に形成された第1導電型を有する第1
の半導体領域と、前記第1の半導体領域内に形成され第
1導電型とは逆導電型を有する第2の半導体領域を設
け、前記第1の半導体領域と前記第2の半導体領域がP
N接合するようにしたものである。
In order to solve the above-mentioned problems, the present invention provides a light-emitting / light-receiving element in which a concave portion formed on the surface of a substrate and a concave portion formed in the concave portion have different refractive indexes.
Semiconductor DBR (Distribu
ted Bragg Reflecton) a reflection film, and a first conductivity type formed on the semiconductor DBR reflection film in the recess.
And a second semiconductor region formed in the first semiconductor region and having a conductivity type opposite to that of the first conductivity type, the first semiconductor region and the second semiconductor region being P
It is designed to be N-joined.

【0008】そして、この発光・受光素子に於て、前記
凹部を、円錐形状あるいは、側壁部と底部を有する台形
状にしたものである。あるいは、発光・受光素子の製造
方法において、基板上にレジストパターンを選択的に形
成する工程と、前記レジストパターンをマスクとして、
前記基板をエッチングし、前記基板に凹部を形成する工
程と、前記凹部を含む前記基板上に、半導体DBR反射
膜を形成する工程と、前記半導体DBR反射膜上に、第
1導電型を有する第1の半導体領域を形成する工程と、
前記第1の半導体領域と前記半導体DBR反射膜を研磨
し、少なくとも前記凹部には前記第1の半導体領域と前
記半導体DBR反射膜が存在する状態で、前記第1の半
導体領域と前記半導体DBR反射膜を含む前記基板表面
を平坦化する工程と、前記凹部内の前記第1の半導体領
域に、前記第1導電型とは逆導電型の第2の半導体領域
を形成し、前記第1の半導体領域と前記第2の半導体領
域をPN接合させる工程とを行うものである。
In this light emitting / receiving element, the concave portion is formed in a conical shape or a trapezoidal shape having a side wall portion and a bottom portion. Alternatively, in the method for manufacturing a light-emitting / light-receiving element, a step of selectively forming a resist pattern on a substrate and using the resist pattern as a mask,
Etching the substrate to form a recess in the substrate; forming a semiconductor DBR reflective film on the substrate including the recess; and having a first conductivity type on the semiconductor DBR reflective film. Forming a semiconductor region of 1;
The first semiconductor region and the semiconductor DBR reflection film are polished, and the first semiconductor region and the semiconductor DBR reflection film are present in a state where the first semiconductor region and the semiconductor DBR reflection film are present in at least the recess. Planarizing the surface of the substrate including a film, and forming a second semiconductor region of a conductivity type opposite to the first conductivity type in the first semiconductor region in the recess, And a step of forming a PN junction between the region and the second semiconductor region.

【0009】あるいは、発光・受光素子に於て、基板上
にレジストパターンを選択的に形成する工程と、前記レ
ジストパターンをマスクとして、前記基板をエッチング
し、前記基板に凹部を形成する工程と、前記凹部を含む
前記基板上に、半導体DBR反射膜を形成する工程と、
前記半導体DBR反射膜上に、第1導電型を有する第1
の半導体領域を形成する工程と、前記第1の半導体領域
上に、前記第1導電型とは逆導電型の第2の半導体領域
をエピタキシャル成長によって連続的に形成し、前記第
1の半導体領域と前記第2の半導体領域をPN接合させ
る工程と、前記第1及び第2の半導体領域と前記半導体
DBR反射膜を研磨し、少なくとも前記凹部には前記第
1及び第2の半導体領域と前記半導体DBR反射膜が存
在する状態で、前記第1及び第2の半導体領域と前記半
導体DBR反射膜を含む前記基板表面を平坦化する工程
とを行うものである。
Alternatively, in the light emitting / receiving element, a step of selectively forming a resist pattern on the substrate, a step of etching the substrate using the resist pattern as a mask, and forming a recess in the substrate, Forming a semiconductor DBR reflective film on the substrate including the recess;
A first conductive type having a first conductivity type on the semiconductor DBR reflective film;
And a second semiconductor region having a conductivity type opposite to that of the first conductivity type is continuously formed on the first semiconductor region by epitaxial growth. A step of forming a pn junction in the second semiconductor region, polishing the first and second semiconductor regions and the semiconductor DBR reflection film, and at least the recesses in the first and second semiconductor regions and the semiconductor DBR. The step of planarizing the surface of the substrate including the first and second semiconductor regions and the semiconductor DBR reflective film is performed in the state where the reflective film exists.

【0010】あるいは、発光・受光素子に於て、第1導
電型を有する半導体基板表面上にレジストパターンを選
択的に形成する工程と、前記レジストパターンをマスク
として、前記基板表面をエッチングし、前記基板表面に
台形状の凸部を形成する工程と、前記凸部を含む前記基
板表面上に、半導体DBR反射膜を形成する工程と、前
記半導体DBR反射膜上に、支持基板を形成する工程
と、前記半導体基板裏面を研磨し、少なくとも前記凸部
には前記半導体基板と前記半導体DBR反射膜が存在す
る状態で、前記半導体基板と前記半導体DBR反射膜を
含む前記支持基板裏面を平坦化する工程と、前記凸部内
の前記半導体基板に、前記第1導電型とは逆導電型の第
1の半導体領域を形成し、前記半導体基板と前記第1の
半導体領域をPN接合させる工程とを行うものである。
Alternatively, in the light emitting / receiving device, a step of selectively forming a resist pattern on the surface of the semiconductor substrate having the first conductivity type, and etching the substrate surface using the resist pattern as a mask, A step of forming a trapezoidal convex portion on a substrate surface, a step of forming a semiconductor DBR reflective film on the substrate surface including the convex portion, and a step of forming a support substrate on the semiconductor DBR reflective film. Polishing the back surface of the semiconductor substrate, and flattening the back surface of the support substrate including the semiconductor substrate and the semiconductor DBR reflective film in a state where the semiconductor substrate and the semiconductor DBR reflective film are present at least in the convex portion. And forming a first semiconductor region of a conductivity type opposite to that of the first conductivity type on the semiconductor substrate in the convex portion, and connecting the semiconductor substrate and the first semiconductor region with a PN contact. And performs the step of.

【0011】[0011]

【作用】この発明の発光素子は、屈折率の異なる2種類
の薄膜を数十層積み重ねた半導体DBR反射膜をPN接
合部を囲むように設けたので、発光状態にある時、発光
部であるPN接合部から、表面方向に放射された光だけ
でなく、裏面方向に放射された光も半導体DBR反射膜
層に反射させて、表面方向に放射する。
In the light emitting device of the present invention, the semiconductor DBR reflection film in which several thin films of two kinds having different refractive indexes are stacked is provided so as to surround the PN junction. Not only the light radiated in the front surface direction from the PN junction portion, but also the light radiated in the rear surface direction is reflected by the semiconductor DBR reflective film layer and radiated in the front surface direction.

【0012】また、この発明の受光素子は、半導体DB
R反射膜をPN接合部を囲むように設けたので、受光状
態にある時、受光部であるPN接合部に入射された光の
うち、PN接合部を透過した透過光も、半導体DBR反
射膜層に反射させて、再度PN接合部に入射することが
可能となる。更に、PN接合部の外周域へ入射された入
射光も、半導体DBR反射膜層に反射させて、PN接合
部に入射することができる。
The light receiving element of the present invention is a semiconductor DB.
Since the R reflection film is provided so as to surround the PN junction portion, the light transmitted through the PN junction portion of the light incident on the PN junction portion, which is the light receiving portion in the light receiving state, is also a semiconductor DBR reflection film. It becomes possible to reflect on the layer and then re-enter the PN junction. Further, incident light that has entered the outer peripheral region of the PN junction can be reflected by the semiconductor DBR reflective film layer and enter the PN junction.

【0013】[0013]

【実施例】図1は、この発明の第1の実施例の発光・受
光素子の構造を示す断面図であり、図2は、その発光・
受光素子の製造方法を示す工程断面図である。この発明
は、発光素子と受光素子の両方に適用可能であり、実施
例中で述べた構造によって、従来の発光素子及び受光素
子がそれぞれ有する問題を解決することができる。よっ
て、この明細書中で発光・受光素子とある場合、発光・
受光素子とは、PN接合部で電流を光に変換して発光す
る発光素子と、PN接合部で受光した光を電流に変換す
る受光素子と、場合によって上記発光あるいは受光を行
うことができる素子、これらを総称したものとする。
FIG. 1 is a sectional view showing the structure of a light emitting / receiving element according to the first embodiment of the present invention, and FIG.
FIG. 6 is a process cross-sectional view showing the method for manufacturing the light receiving element. The present invention can be applied to both a light emitting element and a light receiving element, and the structure described in the embodiments can solve the problems of the conventional light emitting element and the light receiving element. Therefore, when there is a light emitting / light receiving element in this specification,
The light receiving element is a light emitting element that converts current into light at the PN junction to emit light, a light receiving element that converts light received at the PN junction into current, and an element capable of performing the above light emission or light reception depending on the case. , These are generic terms.

【0014】図1に示す発光・受光素子は、例えばn−
GaAs等からなる特定の導電型を有する基板101上
に、凹部が形成され、この凹部の表面に、n−GaAs
等からなる第1バッファ層102,GaAs/AlAs等
からなり屈折率の異なる2種類の薄膜を数十層積み重ね
た半導体DBR反射膜層103,n−GaAs等からなる
第2バッファ層104,及び低欠損のn−GaAs等から
なるエピタキシャル層105が、順に積層されている。そ
して、このエピタキシャル層105の選択された領域に、
拡散マスク108を用いた選択拡散によって、このエピタ
キシャル層105と逆導電型の不純物を有する拡散層106を
形成し、エピタキシャル層105と拡散層106との接合面に
PN接合部107を形成している。
The light emitting / receiving element shown in FIG.
A recess is formed on a substrate 101 made of GaAs or the like having a specific conductivity type, and n-GaAs is formed on the surface of the recess.
A first buffer layer 102 made of GaAs / AlAs, etc., a semiconductor DBR reflective film layer 103 made of GaAs / AlAs etc. and having several tens of thin films of different types stacked, a second buffer layer 104 made of n-GaAs, etc. Epitaxial layers 105 made of deficient n-GaAs or the like are sequentially stacked. Then, in the selected region of the epitaxial layer 105,
By selective diffusion using the diffusion mask 108, a diffusion layer 106 having impurities of a conductivity type opposite to that of the epitaxial layer 105 is formed, and a PN junction 107 is formed on the junction surface between the epitaxial layer 105 and the diffusion layer 106. .

【0015】図2に示す工程断面図を用いて、第1の実
施例の発光・受光素子の製造方法を説明する。まず図2
(a)に示すように、例えばn−GaAs等からなる特
定の導電型を有する基板101上に、レジストパターン109
を形成する。次に図2(b)に示すように、このレジス
トパターン109をマスクとして、基板101を円錐形状ある
いは、側壁部と底部を有する台形状にエッチングする。
A method of manufacturing the light emitting / receiving device of the first embodiment will be described with reference to the process sectional views shown in FIG. First, Figure 2
As shown in (a), a resist pattern 109 is formed on a substrate 101 having a specific conductivity type such as n-GaAs.
To form. Next, as shown in FIG. 2B, the substrate 101 is etched into a conical shape or a trapezoidal shape having a side wall portion and a bottom portion using the resist pattern 109 as a mask.

【0016】次に図2(c)に示すように、レジストパ
ターン109を除去した基板101上に、MBE法やMOCV
D法などによって、n−GaAs等からなる第1バッフ
ァ層102,GaAs/AlAs等からなる半導体DBR
反射膜層103,n−GaAs等からなる第2バッファ層1
04,及び低欠損のn−GaAs等からなるエピタキシャ
ル層105を、順にエピタキシャル成長させる。
Next, as shown in FIG. 2C, the MBE method or MOCV method is performed on the substrate 101 from which the resist pattern 109 has been removed.
The first buffer layer 102 made of n-GaAs or the like and the semiconductor DBR made of GaAs / AlAs or the like by the D method or the like.
Reflection film layer 103, second buffer layer 1 made of n-GaAs, etc.
04, and the epitaxial layer 105 made of low-deficiency n-GaAs or the like is sequentially epitaxially grown.

【0017】次に図2(d)に示すように、基板101表
面に積層された第1バッファ層102,半導体DBR反射
膜層103,第2バッファ層104,及びエピタキシャル層10
5を研磨し、平坦化する。この時の研磨量は任意に設定
でき、凹部の上部を研磨除去しても、凹部の下方部分が
残っていれば、本発明の効果を得ることができる。
Next, as shown in FIG. 2D, the first buffer layer 102, the semiconductor DBR reflective film layer 103, the second buffer layer 104, and the epitaxial layer 10 laminated on the surface of the substrate 101.
5 is polished and flattened. The amount of polishing at this time can be set arbitrarily, and even if the upper portion of the recess is polished and removed, the effect of the present invention can be obtained as long as the lower portion of the recess remains.

【0018】次に図2(e)に示すように、表面に絶縁
膜110を形成する。次に図2(f)に示すように、絶縁
膜110を基板のパターンに合わせてパターニングし、拡
散窓を有する拡散マスク108を形成する。
Next, as shown in FIG. 2E, an insulating film 110 is formed on the surface. Next, as shown in FIG. 2F, the insulating film 110 is patterned according to the pattern of the substrate to form a diffusion mask 108 having a diffusion window.

【0019】次に図2(g)に示すように、拡散マスク
108の拡散窓より、エピタキシャル層105中に、このエピ
タキシャル層105と逆導電型の不純物を拡散させ、拡散
層106を形成する。この結果、エピタキシャル層105と拡
散層106との接合面に、PN接合部107が形成される。
Next, as shown in FIG. 2G, a diffusion mask
An impurity having a conductivity type opposite to that of the epitaxial layer 105 is diffused into the epitaxial layer 105 through the diffusion window 108 to form a diffusion layer 106. As a result, the PN junction portion 107 is formed on the junction surface between the epitaxial layer 105 and the diffusion layer 106.

【0020】以上説明した、第1の実施例の製造方法に
よって製造した本発明の発光・受光素子について、半導
体DBR反射膜層103の働きを、発光素子と受光素子の
各々について図8及び図9を用いて説明する。
In the light emitting / receiving device of the present invention manufactured by the manufacturing method of the first embodiment described above, the function of the semiconductor DBR reflective film layer 103 is shown in FIGS. 8 and 9 for each of the light emitting device and the light receiving device. Will be explained.

【0021】図8は、この発明の発光素子の発光状態を
示した断面図であり、発光部であるPN接合部107か
ら、表面方向に放射された光E1だけでなく、裏面方向
に放射された光E2も半導体DBR反射膜層103に反射さ
せて、表面方向に放射することができる。
FIG. 8 is a cross-sectional view showing a light emitting state of the light emitting element of the present invention. Not only the light E1 emitted in the front direction but also the back direction is emitted from the PN junction portion 107 which is a light emitting portion. The emitted light E2 can also be reflected by the semiconductor DBR reflection film layer 103 and emitted in the surface direction.

【0022】図9は、この発明の受光素子の受光状態を
示した断面図であり、受光部であるPN接合部107に入
射された光S1のうち、PN接合部107を透過した透過光
S2も、半導体DBR反射膜層103に反射させて、再度P
N接合部107に入射することが可能となる。更に、PN
接合部107外周域へ入射された入射光も、半導体DBR
反射膜層103に反射させて、PN接合部107に入射するこ
とができる。
FIG. 9 is a cross-sectional view showing the light receiving state of the light receiving element of the present invention. Of the light S1 incident on the PN junction portion 107 which is the light receiving portion, the transmitted light S2 transmitted through the PN junction portion 107. Is reflected on the semiconductor DBR reflection film layer 103, and again P
It becomes possible to enter the N-junction 107. Furthermore, PN
Incident light incident on the outer peripheral area of the junction 107 is also detected by the semiconductor DBR.
The light can be reflected by the reflective film layer 103 and incident on the PN junction 107.

【0023】図3及び図4は、それぞれこの発明の製造
方法の第2及び第3の実施例を示す断面図であり、図
1,2と同一の構成要件については、同一の符号で示
す。図3に示す第2の実施例の発光・受光素子は、第1
の実施例と同様に、基板101上に第1バッファ層102,半
導体DBR反射膜層103,第2バッファ層104,及びエピ
タキシャル層105からなる積層構造を形成した後、基板1
01側も研磨し、この基板101中に不純物拡散を行って、
PN接合部107を形成したものである。
FIGS. 3 and 4 are cross-sectional views showing the second and third embodiments of the manufacturing method of the present invention, respectively, and the same components as those in FIGS. 1 and 2 are designated by the same reference numerals. The light emitting / receiving element of the second embodiment shown in FIG.
In the same manner as in the embodiment of Example 1, after forming a laminated structure including the first buffer layer 102, the semiconductor DBR reflective film layer 103, the second buffer layer 104, and the epitaxial layer 105 on the substrate 101, the substrate 1
The 01 side is also polished, impurities are diffused in this substrate 101,
The PN junction 107 is formed.

【0024】この第2の実施例の製造方法を、以下に説
明する。まず、特定の導電型を有する基板101の表面上
に、レジストパターン109を形成する。このとき注意す
べきは、前記第1の実施例の製造方法とは逆に、レジス
トパターン109が存在する領域下に、PN接合部107が形
成されることである。つまり、第1の実施例では、凹部
を形成する部分に開口部を有するレジストパターン109
を、基板101表面上に形成するのに対して、第2の実施
例では、台形状の突起を形成する部分に島状のパターン
を有するレジストパターン109を、基板101表面上に形成
する。
The manufacturing method of the second embodiment will be described below. First, a resist pattern 109 is formed on the surface of the substrate 101 having a specific conductivity type. At this time, it should be noted that, contrary to the manufacturing method of the first embodiment, the PN junction portion 107 is formed below the region where the resist pattern 109 exists. That is, in the first embodiment, the resist pattern 109 having an opening at the portion where the recess is formed.
Is formed on the surface of the substrate 101, in the second embodiment, a resist pattern 109 having an island-shaped pattern is formed on the surface of the substrate 101 in the portion where the trapezoidal protrusion is formed.

【0025】次に、このレジストパターン109をマスク
として、基板101表面を、台形状の突起が残留するよう
にエッチングする。次に、レジストパターン109を除去
した基板101表面上に、第1バッファ層102,半導体DB
R反射膜層103,第2バッファ層104,エピタキシャル層
105を、順にエピタキシャル成長させる。
Next, using the resist pattern 109 as a mask, the surface of the substrate 101 is etched so that trapezoidal protrusions remain. Next, on the surface of the substrate 101 from which the resist pattern 109 has been removed, the first buffer layer 102 and the semiconductor DB
R reflection film layer 103, second buffer layer 104, epitaxial layer
105 are epitaxially grown in order.

【0026】次に、エピタキシャル層105を支持基板205
とするため、表面を研磨し平坦化する。この時の研磨
は、第1の実施例の場合と比べて少ない量でよい。次
に、基板101裏面を研磨し、前記台形状の領域を残し
て、基板101を除去する。この時の研磨量は任意に設定
でき、台形状の領域の下部を研磨除去しても、台形状の
領域の上方部分が残っていれば、本発明の効果を得るこ
とができる。
Next, the epitaxial layer 105 is formed on the supporting substrate 205.
Therefore, the surface is polished and flattened. The amount of polishing at this time may be smaller than that in the case of the first embodiment. Next, the back surface of the substrate 101 is polished, and the substrate 101 is removed leaving the trapezoidal region. The amount of polishing at this time can be set arbitrarily, and even if the lower portion of the trapezoidal region is polished and removed, the effect of the present invention can be obtained if the upper portion of the trapezoidal region remains.

【0027】次に、拡散窓を有する拡散マスク108を形
成し、拡散マスク108の拡散窓より、基板101中に、この
基板101と逆導電型の不純物を拡散させ、拡散層106を形
成する。この結果、基板101と拡散層106との接合面に、
PN接合部107が形成される。この第2の実施例の製造
方法を用いれば、半導体DBR反射膜層を、容易に台形
状に加工することができる。半導体DBR反射膜層が側
壁部と底部を有する台形状であれば、発光・受光素子の
発光部あるいは受光部の下部に、半導体DBR反射膜層
が平行に存在することになり、半導体DBR反射膜層で
反射された光の反射方向の調整が容易になる。
Next, a diffusion mask 108 having a diffusion window is formed, and an impurity having a conductivity type opposite to that of the substrate 101 is diffused into the substrate 101 through the diffusion window of the diffusion mask 108 to form a diffusion layer 106. As a result, on the joint surface between the substrate 101 and the diffusion layer 106,
The PN junction 107 is formed. By using the manufacturing method of the second embodiment, the semiconductor DBR reflective film layer can be easily processed into a trapezoidal shape. If the semiconductor DBR reflective film layer has a trapezoidal shape having a side wall and a bottom, the semiconductor DBR reflective film layer exists in parallel below the light emitting part or the light receiving part of the light emitting / receiving element. It becomes easy to adjust the reflection direction of the light reflected by the layer.

【0028】図4に示す第3の実施例の発光・受光素子
は、エピタキシャル成長により、連続的に逆導電型の層
を積層し、PN接合部を形成したものである。この再3
の実施例の発光・受光素子は、特定の導電型を有する基
板101上に、凹部が形成され、この凹部の表面に、第1
バッファ層102,半導体DBR反射膜層103,第2バッフ
ァ層104,エピタキシャル層105,及びエピタキシャル層
105とは逆導電型の第2のエピタキシャル層206が、順に
積層されている。そして、このエピタキシャル層105と
逆導電型の第2のエピタキシャル層206との接合面にP
N接合部107を形成している。
The light emitting / receiving device of the third embodiment shown in FIG. 4 is one in which layers of opposite conductivity type are successively laminated by epitaxial growth to form a PN junction. This again 3
In the light-emitting / light-receiving element of this embodiment, a recess is formed on the substrate 101 having a specific conductivity type, and the first recess is formed on the surface of the recess.
Buffer layer 102, semiconductor DBR reflective film layer 103, second buffer layer 104, epitaxial layer 105, and epitaxial layer
A second epitaxial layer 206 having a conductivity type opposite to that of 105 is sequentially stacked. Then, P is formed on the junction surface between the epitaxial layer 105 and the second epitaxial layer 206 of the opposite conductivity type.
The N-junction 107 is formed.

【0029】第3の実施例の発光・受光素子の製造方法
を以下に説明する。まず、特定の導電型を有する基板10
1上に、レジストパターン109を形成する。次に、このレ
ジストパターンをマスクとして、基板101を円錐形状あ
るいは台形状にエッチングする。
A method of manufacturing the light emitting / receiving element of the third embodiment will be described below. First, the substrate 10 having a specific conductivity type
A resist pattern 109 is formed on 1. Next, using this resist pattern as a mask, the substrate 101 is etched into a conical shape or a trapezoidal shape.

【0030】次に、レジストパターンを除去した基板10
1上に、第1バッファ層102,半導体DBR反射膜層10
3,第2バッファ層104,エピタキシャル層105,エピタ
キシャル層105と逆導電型の第2のエピタキシャル層206
を、順にエピタキシャル成長させる。
Next, the substrate 10 from which the resist pattern has been removed
The first buffer layer 102 and the semiconductor DBR reflective film layer 10 on the first
3, second buffer layer 104, epitaxial layer 105, second epitaxial layer 206 having a conductivity type opposite to that of the epitaxial layer 105
Are sequentially epitaxially grown.

【0031】次に、基板101表面に積層された第1バッ
ファ層102,半導体DBR反射膜層103,第2バッファ層
104,エピタキシャル層105,及び第2のエピタキシャル
層206を研磨し、平坦化する。
Next, the first buffer layer 102, the semiconductor DBR reflective film layer 103 and the second buffer layer which are laminated on the surface of the substrate 101.
The 104, the epitaxial layer 105, and the second epitaxial layer 206 are polished and planarized.

【0032】以上の結果、エピタキシャル層105と第2
のエピタキシャル層206との間にPN接合部107が形成さ
れる。この第3の実施例の製造方法を用いれば、不純物
を選択的に拡散させるための、拡散マスクを形成する必
要がなく、工程を単純化することができる。
As a result of the above, the epitaxial layer 105 and the second
A PN junction 107 is formed between the epitaxial layer 206 and the epitaxial layer 206. By using the manufacturing method of the third embodiment, it is not necessary to form a diffusion mask for selectively diffusing the impurities, and the process can be simplified.

【0033】[0033]

【発明の効果】以上詳細に説明したように、この発明に
よれば、受光・発光素子の、受光部あるいは発光部とな
るPN接合部の下方に半導体DBR反射膜を円錐形状あ
るいは台形状に設けたので、発光素子に於ては、発光部
であるPN接合部から、裏面方向へ放射された光を、半
導体DBR反射膜に反射させて、表面に取り出すことが
できる。
As described above in detail, according to the present invention, the semiconductor DBR reflection film is provided in the conical shape or the trapezoidal shape below the PN junction part of the light receiving / light emitting element which becomes the light receiving part or the light emitting part. Therefore, in the light emitting element, the light emitted from the PN junction portion, which is the light emitting portion, toward the back surface can be reflected on the semiconductor DBR reflection film and extracted on the front surface.

【0034】また、受光素子に於いても、受光部であ
る、PN接合部を透過した透過光も、半導体DBR反射
膜に反射させて再度PN接合部に入射することができ
る。更に、PN接合部外周域へ入射された入射光も、半
導体DBR反射膜に反射させてPN接合部に入射するこ
とが可能となる。
Also in the light receiving element, the transmitted light that has passed through the PN junction, which is the light receiving portion, can be reflected by the semiconductor DBR reflection film and enter the PN junction again. Further, the incident light incident on the outer peripheral region of the PN junction can also be reflected on the semiconductor DBR reflection film and incident on the PN junction.

【0035】従って、発光効率の高い発光素子及び、光
電変換効率の高い受光素子を形成することが可能とな
る。
Therefore, it becomes possible to form a light emitting element having a high luminous efficiency and a light receiving element having a high photoelectric conversion efficiency.

【図面の簡単な説明】[Brief description of drawings]

【図1】この発明の第1の実施例の構造を示す、断面図
である。
FIG. 1 is a sectional view showing the structure of a first embodiment of the present invention.

【図2】この発明の第1の実施例の製造方法を示す、工
程断面図である。
FIG. 2 is a process sectional view showing the manufacturing method of the first embodiment of the present invention.

【図3】この発明の第2の実施例の構造を示す、断面図
である。
FIG. 3 is a sectional view showing the structure of the second embodiment of the present invention.

【図4】この発明の第3の実施例の構造を示す、断面図
である。
FIG. 4 is a sectional view showing the structure of the third embodiment of the present invention.

【図5】従来の発光・受光素子の構造を示す、断面図で
ある。
FIG. 5 is a sectional view showing a structure of a conventional light emitting / receiving element.

【図6】従来の発光素子の発光状態を示した、断面図で
ある。
FIG. 6 is a cross-sectional view showing a light emitting state of a conventional light emitting element.

【図7】従来の受光素子の受光状態を示した、断面図で
ある。
FIG. 7 is a cross-sectional view showing a light receiving state of a conventional light receiving element.

【図8】この発明の発光素子の発光状態を示した、断面
図である。
FIG. 8 is a cross-sectional view showing a light emitting state of the light emitting device of the present invention.

【図9】この発明の受光素子の受光状態を示した、断面
図である。
FIG. 9 is a cross-sectional view showing a light receiving state of the light receiving element of the present invention.

【符号の説明】[Explanation of symbols]

101 基板 102 第1バッファ層 103 半導体DBR反射膜 104 第2バッファ層 105 エピタキシャル層 106 拡散層 107 PN接合部 108 拡散マスク 109 レジストパターン 110 絶縁膜 205 支持基板 206 第2のエピタキシャル層 E1 発光素子のPN接合部から表面方向への放射光 E2 発光素子のPN接合部から裏面方向への放射光 S1 受光素子のPN接合部への外部からの入射光 S2 受光素子のPN接合部を透過した透過光 101 substrate 102 first buffer layer 103 semiconductor DBR reflective film 104 second buffer layer 105 epitaxial layer 106 diffusion layer 107 PN junction 108 diffusion mask 109 resist pattern 110 insulating film 205 support substrate 206 second epitaxial layer E1 PN of light emitting element Emitted light from the junction to the front side E2 Light emitted from the PN junction of the light emitting element to the back side S1 Light incident from the outside to the PN junction of the light receiving element S2 Light transmitted through the PN junction of the light receiving element

Claims (5)

【特許請求の範囲】[Claims] 【請求項1】 基板と、前記基板表面に形成された凹部
と、前記凹部に形成された半導体DBR反射膜と、前記
凹部の前記半導体DBR反射膜上に形成された第1導電
型を有する第1の半導体領域と、前記第1の半導体領域
内に形成され第1導電型とは逆導電型を有する第2の半
導体領域を有し、前記第1の半導体領域と前記第2の半
導体領域がPN接合していることを特徴とする発光・受
光素子。
1. A substrate, a recess formed in the surface of the substrate, a semiconductor DBR reflective film formed in the recess, and a first conductivity type formed on the semiconductor DBR reflective film in the recess. A first semiconductor region and a second semiconductor region formed in the first semiconductor region and having a conductivity type opposite to that of the first conductivity type, wherein the first semiconductor region and the second semiconductor region are A light emitting / light receiving element characterized by having a PN junction.
【請求項2】 請求項1記載の発光・受光素子に於て前
記凹部が、円錐形状あるいは、側壁部と底部を有する台
形状をしていることを特徴とする発光・受光素子。
2. The light emitting / receiving element according to claim 1, wherein the recess has a conical shape or a trapezoidal shape having a side wall portion and a bottom portion.
【請求項3】 a)基板上にレジストパターンを選択的
に形成する工程と、 b)前記レジストパターンをマスクとして、前記基板を
エッチングし、前記基板に凹部を形成する工程と、 c)前記凹部を含む前記基板上に、半導体DBR反射膜
を形成する工程と、 d)前記半導体DBR反射膜上に、第1導電型を有する
第1の半導体領域を形成する工程と、 e)前記第1の半導体領域と前記半導体DBR反射膜を
研磨し、少なくとも前記凹部には前記第1の半導体領域
と前記半導体DBR反射膜が存在する状態で、前記第1
の半導体領域と前記半導体DBR反射膜を含む前記基板
表面を平坦化する工程と、 f)前記凹部内の前記第1の半導体領域に、前記第1導
電型とは逆導電型の第2の半導体領域を形成し、前記第
1の半導体領域と前記第2の半導体領域をPN接合させ
る工程とを有することを特徴とする発光・受光素子の製
造方法。
3. A step of selectively forming a resist pattern on a substrate; b) a step of etching the substrate with the resist pattern as a mask to form a concave portion in the substrate; and c) the concave portion. Forming a semiconductor DBR reflective film on the substrate including d), d) forming a first semiconductor region having a first conductivity type on the semiconductor DBR reflective film, and e) the first semiconductor region. The semiconductor region and the semiconductor DBR reflective film are polished, and the first semiconductor region and the semiconductor DBR reflective film are present in at least the recess,
Planarizing the surface of the substrate including the semiconductor region and the semiconductor DBR reflective film, and f) a second semiconductor having a conductivity type opposite to that of the first conductivity type in the first semiconductor region in the recess. A method of manufacturing a light emitting / receiving element, comprising: forming a region and forming a PN junction between the first semiconductor region and the second semiconductor region.
【請求項4】 a)基板上にレジストパターンを選択的
に形成する工程と、 b)前記レジストパターンをマスクとして、前記基板を
エッチングし、前記基板に凹部を形成する工程と、 c)前記凹部を含む前記基板上に、半導体DBR反射膜
を形成する工程と、 d)前記半導体DBR反射膜上に、第1導電型を有する
第1の半導体領域を形成する工程と、 e)前記第1の半導体領域上に、前記第1導電型とは逆
導電型の第2の半導体領域をエピタキシャル成長によっ
て連続的に形成し、前記第1の半導体領域と前記第2の
半導体領域をPN接合させる工程と、 f)前記第1及び第2の半導体領域と前記半導体DBR
反射膜を研磨し、少なくとも前記凹部には前記第1及び
第2の半導体領域と前記半導体DBR反射膜が存在する
状態で、前記第1及び第2の半導体領域と前記半導体D
BR反射膜を含む前記基板表面を平坦化する工程とを有
することを特徴とする発光・受光素子の製造方法。
4. A step of selectively forming a resist pattern on a substrate; b) a step of etching the substrate using the resist pattern as a mask to form a concave portion in the substrate; and c) the concave portion. Forming a semiconductor DBR reflective film on the substrate including d), d) forming a first semiconductor region having a first conductivity type on the semiconductor DBR reflective film, and e) the first semiconductor region. A step of continuously forming a second semiconductor region having a conductivity type opposite to that of the first conductivity type on the semiconductor region by epitaxial growth, and forming a pn junction between the first semiconductor region and the second semiconductor region; f) the first and second semiconductor regions and the semiconductor DBR
The reflective film is polished, and at least the first and second semiconductor regions and the semiconductor DBR reflective film are present in at least the recess, and the first and second semiconductor regions and the semiconductor D are formed.
And a step of planarizing the surface of the substrate including the BR reflective film.
【請求項5】 a)第1導電型を有する半導体基板表面
上にレジストパターンを選択的に形成する工程と、 b)前記レジストパターンをマスクとして、前記基板表
面をエッチングし、前記基板表面に台形状の凸部を形成
する工程と、 c)前記凸部を含む前記基板表面上に、半導体DBR反
射膜を形成する工程と、 d)前記半導体DBR反射膜上に、支持基板を形成する
工程と、 e)前記半導体基板裏面を研磨し、少なくとも前記凸部
には前記半導体基板と前記半導体DBR反射膜が存在す
る状態で、前記半導体基板と前記半導体DBR反射膜を
含む前記支持基板裏面を平坦化する工程と、 f)前記凸部内の前記半導体基板に、前記第1導電型と
は逆導電型の第1の半導体領域を形成し、前記半導体基
板と前記第1の半導体領域をPN接合させる工程とを有
することを特徴とする発光・受光素子の製造方法。
5. A step of selectively forming a resist pattern on the surface of a semiconductor substrate having the first conductivity type; and b) etching the substrate surface using the resist pattern as a mask to form a table on the substrate surface. Forming a convex portion having a shape; c) forming a semiconductor DBR reflective film on the surface of the substrate including the convex portion; and d) forming a support substrate on the semiconductor DBR reflective film. E) polishing the back surface of the semiconductor substrate, and flattening the back surface of the support substrate including the semiconductor substrate and the semiconductor DBR reflection film in a state where the semiconductor substrate and the semiconductor DBR reflection film are present at least in the convex portion. F) forming a first semiconductor region of a conductivity type opposite to that of the first conductivity type on the semiconductor substrate in the convex portion, and forming a PN junction between the semiconductor substrate and the first semiconductor region. Manufacturing method of the light emitting and receiving element; and a that step.
JP22399292A 1992-08-24 1992-08-24 Light-emitting / light-receiving element and manufacturing method thereof Expired - Fee Related JP3225103B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP22399292A JP3225103B2 (en) 1992-08-24 1992-08-24 Light-emitting / light-receiving element and manufacturing method thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP22399292A JP3225103B2 (en) 1992-08-24 1992-08-24 Light-emitting / light-receiving element and manufacturing method thereof

Publications (2)

Publication Number Publication Date
JPH0677522A true JPH0677522A (en) 1994-03-18
JP3225103B2 JP3225103B2 (en) 2001-11-05

Family

ID=16806893

Family Applications (1)

Application Number Title Priority Date Filing Date
JP22399292A Expired - Fee Related JP3225103B2 (en) 1992-08-24 1992-08-24 Light-emitting / light-receiving element and manufacturing method thereof

Country Status (1)

Country Link
JP (1) JP3225103B2 (en)

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2003028076A1 (en) * 2001-09-27 2003-04-03 Tongji University Method of manufacturing semiconductor device having composite buffer layer
KR20040001181A (en) * 2002-06-27 2004-01-07 주식회사 하이닉스반도체 CMOS Image Sensor and Method for Fabricating of the Same
JP2009135186A (en) * 2007-11-29 2009-06-18 Sony Corp Optical sensor and display device
JP2009290161A (en) * 2008-06-02 2009-12-10 Mitsubishi Electric Corp Optical semiconductor device
JP2011049579A (en) * 2010-10-13 2011-03-10 Sony Corp Solid-state image pickup device, manufacturing method of the same, and imaging device
CN102838080A (en) * 2012-09-12 2012-12-26 中国科学院苏州纳米技术与纳米仿生研究所 Three-dimensional photon limiting optical microcavity structure and preparation method thereof
US8384809B2 (en) 2008-10-23 2013-02-26 Sony Corporation Solid-state imaging device and method of manufacturing the same, and imaging apparatus
CN103022278A (en) * 2011-09-27 2013-04-03 大连美明外延片科技有限公司 Preparation method of patterned sapphire substrate
CN104241478A (en) * 2014-09-24 2014-12-24 杭州士兰明芯科技有限公司 LED (light emitting diode) substrate structure and manufacturing method thereof
WO2022104598A1 (en) * 2020-11-18 2022-05-27 苏州晶湛半导体有限公司 Semiconductor structure and method for fabrication thereof, and light-emitting device and method for fabrication thereof

Cited By (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2003028076A1 (en) * 2001-09-27 2003-04-03 Tongji University Method of manufacturing semiconductor device having composite buffer layer
US7192872B2 (en) 2001-09-27 2007-03-20 Tongji University Method of manufacturing semiconductor device having composite buffer layer
KR20040001181A (en) * 2002-06-27 2004-01-07 주식회사 하이닉스반도체 CMOS Image Sensor and Method for Fabricating of the Same
JP2009135186A (en) * 2007-11-29 2009-06-18 Sony Corp Optical sensor and display device
JP2009290161A (en) * 2008-06-02 2009-12-10 Mitsubishi Electric Corp Optical semiconductor device
US8773559B2 (en) 2008-10-23 2014-07-08 Sony Corporation Solid-state imaging device and method of manufacturing the same, and imaging apparatus
US8384809B2 (en) 2008-10-23 2013-02-26 Sony Corporation Solid-state imaging device and method of manufacturing the same, and imaging apparatus
JP2011049579A (en) * 2010-10-13 2011-03-10 Sony Corp Solid-state image pickup device, manufacturing method of the same, and imaging device
CN103022278A (en) * 2011-09-27 2013-04-03 大连美明外延片科技有限公司 Preparation method of patterned sapphire substrate
CN102838080A (en) * 2012-09-12 2012-12-26 中国科学院苏州纳米技术与纳米仿生研究所 Three-dimensional photon limiting optical microcavity structure and preparation method thereof
CN104241478A (en) * 2014-09-24 2014-12-24 杭州士兰明芯科技有限公司 LED (light emitting diode) substrate structure and manufacturing method thereof
WO2022104598A1 (en) * 2020-11-18 2022-05-27 苏州晶湛半导体有限公司 Semiconductor structure and method for fabrication thereof, and light-emitting device and method for fabrication thereof
TWI843971B (en) * 2020-11-18 2024-06-01 中國商蘇州晶湛半導體有限公司 Semiconductor structure and manufacturing method thereof, light emitting device and manufacturing method thereof

Also Published As

Publication number Publication date
JP3225103B2 (en) 2001-11-05

Similar Documents

Publication Publication Date Title
US6570190B2 (en) LED having angled sides for increased side light extraction
US6403985B1 (en) Method of making light emitting diode displays
US6111272A (en) Semiconductor light source formed of layer stack with total thickness of 50 microns
KR20010108094A (en) Injection incoherent emitter
US5349211A (en) Semiconductor infrared emitting device with oblique side surface with respect to the cleavage
JP2013501357A (en) Pixelated LED
US6750072B2 (en) Method for micro-fabricating a pixelless infrared imaging device
US5349210A (en) Optical reading head with angled array
JPH02174272A (en) Manufacture of light-emitting diode array
JPH02155278A (en) Optically functional element
TWI590486B (en) Optoelectronic system
JPH0677522A (en) Light emitting/light detecting element and their manufacture
EP0486052A1 (en) Light-emitting diode for concurrently emitting lights having different wavelengths
JP2806423B2 (en) Surface-emitting semiconductor device
EP0772248B1 (en) Microactivity LED with photon recycling
JPS59205774A (en) Semiconductor light-emitting element
JPH06151955A (en) Semiconductor light emitting element
JPH06302853A (en) Semiconductor light-emitting element
JPH07131066A (en) Light emitting diode
JPH02105585A (en) Semiconductor photodetector
KR890003418B1 (en) Manufacturing method of semiconductor light emitting diode
JPS607500Y2 (en) Photoelectric conversion semiconductor device
JPH0677531A (en) Semiconductor light emitting element and its manufacture
JPH06132563A (en) Semiconductor light emitting device
JPS5844779A (en) Light emitting element

Legal Events

Date Code Title Description
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20010814

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20070824

Year of fee payment: 6

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20080824

Year of fee payment: 7

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20090824

Year of fee payment: 8

S111 Request for change of ownership or part of ownership

Free format text: JAPANESE INTERMEDIATE CODE: R313111

S531 Written request for registration of change of domicile

Free format text: JAPANESE INTERMEDIATE CODE: R313531

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20090824

Year of fee payment: 8

R350 Written notification of registration of transfer

Free format text: JAPANESE INTERMEDIATE CODE: R350

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20090824

Year of fee payment: 8

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20100824

Year of fee payment: 9

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20100824

Year of fee payment: 9

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20110824

Year of fee payment: 10

LAPS Cancellation because of no payment of annual fees