JPH067228U - Ceramic capacitors - Google Patents

Abstract

(57) [Summary] [Object] To provide a ceramic capacitor capable of suppressing generated inductance to 0.1 nH or less. [Structure] The substrate electrode 37 is formed only on the bottom surface of the chip body 31, and the long side of the internal electrode 35 and the substrate electrode 37 are VI.
The internal electrode 35 is connected while being connected through the A hole 39.
The length of the long side of the internal electrode 35 is a, and the length of the short side of the internal electrode 35 is b.
Then, b / a is set to 0.5 or less. The thickness of the substrate electrode 37 is preferably 20 μm or less.

Description

[Detailed description of the device]

[0001]

[Industrial applications]

 The present invention relates to, for example, a ceramic capacitor having a capacitor section and a substrate electrode for connecting to the wiring of an external electric circuit board, and is particularly incorporated in a large computer or the like that switches at extremely high speed. It relates to low-inductance ceramic capacitors.

[0002]

[Prior art]

 Conventionally, as a surface mount type ceramic capacitor, a chip capacitor disclosed in JP-A-59-914 is known.

FIG. 3 and FIG. 4 show such a chip capacitor, and this chip capacitor has a capacitor section 13 inside a chip body 11 made of a dielectric ceramic.

On the left and right sides of the chip body 11, substrate electrodes 15 connected to the wiring of an external electric circuit substrate are formed, and the thickness of these substrate electrodes 15 is set to 50 to 100 μm. One ends of the internal electrodes 17 forming the capacitor section 13 are connected to each other. The board electrode 15 is connected to the board by soldering or the like.

[0005]

[Problems to be solved by the device]

 By the way, in the ceramic capacitor, as shown in FIG. 3, when the length of the internal electrode 17 on the substrate electrode 15 side is a and the length of the internal electrode 17 not on the substrate electrode 15 side is b, It is generally known that the larger the / a becomes, the larger the inductance becomes. However, in the ceramic capacitors shown in FIGS. 3 and 4, b / a was as large as 1.5 or more, so that the inductance was less than 0. There is a problem that the circuit malfunctions due to noise generation in a circuit module that switches to a very high speed, which is increased to 8 nH or more.

That is, in recent years, particularly in a large computer or the like that switches at high speed, if the inductance of the ceramic capacitor becomes larger than 0.1 nH, it may malfunction due to noise generation. There was a problem that the drawer was over 0.8 nH and could not be applied to electronic devices in the near future.

Further, it is generally known that the inductance of a ceramic capacitor depends on the thickness of the substrate electrode 15, and the larger the thickness, the larger the inductance. However, since the thickness of the substrate electrode 15 is as thick as 50 to 100 μm, there is a problem in that the inductance becomes large and a circuit malfunctions due to noise generation in a circuit module that switches at a very high speed.

On the other hand, ceramic capacitors as shown in FIGS. 5 and 6 have been developed in order to prevent such circuit malfunction due to noise generation. In this ceramic capacitor, when the length of the internal electrode 17 on the substrate electrode 15 side is a and the length of the internal electrode 17 on the side other than the substrate electrode 15 side is b, b / a is 0.5 to 0.5. It is set to 0.7, and with such a configuration, the generated inductance can be suppressed to about 0.3 nH, but like the ceramic capacitors shown in FIGS. 3 and 4 above, The inductance became larger than 0.1 nH, and there was a risk of malfunction due to noise generation.

An object of the present invention is to provide a ceramic capacitor capable of suppressing the generated inductance to 0.1 nH or less.

[0010]

[Means for solving problems]

 The ceramic capacitor of the present invention comprises a chip body having a capacitor part formed by interposing a rectangular internal electrode between dielectric layers, and a ceramic body formed on the surface of the chip body and connected to an external electric circuit board. In a ceramic capacitor consisting of a pair of board electrodes connected to wiring, the board electrodes are formed only on the bottom surface of the chip body, and the long sides of the internal electrodes and the board electrodes are provided with VIA holes. B / a = 0.5 or less, where a is the length of the long side of the internal electrode and b is the length of the short side of the internal electrode. The thickness of the substrate electrode is preferably 20 μm or less.

[0011]

[Action]

 In the ceramic capacitor of the present invention, the substrate electrode is formed only on the bottom surface of the chip body, and the long side of the internal electrode is connected to the substrate electrode through the VIA hole. When the length is a and the length of the short side of the internal electrode is b, the inductance generated in the ceramic capacitor can be suppressed to 0.1 nH or less by setting b 1 / a to 0.5 or less. Further, by setting the thickness of the substrate electrode to 20 μm or less, the inductance generated in the ceramic capacitor can be further reduced.

[0012]

【Example】

Hereinafter, the ceramic capacitor of the present invention will be described in detail with reference to the drawings. 1 and 2 show a ceramic capacitor of the present invention. In the drawings, reference numeral 31 indicates a chip body made of, for example, BaTiO ₃ . The chip body 31 has a length of 3.2 mm, a width of 1.6 mm, and a thickness of 1.0 mm, for example, and is formed by laminating a large number of porcelain sheets.

A capacitor part 33 is formed in the chip body 31. The capacitor portion 33 is formed by interposing a rectangular internal electrode 35 made of Pd, for example, between the porcelain sheets forming the chip body 31.

Two substrate electrodes 37 made of, for example, Pd are formed on the bottom surface of the chip body 31, and these substrate electrodes 37 are connected to the internal electrodes 35 by VIA holes 39. The VIA holes 39 are connected to the long sides of the rectangular internal electrodes 35, and these VIA holes 39 are formed on both sides of the capacitor section 33 in the stacking direction. Inside the VIA holes 39, for example, , Pd is filled with the conductor. These VIA holes 39 have a length of 40 to 90 μm and a diameter of 120 to 130 μm. The substrate electrode 37 is made of Pd, for example, and has a length and width of 0.6 mm and a thickness of 20 μm or less.

As shown in FIG. 1, the internal electrode 35 has b / a of 0.5 or less, where the length of the long side is a and the length of the short side is b. .

In the ceramic capacitor configured as described above, the substrate electrode 37 is formed only on the bottom surface of the chip body 31, and the VIA hole 39 connected to the long side of the internal electrode 35 is connected to the substrate electrode 37. In addition, if the length of the long side of the internal electrode 35 is a and the length of the short side of the internal electrode 35 is b, then by setting b / a to 0.5 or less, the inductance generated in the ceramic capacitor is reduced to 0. It can be suppressed to 1 nH or less, and even in a circuit module that switches at an extremely high speed, the circuit does not malfunction due to noise. Moreover, since the thickness of the substrate electrode 37 is set to 20 μm or less, the inductance generated in the ceramic capacitor can be further reduced.

Since the length of the VIA hole 39 is involved in the generation of inductance, it is preferable to make the length as short as possible.

Example 1 The present inventors conducted an experiment in order to confirm the effect of the above invention.

First, a porcelain sheet molded body made of BaTiO ₃ and internal electrode layers made of Pd were alternately laminated to form a chip body having a length of 3.2 mm, a width of 1.6 mm, and a thickness of 1.0 mm.

A substrate electrode made of Pd having a length of 0.6 mm and a width of 0.6 mm was formed on the bottom surface of the chip body, and the substrate electrode and the internal electrode were connected by a conductor made of Pd.

Then, a ceramic capacitor was created, the value of the ratio b / a of the side lengths of the internal electrodes was variously changed, and the generation state of the inductance of the ceramic capacitor was measured by a measuring instrument YHP4191A at a measurement frequency of 500 MHz. . The thickness of the substrate electrode was variously changed, and the occurrence of inductance of the ceramic capacitor was measured in the same manner as above. The results are shown in Table 1.

[0022]

[Table 1]

From Table 1, it was confirmed that when the value of b / a was 0.5 or less, the inductance value was 0.1 nH or less. It was also confirmed that the inductance value was further reduced when the value of b / a was 0.5 or less and the thickness of the substrate electrode was 20 μm or less. In addition, in order to investigate the influence of only the substrate electrode, the other configurations such as the length and cross-sectional area of the VIA hole were fixed.

In order to confirm the effect of the present invention, in the conventional ceramic capacitor of FIG. 3 manufactured under the same conditions as the size and material of the chip body, the thickness of the substrate electrode is fixed to 70 μm. Then, when the values of b / a were changed to 1.6 and 1.8, the inductances became 0.958 and 1.048 nH. Further, when the value of b / a was kept constant at 1.6 and the thickness of the substrate electrode was changed to 70 and 100 μm, the inductances were 0.958 and 0.978 nH, respectively.

Further, in the conventional ceramic capacitor of FIG. 5, the inductance was 0.397 nH when the thickness of the substrate electrode was 70 μm and the value of b / a was 0.558. When the value of b 2 / a was kept constant at 0.558 and the thickness of the substrate electrode was changed to 70 and 100 μm, the inductances were 0.397 and 0.417 nH, respectively.

[0026]

[Effect of device]

 In the ceramic capacitor of the present invention, the substrate electrode is formed only on the bottom surface of the chip body, the long side of the internal electrode is connected to the substrate electrode through the VIA hole, and the long side of the internal electrode is Letting a be the length of the short side of the internal electrode, and b / a is 0.5 or less, the inductance generated in the ceramic capacitor can be suppressed to 0.1 nH or less, which is very fast. Even in a circuit module that switches, malfunction of the circuit due to noise generation can be suppressed to a minimum. Further, by setting the thickness of the substrate electrode to 20 μm or less, the inductance generated in the ceramic capacitor can be further reduced.

[Brief description of drawings]

FIG. 1 is a cross-sectional view showing a ceramic capacitor of the present invention.

FIG. 2 is a vertical sectional view of a ceramic capacitor of the present invention.

FIG. 3 is a cross-sectional view showing a conventional ceramic capacitor.

FIG. 4 is a vertical sectional view of a conventional ceramic capacitor.

FIG. 5 is a cross-sectional view showing another conventional ceramic capacitor.

FIG. 6 is a vertical cross-sectional view of another conventional ceramic capacitor.

[Explanation of symbols]

 31 chip body 33 condenser part 35 internal electrode 37 substrate electrode 39 VIA hole

Claims (2)

[Scope of utility model registration request] 1. A chip body having a capacitor portion formed by interposing a rectangular internal electrode between dielectric layers, and a wiring formed on a surface of the chip body and connected to an external electric circuit board. In a ceramic capacitor including a pair of substrate electrodes, the substrate electrode is formed only on the bottom surface of the chip body, and the long side of the internal electrode is connected to the substrate electrode through a VIA hole. At the same time, when the length of the long side of the internal electrode is a and the length of the short side of the internal electrode is b, b / a = 0.5 or less. 2. The ceramic capacitor according to claim 1, wherein the substrate electrode has a thickness of 20 μm or less.