JPH0671142B2 - Method for manufacturing multilayer printed circuit board - Google Patents

Method for manufacturing multilayer printed circuit board

Info

Publication number
JPH0671142B2
JPH0671142B2 JP7011685A JP7011685A JPH0671142B2 JP H0671142 B2 JPH0671142 B2 JP H0671142B2 JP 7011685 A JP7011685 A JP 7011685A JP 7011685 A JP7011685 A JP 7011685A JP H0671142 B2 JPH0671142 B2 JP H0671142B2
Authority
JP
Japan
Prior art keywords
layer
circuit
circuit board
insulating
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP7011685A
Other languages
Japanese (ja)
Other versions
JPS61229390A (en
Inventor
章二 志賀
久子 堀
徹 谷川
俊夫 谷
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
THE FURUKAW ELECTRIC CO., LTD.
Original Assignee
THE FURUKAW ELECTRIC CO., LTD.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by THE FURUKAW ELECTRIC CO., LTD. filed Critical THE FURUKAW ELECTRIC CO., LTD.
Priority to JP7011685A priority Critical patent/JPH0671142B2/en
Publication of JPS61229390A publication Critical patent/JPS61229390A/en
Publication of JPH0671142B2 publication Critical patent/JPH0671142B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Description

【発明の詳細な説明】 (産業上の利用分野) 本発明は電子機器、部品に使用される高密度多層プリン
ト回路基板の製造方法に関するものである。
Description: TECHNICAL FIELD The present invention relates to a method for manufacturing a high-density multilayer printed circuit board used in electronic devices and parts.

(従来の技術) 高密度実装可能なプリント回路基板としては、一般にガ
ラスエポキシ樹脂などのレジン基板の両面にCu箔を張合
せ、レジストエッチング処理により予め所定の回路パタ
ーンを形成したものを単位とし、これら数枚を積層固化
してからスルホールで導通回路を形成するようにしたも
のが広く実用化されている。しかしこの場合、伝熱性に
劣るレジンの比較的厚い基板のため、その放熱特性に乏
しく実用上不都合な場合が多い。そこでこれに対処すべ
くセラミック基板を用いた多層基板がコンピューター,
自動車,産業機器等に数多く使用されている。しかし該
セラミック基板はそのサイズに限定されるのみでなく、
コスト高でかつ製造歩留りが低くなり高価格化の原因と
なり、更に放熱性の向上にも限度がある。
(Prior Art) As a printed circuit board capable of high-density mounting, generally, a unit in which a predetermined circuit pattern is previously formed by resist etching treatment by laminating Cu foil on both surfaces of a resin substrate such as glass epoxy resin, Those in which a conductive circuit is formed by through holes after laminating and solidifying these several sheets have been widely put into practical use. However, in this case, since the resin is a relatively thick substrate which is inferior in heat transfer property, its heat dissipation property is poor and it is practically inconvenient in many cases. In order to deal with this, a multilayer substrate using a ceramic substrate is a computer,
It is widely used in automobiles, industrial equipment, etc. However, the ceramic substrate is not limited to its size,
The cost is high and the manufacturing yield is low, which causes a high price, and there is a limit to the improvement of heat dissipation.

(発明が解決しようとする問題点) ここに放熱特性に優れ経済性の向上された多層回路基板
が広く求められており、これに応えるべく新規な多層回
路基板の製造方法の確立が急務とされている。
(Problems to be Solved by the Invention) Here, there is a wide demand for a multilayer circuit board having excellent heat dissipation characteristics and improved economical efficiency, and in order to meet this demand, it is urgently necessary to establish a new method for manufacturing a multilayer circuit board. ing.

(問題点を解決するための手段) 本発明は、絶縁処理された金属やセラミック,レジンな
どの基体上に任意の方法で形成された第1層回路上に第
2及び第3層以上の回路を上記問題を生ずることなく形
成することにより多層回路基板を得る方法であり、以下
第1図を用いて具体的に説明する。
(Means for Solving the Problems) The present invention relates to a circuit of a second layer and a third layer or more on a first layer circuit formed by an arbitrary method on a substrate such as a metal, a ceramic or a resin which has been subjected to an insulation treatment. Is a method for obtaining a multilayer circuit board by forming the above-mentioned problem without causing the above problem, which will be specifically described below with reference to FIG.

特に放熱性を重視する場合は、基体1としてAl,Cu,Feな
どの金属板が好適である。先ず、第1絶縁層2を介して
第1層回路3,3′を基体1上に形成する。通常は、前記
第1絶縁層2の少なくとも一部を接着剤として例えば35
μ又は18μ程度のCu箔を張合せレジストエッチング処理
により上記の第1層回路を形成するのが工業的に有利で
ある。前記第1絶縁層2としては、エポキシ,フェノー
ルポリアミド,ポリイミドなどのレジンが有用であり、
この場合上述の伝熱性及び機械的強度向上の目的でBN,A
l2O3,TiO2,AlN,ZrO2などのセラミック粉末を5〜40%
混合するのが有効である。
Especially when the heat dissipation is important, a metal plate of Al, Cu, Fe or the like is suitable as the base 1. First, the first layer circuits 3 and 3 ′ are formed on the substrate 1 with the first insulating layer 2 interposed therebetween. Usually, at least a part of the first insulating layer 2 is used as an adhesive, for example, 35
It is industrially advantageous to form the above-mentioned first layer circuit by laminating a Cu foil of about μ or about 18 μ and performing a resist etching process. As the first insulating layer 2, a resin such as epoxy, phenol polyamide, or polyimide is useful,
In this case, in order to improve the heat transfer and mechanical strength mentioned above, BN, A
l 2 O 3, TiO 2, AlN, the ceramic powder such as ZrO 2 5 to 40%
Mixing is effective.

次に上記第1層回路上に、第1層回路と第2層回路とを
導通するスルースタッド4を導電ペーストを用いて形成
する。導電ペーストは通常、Cu,Ag,AgPd,Auなどの粉末
を60〜95%(該金属粉末/金属粉末+レジン)含有さ
せ、固有抵抗にして2〜104mΩ/cmを有する。そしてレ
ジン成分としてはフェノール,変性フェノキシ,エポキ
シ,イミド等が用いられる。これらの成分と共に、溶剤
例えばブチルカルビトール、粘度調整及び酸化防止など
の目的で各種の添加剤などが混和配合される。第1及び
第2層回路の幅は通例約0.1〜0.7mm巾位であり、又第2
絶縁層の厚さは電気絶縁性及び放熱性を考慮して約0.03
〜0.1mm位である。更にスルースタッドは断面約0.3〜1m
mΦ、高さを0.03〜0.15mmの円柱またはこれに類似した
角柱状とする。この様な微小スルースタッドは、通常高
密度プリント回路においては約1〜10個/cm2の高密度
に形成されなければならず、これを工業的に確実に実施
するにはスクリーン印刷法にて行うのが最も好適であ
る。常法によりスクリーン印刷された導電ペーストは約
150〜250℃の温度で加熱固化される。
Next, through studs 4 for electrically connecting the first layer circuit and the second layer circuit are formed on the first layer circuit by using a conductive paste. The conductive paste usually contains powder such as Cu, Ag, AgPd and Au in an amount of 60 to 95% (the metal powder / metal powder + resin) and has a specific resistance of 2 to 10 4 mΩ / cm. As the resin component, phenol, modified phenoxy, epoxy, imide or the like is used. In addition to these components, a solvent such as butyl carbitol and various additives for the purpose of adjusting viscosity and preventing oxidation are mixed and blended. The width of the first and second layer circuits is usually about 0.1 to 0.7 mm width, and
The thickness of the insulating layer is about 0.03 in consideration of electric insulation and heat dissipation.
It is about 0.1 mm. Furthermore, the through stud has a cross section of approximately 0.3 to 1 m.
mΦ and a height of 0.03 to 0.15 mm, or a prism like this. Such minute through studs usually have to be formed at a high density of about 1 to 10 pieces / cm 2 in a high-density printed circuit, and in order to reliably carry out this industrially, the screen printing method is used. Most preferably, it is done. Conductive paste screen-printed by the conventional method is about
It is heated and solidified at a temperature of 150 to 250 ° C.

次に、絶縁性レジンを用いて上記第1層回路上に第2絶
縁層5を前記第1絶縁層2と同様のレジンを用いて形成
する。この場合上記スルースタッド4などを損傷するこ
となく確実に該レジンを層状に形成するようスクリーン
印刷法で行うのが最も望ましく、又欠陥のない一定厚さ
のレジン層を形成するために2回以上に分けて該スクリ
ーン印刷を行うのが望ましい。そして特に、第1層回路
の間隔部6は前記スルースタッドの形成工程に先立ち予
めレジンで埋めておくようにすることが望ましい。該第
2絶縁層5の厚さは、前記スルースタッド4の頂部と同
等又は上下するようなものでも良い。
Next, an insulating resin is used to form the second insulating layer 5 on the first layer circuit by using the same resin as the first insulating layer 2. In this case, it is most preferable to perform the screen printing method so as to surely form the resin in layers without damaging the through studs 4 or the like, and more than twice in order to form a resin layer having a constant thickness without defects. It is desirable to perform the screen printing separately. In particular, it is desirable that the gap portion 6 of the first layer circuit be filled with resin in advance before the step of forming the through stud. The thickness of the second insulating layer 5 may be equal to or higher than the top of the through stud 4.

次に、後記する第2層回路パターン9と略同形にPd触媒
を付着形成する。この触媒付着方法としては、Pdを含有
する触媒ペーストをスクリーン印刷法により印刷する
か、又は剥離性レジストを予め全面に印刷し被処理部を
エッチング処理しその部分の表面を粗化活性化しPdを含
有させた溶液に適宜接触させてPdを吸着させ前記レジス
トを剥離するような方法が良い。そして更に工業的に確
実でより能率的な方法として、予め全面をエッチング処
理し上述のPd吸着をその全面に行ない、次に第2層回路
部パターン9,9′を残して他部をレジスト被覆処理8,8′
することである。この場合、上記絶縁層5の少なくとも
表層部に予めエッチングされ易いレジン組成を配する
と、第2層回路の密着性の向上に役立つ。具体的にはエ
ポキシ樹脂などの絶縁層の表層に、ゴム分を若干含有す
る接着層7を薄くスクリーン印刷することが望ましい。
該ゴム分としては、ニトリルゴム,ブタジエンゴム,天
然ゴム等が用いられる。CrO3などを用いたエッチング液
での処理によりゴム分が優先的に酸化エッチングされ
て、前記の粗化及び活性化の両効果を発揮し得る。
Next, a Pd catalyst is deposited and formed in substantially the same shape as the second layer circuit pattern 9 described later. As this catalyst adhesion method, a Pd-containing catalyst paste is printed by a screen printing method, or a peelable resist is preliminarily printed on the entire surface and the treated portion is subjected to an etching treatment to roughen and activate the surface of the portion, and Pd A method is suitable in which Pd is adsorbed by appropriately contacting the contained solution to peel off the resist. Further, as a more industrially reliable and more efficient method, the entire surface is previously etched and the above-described Pd adsorption is performed on the entire surface, and then the second layer circuit pattern 9 and 9'is left and the other part is covered with a resist. Processing 8,8 ′
It is to be. In this case, providing a resin composition that is easily etched in advance on at least the surface layer portion of the insulating layer 5 helps improve the adhesiveness of the second layer circuit. Specifically, it is desirable to thinly screen print the adhesive layer 7 containing a small amount of rubber on the surface layer of the insulating layer such as epoxy resin.
As the rubber component, nitrile rubber, butadiene rubber, natural rubber or the like is used. The rubber component is preferentially oxidized and etched by the treatment with an etching solution using CrO 3 or the like, so that both the effects of roughening and activation can be exhibited.

次に、これを化学メッキ液に浸漬して第2層回路9,9′
を形成する。メッキ金属としてはCu,Ni,Ag,Au,Su等が挙
げられるが、これらの組合せも利用される。特にCuは工
業的に汎用される導体として最も実用的であるが、予め
Niメッキしてから、この上にCuをメッキすることが接着
力の点で有利である。又化学メッキ液に対しては一般に
金属イオン,錯化剤,還元剤等の各種の添加物が配合さ
れる。かかる化学メッキによって上述のPdを吸着した絶
縁層上及び頂部が露出したスルースタッド表面に連続し
てメッキが起る。例えばCuメッキに於いては、Cu++イオ
ンのホルマリンによる還元反応が、Pdの外、CuやPd,Ag,
Auなどのスルースタッド導電粒子によっても起る。この
第2層回路の厚さは使用目的及び条件にもよるが、一般
には10〜30μである。
Next, this is immersed in a chemical plating solution and the second layer circuit 9, 9 '
To form. Examples of the plating metal include Cu, Ni, Ag, Au, Su and the like, but combinations thereof are also used. In particular, Cu is most practical as a conductor that is commonly used industrially, but
It is advantageous in terms of adhesiveness that Ni is plated first and then Cu is plated thereon. Various additives such as metal ions, complexing agents and reducing agents are generally added to the chemical plating solution. By such chemical plating, plating continuously occurs on the insulating layer that adsorbs Pd and on the surface of the through stud where the top is exposed. For example, in Cu plating, the reduction reaction of Cu ++ ions with formalin is not limited to Pd, but Cu, Pd, Ag,
It is also caused by through stud conductive particles such as Au. The thickness of the second layer circuit depends on the purpose of use and conditions, but is generally 10 to 30 μm.

以上の本発明に於いて、第3層以上に多層回路を形成す
る場合は前記の第2層形成のための工程をくり返すこと
により容易に実施される。尚、図において上記触媒付け
部をCで表わした。
In the present invention as described above, in the case of forming a multi-layer circuit in the third layer or more, it can be easily carried out by repeating the steps for forming the second layer. In the figure, the catalyst attachment portion is represented by C.

(作用) 本発明においては、基体としてAl,Cu,Fe等の金属板を用
いたとき、レジン基体の多層回路はもとよりセラミック
多層回路基盤と同等あるいはそれ以上の高い放熱性を発
揮できるので、高密度な電子部品の実装を可能にする。
又特に絶縁層にレジンを用いかつスクリーン印刷法によ
り可及的薄肉化し得るので、上述の放熱性の障害を最小
限にとどめ得る。このことは従来のガラスエポキシ基盤
の多層化品と対比すれば著しく明瞭である。即ち従来例
では基板中に多量の空隙が残留しており、電気絶縁性を
著しく低下させる原因となっているが、本発明において
0.02〜0.05mm厚で1000mΩ以上の高い絶縁性を発揮でき
るのに対する相当品は0.1〜0.2mm厚を必要とする。更に
前記空隙は水分や電解質の浸透を惹起する恐れがありセ
ラミックでも同様のことが起り得る。
(Operation) In the present invention, when a metal plate of Al, Cu, Fe or the like is used as the substrate, it is possible to exhibit a high heat dissipation property equal to or higher than that of the ceramic multilayer circuit substrate as well as the multilayer circuit of the resin substrate. Enables mounting of dense electronic components.
In addition, since the resin is particularly used for the insulating layer and the thickness can be made as thin as possible by the screen printing method, the above-mentioned obstacle of heat dissipation can be minimized. This is remarkably clear in comparison with the conventional glass epoxy-based multi-layered product. That is, in the conventional example, a large amount of voids remain in the substrate, which is a cause of remarkably lowering the electrical insulating property.
The equivalent product that can exhibit a high insulation property of 1000 mΩ or more at a thickness of 0.02 to 0.05 mm requires a thickness of 0.1 to 0.2 mm. Further, the voids may cause water or electrolyte to permeate, and the same may occur with ceramics.

次に本発明の上記スルースタッドは導電ペーストから成
り、通常金属より電気抵抗が大きい、しかし、前記の如
く、短かい距離であるばかりでなく、従来のスルーホー
ル構造と対比して、大きな断面積を有するので、回路抵
抗としては全く無視し得る。更に上記スルースタッドと
回路との接合が強固に形成されているので、熱や機械的
応力にも長期間にわたって耐え得るものとなり高い信頼
性を保ち得る。
Next, the above-mentioned through stud of the present invention is made of conductive paste and generally has a larger electric resistance than metal, but as described above, not only is it a short distance, but it has a large cross-sectional area as compared with the conventional through hole structure. Therefore, it can be completely ignored as the circuit resistance. Further, since the connection between the through stud and the circuit is firmly formed, it is possible to endure heat and mechanical stress for a long period of time, and high reliability can be maintained.

実施例1 Al板(厚さ1.2mm)にAl2O315%を含有するポリアミド・
イミドレジン層(厚さ0.04mm)を介してCu箔(35μ厚)
を接着した。常法によりスクリーン印刷法でレジスト処
理してからFeCl3液でエッチングして第1層回路を形成
した。回路巾は主に0.3mmでスルースタッドの立つラン
ド部分は0.5mmとした。次に、平均粒径7μの電解Cu粉
末を85%,レゾール型フェノールレジン15%を含有し、
少量のブチルカルビノール,アセテートを溶媒として配
合した導電ペーストを用いて0.5mmΦ,高さ0.05mmのス
ルースタッドをスクリーン印刷法にて形成し、215℃,15
分間加熱固化させた。次に、エポキシレジンに15%のAl
2O3を配合した絶縁ペーストを用い第2絶縁層をスクリ
ーン印刷により設け同様に加熱固化した。なお該絶縁像
表面はスルースタッド頂部より約0.005〜0.01mm下方と
した。
Example 1 Polyamide containing 15% Al 2 O 3 in an Al plate (thickness 1.2 mm)
Cu foil (35μ thickness) through the imide resin layer (thickness 0.04mm)
Glued. A resist treatment was carried out by a screen printing method by a conventional method, and then a first layer circuit was formed by etching with a FeCl 3 solution. The circuit width is mainly 0.3 mm, and the land part where the through stud stands is 0.5 mm. Next, containing 85% electrolytic Cu powder with an average particle size of 7μ and 15% resol type phenolic resin,
A conductive paste containing a small amount of butyl carbinol and acetate as a solvent was used to form through studs with a diameter of 0.5 mm and a height of 0.05 mm by screen printing.
It was heated and solidified for a minute. Next, add 15% Al to the epoxy resin.
A second insulating layer was provided by screen printing using an insulating paste containing 2 O 3 and was similarly heated and solidified. The surface of the insulating image was about 0.005 to 0.01 mm below the top of the through stud.

次に、これを80℃の30%H2SO4溶液中に15分間浸漬し、
更に0.2wt%PdCl2溶液に1分間浸漬し、しかる後、エポ
キシレジンペーストを用い上記第2回路の形状を残して
他の部分をスクリーン印刷した。加熱固化を行った後10
%HCl溶液に1分間浸漬してから65℃のCuメッキ浴(上
村工業社、ELC−HS)に5hr浸漬し前記未印刷部に約25μ
厚のCuメッキを形成し第2層回路を形成してAl板の片面
に2層のプリント回路が設けられた高伝熱性回路基板を
得た。
Then, immerse this in a 30% H 2 SO 4 solution at 80 ° C for 15 minutes,
Further, it was dipped in a 0.2 wt% PdCl 2 solution for 1 minute, and then another portion was screen printed using an epoxy resin paste while leaving the shape of the second circuit. After heating and solidifying 10
% HCl solution for 1 minute, then immersed in a Cu plating bath (ELC-HS, Uemura Kogyo Co., Ltd.) at 65 ° C for 5 hours to obtain about 25μ in the unprinted area.
A thick Cu plating was formed to form a second layer circuit to obtain a highly heat conductive circuit board in which a two-layer printed circuit was provided on one surface of an Al plate.

実施例2 実施例1における上記のNiメッキを行うことなく、直接
Cuメッキを行った外は全く同様に行い同様の回路基板を
得た。
Example 2 Without performing the above Ni plating in Example 1, directly
A similar circuit board was obtained in the same manner except that Cu plating was performed.

実施例3 実施例1に於いて、上記の第2絶縁層を形成した後、約
7μ厚さにニトリルゴムを25%含有するエポキシペース
トをスクリーン印刷した。次にCrO3150g/lの65℃溶液を
用いて5分間処理を行い以下同様に触媒付着処理以後の
工程を継続して同様の回路基板を得た。
Example 3 In Example 1, after forming the second insulating layer, an epoxy paste containing 25% of nitrile rubber was screen printed to a thickness of about 7 μm. Then, a treatment was carried out for 5 minutes using a 65 ° C. solution of CrO 3 150 g / l, and thereafter, the steps after the catalyst adhesion treatment were similarly continued to obtain a similar circuit board.

実施例4 実施例1に於いて、第2絶縁層を形成した後、Pdを含有
する触媒ペースト(奥野製薬社、GP−150)を用いて第
2回路と略同形にスクリーン印刷した後、加熱固化し以
下同様にNi,Cuのメッキを行い同様の回路基板を得た。
Example 4 In Example 1, after forming the second insulating layer, a catalyst paste containing Pd (GP-150, Okuno Seiyaku Co., Ltd.) was screen-printed in substantially the same shape as the second circuit, and then heated. After solidification, Ni and Cu were plated in the same manner to obtain a similar circuit board.

比較例 実施例1に於いて、Al板に替えてガラスエポキシ基板
(1.0mm厚)を用いた外は同様ち行い同様の回路基板を
得た。
Comparative Example A similar circuit board was obtained in the same manner as in Example 1 except that a glass epoxy board (1.0 mm thick) was used instead of the Al plate.

以上の各実施例品につき、MIL 107法に準じて−65℃と1
25℃との温度サイクルを100回くり返して、その前後の
回路の電気抵抗を測定した。又、上記第2回路路上で電
子部品を半田付け搭載する電極パッド部(2×3mm)に
1.0ΦmmのCu線を半田付けし引張り試験を行って接着力
を測定した。更に放熱性を調べるため、IWのダイオード
を搭載して基板上下の温度測定から熱抵抗を同様に測定
した。以上の結果を下表にまとめて示した。
For each of the above example products, in accordance with MIL 107 method,
The temperature cycle with 25 ° C. was repeated 100 times, and the electric resistance of the circuit before and after that was measured. Also, in the electrode pad part (2 x 3 mm) on which the electronic component is mounted by soldering on the second circuit path.
A 1.0 Φmm Cu wire was soldered and a tensile test was performed to measure the adhesive force. Furthermore, in order to examine the heat dissipation, an IW diode was mounted and the thermal resistance was similarly measured from the temperature measurement above and below the substrate. The above results are summarized in the table below.

表の結果は自明であり、実施例1〜4はいずれも安定し
たシート抵抗値を示しており、即ち金属板を用いた実施
例1〜4がガラスエポキシの比較例に比べ約1/3の熱抵
抗に留まった。又、回路の接着力は実施例3が特に大き
な値を示した。実施例2が若干小さい値となったが、い
ずれも実用上充分であった。
The results in the table are self-explanatory, and all of Examples 1 to 4 show stable sheet resistance values, that is, Examples 1 to 4 using a metal plate are about 1/3 of the glass epoxy comparative example. Stayed in heat resistance. In addition, the adhesive force of the circuit in Example 3 showed a particularly large value. Although the value in Example 2 was a little small, all were practically sufficient.

(効果) 以上の説明から明らかなように、本発明方法によれば、
電子機器の小型化及び高機能化に不可欠の新規な多層プ
リント基板が著しく経済的に製造できる。そして実施例
にて明白なように金属板を基体とする場合には放熱性の
極めて優れたものとなり、その結果小型部品を高密度に
実装することができ、今後益々発展が特に期待される面
実装に最適な多層プリント回路基板を提供し得る効果が
ある。
(Effect) As is clear from the above description, according to the method of the present invention,
A novel multilayer printed circuit board, which is indispensable for miniaturization and high functionality of electronic devices, can be manufactured significantly economically. As is clear from the examples, when a metal plate is used as a base, the heat dissipation becomes extremely excellent, and as a result, small parts can be mounted at high density, and further development is expected in the future. This has the effect of providing a multilayer printed circuit board that is optimal for mounting.

【図面の簡単な説明】[Brief description of drawings]

図面は本発明の実施例による回路基板の断面説明図であ
る。 1……基板、2,5……絶縁層、3,3′,9,9′……回路、4
……スルースタッド、C……触媒付け部。
The drawings are cross-sectional explanatory views of a circuit board according to an embodiment of the present invention. 1 ... Substrate, 2, 5 ... Insulating layer, 3, 3 ', 9, 9' ... Circuit, 4
…… Through stud, C …… Catalyst attachment part.

───────────────────────────────────────────────────── フロントページの続き (72)発明者 谷 俊夫 栃木県日光市清滝町500 古河電気工業株 式会社日光研究所内 (56)参考文献 特開 昭55−158697(JP,A) 特開 昭50−64767(JP,A) 特開 昭51−58667(JP,A) ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Toshio Tani 500 Kiyotakicho, Nikko City, Tochigi Prefecture Nikko Research Institute, Furukawa Electric Co., Ltd. (56) References JP 55-158697 (JP, A) JP 50 -64767 (JP, A) JP-A-51-58667 (JP, A)

Claims (4)

【特許請求の範囲】[Claims] 【請求項1】基板上に任意の方法で形成された第1層回
路上に第2層あるいはこれ以上の回路を形成して多層回
路基板を得るに際し、 (i)第1層回路の所望部に第2層回路と電気接続する
ための導電性ペーストによるスルースタッドを形成し、 (ii)次に、第1及び第2層回路を絶縁するための絶縁
性レジンによる絶縁層を上記第1層回路上に少なくとも
前記スルースタッド頂部が露出する様にして形成し、 (iii)次に、前記絶縁層表面に、形成すべき第2層回
路パターンと略同一形状にPd触媒の付着処理を施し、 (iv)しかる後、化学メッキにより所望の厚さに金属メ
ッキ層を形成して第2層回路とし、 以下必要に応じて、第3層以上の回路を上記(i)〜
(iv)の操作をくり返すことにより形成することを特徴
とする多層プリント回路基板の製造方法。
1. When a second layer or more circuits are formed on a first layer circuit formed by an arbitrary method on a substrate to obtain a multilayer circuit board, (i) a desired portion of the first layer circuit A through stud made of a conductive paste for electrically connecting to a second layer circuit is formed on the first layer, and (ii) an insulating layer made of an insulating resin for insulating the first and second layer circuits is formed on the first layer. It is formed so that at least the through stud top is exposed on the circuit. (Iii) Next, the Pd catalyst adhesion treatment is applied to the surface of the insulating layer in the same shape as the second layer circuit pattern to be formed, (Iv) Then, a metal plating layer is formed to a desired thickness by chemical plating to form a second layer circuit.
A method for manufacturing a multilayer printed circuit board, which is formed by repeating the operation of (iv).
【請求項2】上記(i)及び(ii)の工程をスクリーン
印刷法にて行う前項記載の方法。
2. The method according to the preceding paragraph, wherein the steps (i) and (ii) are performed by a screen printing method.
【請求項3】上記(iii)の工程を、全面に予めPd触媒
を付着させた後第2層回路パターン形状に表層を残して
残余部をレジストにて被覆する前(1)項記載の方法。
3. The method according to claim 1, wherein the step (iii) is performed before depositing a Pd catalyst on the entire surface and then covering the remaining portion with a resist while leaving a surface layer in the second layer circuit pattern shape. .
【請求項4】基板として金属板を用いる前(1)項記載
の方法。
4. The method according to claim 1, wherein a metal plate is used as the substrate.
JP7011685A 1985-04-04 1985-04-04 Method for manufacturing multilayer printed circuit board Expired - Lifetime JPH0671142B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7011685A JPH0671142B2 (en) 1985-04-04 1985-04-04 Method for manufacturing multilayer printed circuit board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7011685A JPH0671142B2 (en) 1985-04-04 1985-04-04 Method for manufacturing multilayer printed circuit board

Publications (2)

Publication Number Publication Date
JPS61229390A JPS61229390A (en) 1986-10-13
JPH0671142B2 true JPH0671142B2 (en) 1994-09-07

Family

ID=13422254

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7011685A Expired - Lifetime JPH0671142B2 (en) 1985-04-04 1985-04-04 Method for manufacturing multilayer printed circuit board

Country Status (1)

Country Link
JP (1) JPH0671142B2 (en)

Also Published As

Publication number Publication date
JPS61229390A (en) 1986-10-13

Similar Documents

Publication Publication Date Title
EP0247575B1 (en) Multilayer printed wiring board and method for producing the same
US4735676A (en) Method for forming electric circuits on a base board
JPS63229897A (en) Manufacture of rigid type multilayer printed circuit board
KR900003158B1 (en) Method for producing electric circuits an a base board
JP3345961B2 (en) Low-temperature diffusion bonding method of copper or copper alloy and method of manufacturing conductive paste and multilayer wiring board using the same
JPH11163525A (en) Manufacture of multilayer wiring board
JPH0671142B2 (en) Method for manufacturing multilayer printed circuit board
JPH11251751A (en) Wiring board and its production
JPH08148782A (en) Metal core circuit board
JPH10340625A (en) Conductive paste, its manufacture, and printed wiring board using the paste
JPH1079568A (en) Manufacturing method of printed circuit board
JPS61224398A (en) Manufacture of multilayer printed circuit board
JPS61224397A (en) Manufacture of multilayer circuit board
JPS622591A (en) Manufacture of metal base hybrid integrated circuit board
JPH0724335B2 (en) Manufacturing method of multilayer circuit board
JPH0353796B2 (en)
JPH0646672B2 (en) Circuit board manufacturing method
JPS63138795A (en) Manufacture of printed wiring board
JP2614778B2 (en) Manufacturing method of ceramic multilayer circuit board
JPS63186495A (en) Manufacture of circuit board
JPS5933923B2 (en) Conductor composition for resistance wiring board
JPS61121389A (en) Ceramic wiring board
JP2018037447A (en) Method for manufacturing ceramic wiring board
JPS61216392A (en) Manufacture of multilayer circuit board
JPH07254773A (en) Electronic part packaging method