JPH0669966A - Low voltage modem lsi - Google Patents

Abstract

PURPOSE:To increase a transmission reception level of an analog signal by providing a charge pump circuit boosting an applied voltage to the low voltage MODEM LSI and applying the boosted voltage to an analog interface circuit to the LSI. CONSTITUTION:A charge pump circuit CP boosts a highest power supply voltage 11 applied to an LSI 10 and applies the boosted voltage to an analog interface circuit formed in the LSI 10 such as a transmission buffer amplifier TA1, a reception buffer amplifier RA1 and an inverting output amplifier IA1. Furthermore, concretely the charge pump circuit CP produces the boosted voltage to a storage capacitor CX2 by transferring the charge stored in a transfer capacitor CX1 connected directly to the charge pump circuit CP from the outside of the LSI chip to the storage capacitor CX2 provided at the outside of the LSI 10 according to a clock 15 applies to the inside of the LSI 10.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a low voltage modem LSI in which various circuits required as a modem are integrated on one chip and operate at a voltage lower than + 5V.

[0002]

2. Description of the Related Art In order to make a modem device monolithic, high speed and low voltage have been achieved with the progress of fine processing technology. 2 and 3 show the configuration of a conventional modem LSI in which a modem device is monolithic.

The modem LSI shown in FIG. 2 was previously developed by the inventor of the present application and is disclosed in the following Document 1.

Reference 1; IEEE JOURNAL OF SOLID-STATE CI
RCUITS, VOL.SC-19, No.6, DECEMBER 1984,
“A Single Chip FSK Modem”, KAZUSHIGEYAMAMOTO, et
al In FIG. 2, reference numeral 20 is a monolithic modem L.
SI, 21 is the maximum power supply voltage supplied to the digital circuit inside the LSI 20, 22 is transmission digital data input, 23 is reception digital data output, and 24 is LSI2.
Minimum power supply voltage supplied to all circuits in 0, 25 is L
The maximum power supply voltage supplied to the analog circuit in SI20 and the external circuit, L2 is a line.

The LSI 20 includes a modulator MOD2, a demodulator DEM2, a transmission filter TF2 and a reception filter RF.
2, transmission buffer amplifier TA2, reception buffer amplifier R
Circuits such as A2 are integrated.

In FIG. 2, reference symbol TAE is a transmission external level adjusting buffer amplifier, and RAE is a receiving external level adjusting buffer amplifier. These amplifiers TAE and RAE, together with a terminating resistor R for line impedance matching and a line transformer T with a winding ratio of 1: 1,
It constitutes a 4-wire / 2-wire conversion hybrid circuit.

The highest power supply voltage 21 is + 5V, the lowest power supply voltage 24 is the ground potential, and the highest power supply voltage 25 is + 12V. That is, the modem LSI 20 of FIG.
It operates using two 2V power supplies.

As shown in the figure, the filters TF2 and RF2 inside the LSI 20 and the external buffer amplifier TAE,
Each RAE is a buffer amplifier TA of the LSI 20.
2, RA2 and the power supply voltage are common, and matching is achieved.

The transmission output level of the transmission buffer amplifier TA2 is +6.0 dBm (0 dBm = 0.774 Vrm).
s 600Ω conversion), and the peak voltage is 4.35V _P-
An analog carrier signal of _P amplitude is transmitted. The reception input level in the reception buffer amplifier RA2 is also the same as in the case of transmission.

The digital data input / output unit (modulator MOD2 and demodulator DEM2) of the LSI 20 has a conventional T
It follows the TL interface.

As will be understood from the above description, the modem LSI 20 shown in FIG. 2 is a mixed type LSI having an analog circuit and a digital circuit as a circuit configuration, but mainly has an analog signal processing. .

In the modem, the dynamic range of the signal to be processed or the signal-to-noise ratio is an important factor that determines the performance, and in the modem LSI mainly shown in FIG. Is advantageous in that a larger transmission / reception level can be obtained, and for that reason, in addition to the + 5V power supply for digital, a + 12V power supply for analog is used.

However, the use of two types of power supplies having different output voltages poses a serious problem in making the modem compact and saving power. Therefore, it has been studied to switch the circuit integrated in the modem LSI to a digital circuit as a main component so as to unify the power supply and reduce the voltage.

The modem LSI shown in FIG. 3 was developed with the aim of unifying the power supply and reducing the voltage.
It is disclosed in the following Documents 2 and 3.

Reference 2; IEEE JOURNAL OF SOLID-STATE CI
RCUITS, VOL.25, No.3, JUNE1990, “A Singl
e Chip 5V 2400b / s Modem "STEPHEN D.LEVY, et al Document 3: Japanese Patent Laid-Open No. 63-187842 In FIG. 3, reference numeral 30 is a monolithic modem L.
SI, 31 is the maximum power supply voltage supplied to all the circuits inside the LSI 20, 32 is a transmission digital data input, 33
Is a received digital data output, 34 is a minimum power supply voltage supplied to all circuits in the LSI 20, and L3 is a line.

The LSI 30 includes a modulator MOD3, a demodulator DEM3, a transmission filter TF3, and a reception filter RF.
3, transmission buffer amplifier TA3, reception buffer amplifier R
A3, inverted output amplifier IA of transmission buffer amplifier TA3
Circuits such as 3 are integrated. Maximum power supply voltage 3 mentioned above
1 is +5 V, and the lowest power supply voltage 34 is the ground potential.

The modem LSI 30 shown in FIG. 3 is also an LSI in which analog circuits and digital circuits are mixed, and the digital data input / output unit (modulator MOD3 and demodulator DEM3) follows the conventional TTL interface. In many respects, there are many points in common with the one shown in FIG.

However, the modem LSI 30 shown in FIG.
Is that the maximum power supply voltage is common to both the digital circuit and the analog circuit and is unified to +5 V, and the inverting amplifier IA3 is equipped, and the buffer amplifiers TA3 and RA3 equipped in the modem LSI 30 are 4-wire 2-wire. It is significantly different from that shown in FIG. 2 in that it is also used as an amplifier section of a conversion hybrid circuit.

That is, in the modem LSI 30 shown in FIG. 3, the driving capability of the buffer amplifier TA3 and the like in the chip is improved by the inverting output amplifier IA3, and the buffer amplifiers TA3 and RA3 in the chip are connected to the terminal resistors for line impedance matching. Line transformer T with R and winding ratio of 1: 1
Together, they form a 4-wire / 2-wire conversion hybrid circuit.

Therefore, the buffer amplifier TA3
RA3 has a level adjusting function, and the transmission output level by the transmission buffer amplifier TA3 is +3.0 dBm (60
(OΩ conversion), and an analog carrier signal with an amplitude of 3.09 V _PP is transmitted at the peak voltage.

[0021]

In the modem LSI 30 shown in FIG. 3 described above, the ratio of the analog circuit amount and the digital circuit amount in the chip is reversed as compared with the modem LSI 20, and the digital circuit is in the LSI. As a result, it has become possible to reduce the voltage of the modem LSI and to unify the power supply.

However, since the signals handled on the 4-wire / 2-wire conversion hybrid circuit side are analog signals, buffer amplifiers TA3, RA for analog signals are provided in the chip.
The equipment of 3 is indispensable.

Recently, development of a portable data transmission device has been sought after, and research and development of a battery-powered modem LSI has been actively conducted. In this situation, +5
It is also necessary to further reduce the voltage of the modem LSI 30 of FIG. 3 driven by a single V power supply, and to develop a modem LSI or the like that can be operated with a power supply voltage of +3 V or less.

Due to the progress of fine processing technology, it is easy to realize 3V in the digital circuit portion of the modem LSI mainly for digital signal processing. However, in the analog interface circuit section such as the buffer amplifiers TA3 and RA3 to which analog signals are input, when lowering the voltage,
Matching the sendable signal level and the receivable signal level of the analog signal with the conventional specifications (specifications at the time of 5V or 12V power supply voltage) must also be considered, and in that respect, various problems remain.

For example, the transmission level of the DTMF signal (push button type dial call signal) necessary for connecting to the public line network, etc., is stipulated in the existing switching network, and the level is high in accordance with it. It is necessary to secure the output signal level, but it is very difficult to secure such a high output signal level while lowering the voltage.

As the specific contents of the above-mentioned level regulation, for example, as described in the above-mentioned Documents 1 and 2, the DTMF signal reception power at the switching center is in the case of a low group frequency ( -16.5 + 0.8L) dBm or more and (-6.5 + 0.8L) dBm or less, and -3.5dBm
It is said that In the case of high group frequency, (-1
Above 6.0 + L) dBm below (-6.5 + L) dBm,
In addition, it is specified as less than -2.5 dBm.

In consideration of these conditions, the power of the low group / high group of the real line is generally selected to be -9.0 dBm for the low group and -7.0 dBm for the high group. At this time, the power P on the line side (L3 in the case of FIG. 3) is expressed by the following equation (1).

[0028]

[Equation 1] If this is converted into a voltage peak value, it is expressed as √2 of the average power, and from the above formula (1), −4.87 + 3.
= -1.87 dBm.

The transmission loss when transmitting from the primary side to the secondary side of the line transformer T is usually about 2 to 3 dB. Considering this, the peak voltage level on the primary side of the line transformer T is considered. Is about +0.13 to +1.13 dBm. And 6dB of voltage level due to terminating resistor R
Even when offsetting the decrease in the output voltage with a device using a circuit configuration that differentially drives the line transformer T (for example, as shown in FIG. 3, combining the inverting output amplifier IA3 with the buffer amplifiers TA3 and RA3), the buffer amplifier TA
3. The peak voltage at RA3 is 2.45V
_PP (1.13 dBm) is required.

This reduces the transmission loss of the line transformer T to 2
It is an estimate when it is set to ~ 3 dB, and actually the line L3
It should be noted that if the terminating impedance on the side deviates from the ideal of 600Ω, it is quite possible that the transmission loss becomes larger.

The above-mentioned peak voltage of 2.45 V _PP has a drive amplitude voltage margin of 0.5 with respect to the range of the power supply voltage of 3 V.
There is only 5V. This enables a large amplitude drive of the output drive circuit that constitutes the output stage of the transmission buffer amplifier TA3.
Even a push / pull type output circuit will result in an increase in power consumption due to a large area output drive transistor and the accompanying large bias current. Further, as described above, when the transmission loss in the line transformer T increases due to the fluctuation of the terminal impedance of the line, the threshold voltage for turning on the output drive transistor cannot be secured.

On the other hand, in the reception buffer amplifier RA3, the maximum input signal level from the line secondary side is 0 dBm (2.
19V _PP ), the drive amplitude voltage margin with respect to the power supply voltage is only 3−2.19 = 0.81V, and considering that a differential circuit generally requires series connection of at least three transistors. It is practically impossible to secure a voltage enough to turn on the differential circuit as the in-phase signal input range.

Therefore, in order to realize a low voltage modem LSI for a portable data transmission device which operates with a low voltage power source such as 3V, a buffer for transmitting and receiving analog signals in order to raise the transmission and reception level of the analog signals. Improvements around the amplifier circuit have become an indispensable requirement, and have been a future issue.

The present invention has been made in view of the above circumstances. For example, it can be operated by a single low voltage power supply of + 3V or the like, and at the same time, the transmission / reception level of an analog signal can be increased and the portable terminal can be carried. It is an object of the present invention to provide an optimum low voltage modem LSI for a data transmission device of the type.

[0035]

A low-voltage modem LSI according to the present invention integrates various circuits necessary for a modem, such as a modulator / demodulator, a transmission / reception filter, and an analog interface circuit serving as an analog signal input / output unit, on one chip. And +
It is operated at a voltage lower than 5V. Specifically, it is characterized by being equipped with a charge pump circuit that boosts the supply voltage to the low-voltage modem LSI and supplies it to the analog interface circuit.

[0036]

In the low voltage modem LSI according to the present invention, for example, even if the maximum power supply voltage supplied to the LSI itself is a low voltage such as + 3V, the transmission buffer amplifier, the reception buffer amplifier and the inverting output amplifier on the LSI are provided. The analog interface circuit such as can be supplied with high voltage current boosted by the charge pump circuit,
It is possible to secure a large analog output voltage amplitude in the analog interface circuit without using a separate external power source or the like, and it is possible to increase the transmission / reception level of the analog signal.

Therefore, it is possible to operate with a single low-voltage power supply, and at the same time, it is possible to increase the transmission / reception level of an analog signal, and it is possible to realize a portable data transmission device.

[0038]

1 shows an embodiment of a low voltage modem LSI according to the present invention. In FIG. 1, reference numeral 10 is a monolithic modem LSI, and 11 is the LSI 10.
Is the highest power supply voltage (low voltage current source), 12 is the transmission digital data input, 13 is the reception digital data output, 14 is the lowest power supply voltage supplied to the LSI 10,
L1 is a line.

The LSI 10 includes a modulator MOD1, a demodulator DEM1, a transmission filter TF1 and a reception filter RF.
1, transmission buffer amplifier TA1, reception buffer amplifier R
A1, inverting output amplifier IA of transmission buffer amplifier TA1
1, the highest power supply voltage 11 supplied to the LSI 10
A circuit such as a charge pump circuit CP for boosting the voltage is integrated. The highest power supply voltage 11 is + 3V, and the lowest power supply voltage 14 is the ground potential.

The modem LSI 10 shown in FIG. 1 is an LSI of a mixed type of an analog circuit and a digital circuit, but is mainly composed of a digital circuit and has a digital data input / output section (modulator MOD1 or demodulator). DEM1)
Is following the conventional TTL interface,
In addition, the power supply to the LSI 10 is unified, and further, the inverting amplifier IA1 is provided, and the transmission buffer amplifier TA1 and the reception buffer amplifier RA1 are provided with a level adjusting function. RA1 constitutes a 4-wire / 2-wire conversion hybrid circuit in cooperation with a terminating resistor R for line impedance matching externally connected to the chip and a line transformer T having a winding ratio of 1: 1. However, there are many points in common with those shown in FIG.

However, the modem LSI 10 shown in FIG.
Indicates that the maximum power supply voltage 11 supplied to the LSI 10 is + 3V
3 is different from that shown in FIG. 3 in that the charge pump circuit CP is installed. The charge pump circuit CP boosts the highest power supply voltage 11 supplied to the LSI 10 to generate the LS of the transmission buffer amplifier TA1, the reception buffer amplifier RA1, and the inverting output amplifier IA1.
It supplies to the analog interface circuit built on I10. Specifically, the charge pump circuit CP is supplied from the outside of the LSI chip according to the clock 15 supplied to the inside of the LSI 10.
This is a so-called bucket relay type in which the boosted voltage is generated in the storage capacitor CX2 by transferring the charge stored in the transfer capacitor CX1 directly connected to P to the storage capacitor CX2 provided outside the LSI 10. In FIG. 1, reference numerals 41 and 42 are both electrodes of the transfer capacitor CX1 directly connected to the charge pump circuit CP, and 43 and 44 are both electrodes of the storage capacitor CX2. One electrode 43 of the storage capacitor CX2 is
The charge pump circuit CP and the transmission buffer amplifier TA1, the reception buffer amplifier RA1, the inverting output amplifier IA1 and the like are connected to the power feeding paths, and the other electrode 44 is grounded. Therefore, the boosted voltage generated by the charge pump circuit CP is generated in the one electrode 43 of the storage capacitor CX2, whereby a current lower than the maximum power supply voltage 11 is transmitted to the transmission buffer amplifier TA1, the reception buffer amplifier RA1, and the inverted output. It will be supplied to the amplifier IA1 and the like. The minimum power supply voltage (ground voltage) 17 in the transmission buffer amplifier TA1, the reception buffer amplifier RA1, and the inverting output amplifier IA1 is the charge pump circuit CP.
Connected back to.

FIG. 4 shows the structure of the above-described charge pump circuit CP more specifically. Reference numerals 51, 52 and 53 in the figure are input / output terminals for connecting the transfer capacitor CX1 and the storage capacitor CX2 to the LSI 10, and S1 to S4 are capacitors CX1 and CX1, respectively.
Reference numeral 40 is a transistor switch for operating transfer of charges between CX2, and 40 is a switch control logic circuit for controlling opening / closing of each of the transistor switches S1 to S4 described above based on the clock 15 in the LSI 10. Here, the transistor switch S1 is for opening and closing the connection between the input / output terminal 51 to which one electrode 41 of the transfer capacitor CX1 is connected and the maximum power supply voltage 11, and the transistor switch S2 is for the other electrode of the transfer capacitor CX1. 42
Is used to open and close the connection between the input / output terminal 52 connected to and the highest power supply voltage 11, and the transistor switch S3 connects between the input / output terminal 52 connected to the other electrode 42 of the transfer capacitor CX1 and the ground 17. The connection is opened and closed, and the transistor switch S4 is a storage capacitor CX.
The connection between the input / output terminal 53 and the input / output terminal 51, to which one of the two electrodes 43 is connected, is opened / closed.

That is, the charge pump circuit CP has an input / output terminal 51 for connecting the capacitors CX1 and CX2,
Transistor switches S1 to S4 for switching the connection relationship between the power supply path 52, 53 and the power supply path of the highest power supply voltage 11 and the above-mentioned input / output terminals 51, 52, 53, and opening / closing of these transistor switches S1 to S4. And a switch control logic circuit 40 for controlling the operation. In FIG. 4, reference numeral 45 is a control signal for controlling the opening / closing of the transistor switch S1, 46 is a control signal for controlling the opening / closing of the transistor switch S2, and 47 is a control signal.
Is a control signal for controlling the opening / closing of the transistor switch S3, 48 is a control signal for controlling the opening / closing of the transistor switch S4, and 50 is the transmission buffer amplifier TA1 and the reception buffer amplifier RA1 and the inverted output of the boosted voltage stored in the storage capacitor CX2. It is a supply path for supplying the amplifier IA1.

Next, based on FIG. 4, the voltage boosted by the charge pump circuit CP is applied to the transmission buffer amplifier TA.
1 and the operation of supplying to the reception buffer amplifier RA1 and the inverting output amplifier IA1 will be described.

First, the switch control logic circuit 40 sets the transistor switches S2 and S4 in the open state and sets the transistor switches S1 and S3 in the conductive state. Then, the maximum power supply voltage 11 via the input / output terminal 51
At the same time that positive charges flow and are accumulated in one electrode 41 of the transfer capacitor CX1, negative charges corresponding to the positive charges accumulated in this electrode 41 are transferred from the ground 17 through the input / output terminal 52. The other electrode 42 of the capacitor CX1
Accumulated in.

Next, the switch control logic circuit 40 opens the transistor switches S1 and S3,
The transfer capacitor CX1 is brought into a state of accumulating a predetermined amount of charges. At this time, when the transfer capacitor CX1 is viewed from the input / output terminal 52, the maximum power supply voltage 11 is applied to the input / output terminal 51.
There will be a positive potential V _DD of the same magnitude as.

Next, the switch control logic circuit 40 makes the transistor switches S2 and S4 conductive.
Then, the low potential electrode 42 of the transfer capacitor CX1 is connected to the highest power supply voltage 11 via the transistor switch S2, and the high potential electrode 41 of the transfer capacitor CX1 is connected to one of the storage capacitors CX2 via the transistor switch S4. It is in a state of being connected to the electrode 43.

The other electrode 44 of the storage capacitor CX2 is normally grounded, and according to the principle of charge redistribution, if the capacitance value of the transfer capacitor CX1 and the storage capacitor CX2 are equal, the reallocation is performed. Due to the generated charges, a potential having a magnitude of V _DD + V _DD / 2, that is, a potential 1.5 times the maximum power supply voltage 11 appears at the first electrode 43 of the storage capacitor CX2 for the first time. The above series of operations (that is, the switches S1 to S4)
By the open / close control, the charge is first stored in the transfer capacitor CX1 and then the charge stored in the transfer capacitor CX1 is transferred to the storage capacitor CX2).
The potential accumulated on the one electrode 43 of 2 approaches exponentially to 2V _DD .

Then, the transistor switch S2
The control operation of the conduction time by S4 can be regarded as equivalent to the operation of multiplying the charge redistribution coefficient, and by controlling the conduction time by the transistor switches S2, S4, the potential appearing on the one electrode 43 of the storage capacitor CX2 can be controlled. , it is possible to control to any value in the range of V _DD 2V _DD. Then, in this way, the storage capacitor CX
By feeding the boosted voltage accumulated in the second electrode 43 to the transmission buffer amplifier TA1, the reception buffer amplifier RA1, and the inverting output amplifier IA1, the transmission buffer amplifier TA1 and the reception buffer amplifier RA1 that handle analog signals and the inverting output are handled. Amplifier IA1 etc.
For example, it is possible to drive at a high voltage such as + 5V without the need for another external power source.

That is, the low voltage modem LSI 10 of the embodiment.
Then, for example, even if the maximum power supply voltage 11 supplied to the LSI 10 itself is a low voltage such as +3 V, the transmission buffer amplifier TA1 and the reception buffer amplifier R on the LSI 10 are
The analog interface circuits such as A1 and the inverting output amplifier IA1 can be supplied with the high-voltage current boosted by the charge pump circuit CP, and the analog output voltage amplitude in the analog interface circuit can be increased without using another external power source or the like. It is possible to secure a large value, and it is possible to increase the transmission / reception level of analog signals. Therefore, it is possible to operate with a single low-voltage power supply, and at the same time, it is possible to increase the transmission / reception level of an analog signal, and it is possible to realize a portable data transmission device.

[0051]

In the low voltage modem LSI according to the present invention,
For example, the maximum power supply voltage supplied to the LSI itself is + 3V
Even if the voltage is low, the analog interface circuits such as the transmission buffer amplifier, the reception buffer amplifier, and the inverting output amplifier on the LSI can be supplied with the high voltage current boosted by the charge pump circuit. It is possible to secure a large analog output voltage amplitude in the analog interface circuit without using an external power source or the like, and it is possible to increase the transmission / reception level of analog signals.

Therefore, it is possible to operate with a single low-voltage power supply, and at the same time, it is possible to increase the transmission / reception level of an analog signal, and it is possible to realize a portable data transmission device.

[Brief description of drawings]

FIG. 1 is a configuration diagram of an embodiment of the present invention.

FIG. 2 is a configuration diagram of a conventional low voltage modem LSI.

FIG. 3 is a configuration diagram of a conventional low voltage modem LSI.

FIG. 4 is a detailed view of an essential part of an embodiment of the present invention.

[Explanation of symbols]

 10 Low voltage modem LSI MOD1 Modulator DEM1 Demodulator TF1 Transmission filter RF1 Reception filter TA1 Transmission buffer amplifier RA1 Reception buffer amplifier IA1 Inversion output amplifier CP Charge pump circuit CX1 Transfer capacitor CX2 Storage capacitor 40 Switch control logic circuit S1, S2, S3 S4 Transistor switch 51, 52, 53 Input / output terminal

Claims (1)

[Claims] 1. A variety of circuits required for a modem such as a modulator / demodulator, a transmission / reception filter, and an analog interface circuit that serves as an input / output unit of analog signals are integrated on one chip, and
A low-voltage modem LSI operating at a voltage lower than 5 V, characterized by being equipped with a charge pump circuit for stepping up a supply voltage to the low-voltage modem LSI and supplying the boosted voltage to the analog interface circuit. Modem LS
I.