JPH066624Y2 - High frequency switch - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial application] The present invention relates to a high-frequency switch for opening and closing a high-frequency signal. In particular, the present invention relates to an improvement of a switch drive circuit that controls the gate of a field effect transistor (hereinafter referred to as FET) that constitutes a high frequency switch to open and close a high frequency signal at high speed.

[Conventional technology]

In recent years, in the field of satellite communication, a switch matrix has been installed on an artificial satellite to implement satellite switching time division multiple access communication (Satell
ite Switched Time Division Mal-tiple Access, SS-TDM
A) has been put to practical use.

The switch matrix is configured by arranging a large number of switches and switch driving circuits, and the number of switches in the "off" state is larger than that in the "on" state during normal operation. Therefore, each switch and the switch driving circuit are required to have a short switching time and at the same time consume a small amount of power, especially the power consumption of the switch driving circuit in the "OFF" state.

FIG. 3 is a circuit diagram of a conventional high frequency switch. Third
As shown in the figure, in the switch drive circuit 400 of the conventional example, the resistors 111 and 112 of the resistor voltage divider circuit 110 for generating the gate bias voltage for turning off the switch 200 and the NPN in which the emitter 141 is connected to the negative power source are connected. Transistor 140 collector 1
42 and 42 are connected in series.

[Problems to be solved by the invention]

However, in this conventional configuration, switch 200 is "on".
The time required to switch from the OFF state to the "OFF" state (hereinafter referred to as the turn-off time) is short, but the time required to switch from the "OFF" state to the "ON" state (hereinafter referred to as the turn-ON time) is long. was there. That is, when the switch 200 is turned off, the transistor 140 reaches the saturation region at high speed, and the collector 142 of the transistor 140
Since the impedance between the emitter and the emitter 141 is low, the falling time constant of the gate bias voltage is small. However, at the time of turn-on, the transistor 140 is cut off, and the accumulated charge of the collector-emitter capacitance 144 of the transistor 140 is discharged via the resistors 111 and 112 in series, and at the same time, the second gate bypass of the FET 210 is passed via the resistor 111. Since the accumulated charge of the capacitor 241 is discharged, the rise time constant of the gate bias voltage is large and the turn-on time is long. In order to reduce the turn-on time to the required value or less, it is necessary to reduce the resistance value of the resistors 111 and 112 and reduce the time constant. In that case, the switch drive circuit when the switch 200 is “off”, that is, when the transistor 140 is saturated. There was a drawback that the power consumption of 400 increased.

The present invention solves the above drawbacks, and an object of the present invention is to provide a high-frequency switch in which the switching drive circuit in the switch "off" state consumes less power while maintaining the same switching time as the conventional high-frequency switch. .

[Means for solving problems]

The present invention comprises a switch for opening and closing a high frequency signal, and a switch drive circuit for controlling the switch, wherein the switch is composed of a field effect transistor which is controlled to open and close by a control voltage applied to the gate of the high frequency signal,
The switch drive circuit is a high frequency switch including a transistor for providing an input switch control signal to a base, wherein the switch drive circuit has one end grounded, the other end connected to a negative power source, and a voltage dividing point which is the electric field. A resistor-divider circuit connected to the gate of the effect transistor, wherein the collector-emitter circuit is configured to apply the negative collector-emitter saturation voltage to the voltage dividing point when the transistor is in a saturated state. It is characterized in that it is connected in parallel to the ground side resistance of the voltage dividing point of.

[Action]

The present invention uses a negative collector-emitter saturation voltage as a voltage dividing point in a saturation state in the ground side resistance of a voltage dividing point of a resistance voltage dividing circuit in which one end is grounded and the other end is connected to a negative power source. Connect the collector-emitter circuit of the transistor in parallel to give the voltage dividing point and the field effect transistor "on"
Connect to the gate that turns off. Input a switch control signal to the base of the transistor to put it in a saturated or cut-off state, and set the voltage at the voltage dividing point to the negative collector-emitter saturation voltage or the voltage divided by the resistor voltage dividing circuit to make the field effect transistor. Put it in the "on" or "off" state. In the circuit of the present invention, when the transistor (140) in the switch driving circuit is in the saturated state (on), the field effect transistor (210) is in the on state, and when the transistor (140) is in the cutoff state (off). The field effect transistor (210) is turned off. When the switch turns off, the collector-emitter capacitance of the transistor and the accumulated charge of the gate bypass capacitor of the field effect transistor are discharged to ground and the negative power supply through all the resistors of the resistance voltage divider circuit in parallel, and the turn-off time is reduced. Can be shortened. Further, at the time of turn-on, the transistor changes to a saturated state in a short time, and the impedance between the collector and the emitter of the transistor becomes small. Therefore, the turn-on time can be made shorter than the turn-off time.

The turn-on time is much shorter than the turn-off time, so the problem is the turn-off time, and
As described above, in the matrix switch, since the number of switches in the off state is overwhelmingly larger than the number of switches in the on state, the problem is power consumption in the off state.

As described above, the turn-off time of the circuit of the present invention can be made shorter than that of the conventional circuit. Since the switching time which is shorter than the time is equal to the turn-on time), the circuit of the present invention can set the resistance value of the resistance voltage dividing circuit (110) higher than that of the conventional circuit. it can. As a result, the current flowing through the resistance voltage dividing circuit 110 in the switch "off" state of the circuit of the present invention can be made smaller than the current flowing through the resistance voltage dividing circuit in the switch "off" state of the conventional example circuit.

Specific examples will be described in the description of Examples.

〔Example〕

 An embodiment of the present invention will be described with reference to the drawings.

FIG. 1 is a circuit diagram of a high frequency switch according to an embodiment of the present invention. Here, the feature of the present invention is a switch driving portion surrounded by a chain line. That is, one terminal of the resistance 111 and the resistance 112 of the resistance voltage dividing circuit 110 of the switch drive circuit 100 is connected at the voltage dividing point 113, the other end of the resistance 111 is grounded, and the other end of the resistance 112 is not shown. It is connected to a negative voltage supply terminal 120 which is connected to a negative power source. The voltage dividing point 113 is connected to the second gate voltage output terminal 130 and the emitter 141 of the NPN transistor 140. The collector 142 of the NPN transistor 140 is grounded, and the base 143 has a capacitor 151 and a resistor at a switch control input terminal 150 to which a switch control signal is input from outside the drawing.
When the switch control signal is at a high level, the NPN transistor 140 is in a saturated state, and when it is at a low level, it is in a cutoff state. 144 is a collector
It is the equivalent capacitance between the emitters.

The first gate 211 of the FET 210 of the switch 200 is connected via the choke coil 221 to the first gate bias voltage supply terminal 220 to which the first gate bias voltage is supplied from outside the drawing, and the first gate bias voltage supply terminal 220 is , And grounded via a capacitor 222. The first gate 211 is connected via a capacitor 231 to a high frequency signal input terminal 230 to which a high frequency signal is input from outside the drawing. The second gate 212 of the FET 210 is connected to the second gate bias voltage input terminal 240 connected to the second gate bias voltage output terminal 130 of the switch driving circuit 100, and is also grounded via the second gate bypass capacitor 241. . When the NPN transistor 140 is in the cut-off state, the divided voltage of the resistance voltage dividing circuit 110 is given to the second gate 212, and the FET 210 is turned off. When the NPN transistor 140 is saturated, NP
The negative collector-emitter saturation voltage of the N-transistor is applied to the second gate 212, and the FET 210 is turned on. The source 213 of the FET 210 is grounded and the drain 214
Is connected via a choke coil 251 to a drain voltage supply terminal 250 to which a drain voltage is supplied from outside the drawing, and the drain voltage supply terminal 250 is grounded via a capacitor 252. When the NPN transistor 140 is in a saturated state, the high frequency signal is connected from the drain 214 to the high frequency signal output terminal 260 via the capacitor 261 and the high frequency signal is output from the high frequency signal output terminal 260 to the outside of the figure.

Here, the operation of the high frequency switch of the present invention will be described. In FIG. 1, the switch control signal is passed through a parallel circuit of a capacitor 151 and a resistor 152, which is a speed-up circuit, so as to shorten the time when the NPN transistor 140 changes from a saturated state to a cutoff state (or vice versa). NP
It is input to the base 143 of the N-transistor 140.

Transistor 140 when switch control signal is high
Is saturated, and the second gate 212 of the FET 210 (the gate that controls the “on” and “off” states of the switch 200) has 0-V _CESat ≈ −0.2 V V _CESat ; the collector-emitter saturation voltage of the transistor 140 is When applied, switch 200 is in the "on" state. NPN transistor 14 when switch control signal is low level
When 0 is cut off, the voltage generated at the voltage dividing point 113 of the resistance voltage dividing circuit 110, that is, the FET 210, is applied to the second gate 212 of the FET 210.
A voltage lower than the pinch-off voltage of the switch is applied to the second gate 212 of the FET 210, causing the switch 200 to be in the "off" state.

When the switch 200 is turned off, the NPN transistor 1
The accumulated charge between the collector-emitter capacitance 144 of 40 and the second gate bypass capacitor 241 of the FET 210 is the resistance 111, 1
The turn-off time is proportional to the parallel combined resistance value of the resistors 111 and 112 in order to discharge 12 to the ground and the negative power source (-V) via the parallel. On the other hand, the switching time, which is a problem in the conventional circuit, that is, the turn-off time is the resistance 1
It is almost proportional to the series combined resistance value of 11 and 112.

Therefore, if the resistors 111 and 112 of this embodiment have the same values as those of the conventional circuit, the turn-off time is improved to about 1/4 of the switching time of the conventional circuit. More specifically, the resistance values of the resistors 111 and 112 are R1 and R1, respectively.
Assuming R2, the parallel combined resistance value in this embodiment is R1.
R2 / (R1 + R2), while the series combined resistance value in the case of the conventional example is (R1 + R2). These ratios are R1 ・ R
2 / (R1 + R2) .multidot. (R1 + R2), and assuming that the resistance values R1 and R2 are substantially equal to each other, this ratio becomes 1/4, and the switching time of this embodiment is about 1 in comparison with the circuit of the conventional example. /
It turns out to be 4.

When the switch 200 is turned on, the NPN transistor 1
40 rapidly changes from shutoff to saturation,
The turn-on time is even shorter than the turn-off time due to the lower impedance between the emitters.

The current consumption of the high frequency switch when the switch 200 is “off” is inversely proportional to the series combined resistance value of the resistors 111 and 112. From the above, assuming that the switching time of the high-frequency switch of this embodiment is equivalent to that of the conventional circuit, the resistance 1
The resistance values of 11, 112 can be made about four times as large as that of the conventional circuit. As a result, the current of the resistance voltage divider circuit in the switch “OFF” state of this embodiment can be reduced to about 1/4 of that of the conventional circuit.

FIG. 2 is a circuit diagram of a high frequency switch according to another embodiment of the present invention. As described above, the case where the switch is an amplification type dual gate field effect transistor as shown in FIG. 1 has been described, but the same can be realized in the case of the non-amplification type field effect transistor shown in FIG.

Further, in the above description, the conductivity type of the transistor and the field effect transistor of the switch drive circuit are opposite conductivity types,
By setting the positive and negative polarities of the power source to the opposite polarities, it is possible to achieve the same in the same way by using a transistor of another conductivity type.

[Effect of device]

As described above, according to the present invention, the resistance value of the resistance voltage divider circuit that generates the second gate bias voltage for switching the switch to the “off” state within the range in which the switch switching time satisfies the required value is compared with the conventional one. Therefore, there is an advantage that the power consumption of the switch driving circuit, particularly the power consumption when the switch is “OFF” can be reduced. further,
The high level output of the switch drive circuit is the switch "on"
A stable level is required to determine the gain of the state, but in the circuit of the present invention, since it is supplied from the saturation voltage (-V _CEsat ) of the transistor, a sufficiently stable output can be obtained. is there.

[Brief description of drawings]

FIG. 1 is a circuit diagram of a high frequency switch according to an embodiment of the present invention. FIG. 2 is a circuit diagram of a high frequency switch according to another embodiment of the present invention. FIG. 3 is a circuit diagram of a conventional high frequency switch. 100, 400 ... Switch drive circuit, 110 ... Resistance voltage divider circuit, 111,
112, 152 ... Resistance, 113 ... Voltage dividing point, 120 ... Negative voltage supply terminal, 1
30 ... Second gate bias voltage output terminal, 140 ... NPN transistor, 141 ... Emitter, 142 ... Collector, 143 ... Base, 144 ... Collector-emitter equivalent capacitance, 150 ... High frequency signal input terminal, 151, 222, 231, 252 , 261, 332 ... Capacitor, 200, 300 ... Switch, 210 ... Dual gate field effect transistor (FET), 211 ... First gate, 212 ... Second gate, 213, 311 ... Source, 214, 312 ... Drain, 220 ...
First gate bias voltage supply terminal, 221, 251, 321, 331, 34
1 ... Choke coil, 230, 320 ... High frequency signal input terminal, 24
0 ... Second gate bias voltage supply terminal, 241 ... Second gate bypass capacitor, 250 ... Drain voltage supply terminal, 26
0, 340 ... High frequency signal output terminal, 310 ... Field effect transistor (FET), 313 ... Gate.

 ─────────────────────────────────────────────────── ─── Continued Front Page (72) Norio Komiyama 5-33-1 Shiba, Minato-ku, Tokyo Inside NEC Corporation (72) Toshinori Tanaka 1-2356 Takeshi, Yokosuka, Kanagawa Nippon Telegraph and Telephone Public Corporation Yokosuka Telecommunications Research Institute

Claims (1)

[Scope of utility model registration request] 1. A switch including a switch for opening and closing a high frequency signal and a switch drive circuit for controlling the switch, wherein the switch comprises a field effect transistor for controlling opening and closing of the high frequency signal by a control voltage applied to a gate. In the high-frequency switch, the switch drive circuit includes a transistor that supplies an input switch control signal to the base. In the switch drive circuit, one end is grounded, the other end is connected to a power source, and the voltage dividing point is the electric field. A resistor voltage divider circuit connected to the gate of the effect transistor is included, and the collector-emitter circuit divides the resistor voltage divider circuit so that the collector-emitter saturation voltage when the transistor is in a saturated state is applied to the voltage dividing point. A high-frequency switch characterized by being connected to a pressure point.