JPH0660047A - Multiprocessor processor - Google Patents

Abstract

PURPOSE:To decrease the frequency of communication at the time of variables access and increase the processing speed of a parallel description language processing system by arranging a copy of common variables which are only read and referred to in the local memory of a processor where parallel execution units are executed. CONSTITUTION:The multiprocessor parallel processor consists of a parallel description language compiler 6 which generates intermediate language descriptions and an intermediate language interpreters 15; a copy of common variables is previously arranged in the local memory area as to an intermediate language interpreter 15 which only reads and refers to the common variables among plural intermediate language interpreters 15 accessing the common variables and referred to. For intermediate language interpreters 15 which rewrites the common variables, on the other hand, an intermediate language interpreter 15 which holds the copy of the values of the common variables is detected simultaneously with the rewriting of an aimed common variable and a communication for rewriting even the copy of the common variables is made.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a technique for distributing a processing procedure in a source code to a plurality of processors to execute processing units in parallel and improving processing speed.

Further, in a loosely coupled multiprocessor system in which a plurality of microprocessors having different machine language instructions are coupled by communication means, a virtual machine language is set, and an interpreter for the virtual machine language and instructions for the virtual machine language are used. The present invention relates to a method for developing a target program using a compiler that generates object code.

[0003]

2. Description of the Related Art Conventionally, a means widely used for distributed processing of a target program using a plurality of personal computers and workstations connected to a local area network has been interprocess communication.

In this method, even when the processing parameters are passed between the execution units, the source program in the form of explicitly calling and executing the communication means individually is used, or the communication between the processes is more integrated. A method called remote procedure call was used.

On the other hand, there is a method of concealing the communication mechanism from the upper structure by defining a language specification that allows parallel description (hereinafter referred to as parallel description language) and using this to develop an object program. There is. In a program developed under a parallel description language, if an assignment statement to a shared variable is described, the realization structure (compiler processing system or interpreter) of the language specification communicates with the computer in which the variable entity is located. Performs the assignment process. Therefore, the program developer can develop the target program without being conscious of communication between processes, and high development efficiency and maintainability can be expected.

However, in the above-mentioned conventional method, when a plurality of types of computers having different machine language instructions are connected by communication means and desired to be used, the compiler processing system handles a plurality of machine languages when generating an execution code. There was the inconvenience of having to.

Therefore, in order to avoid this problem, an intermediate language which is a virtual machine language has been introduced. According to this conventional technique, the compiler outputs an intermediate language that does not depend on a machine language instruction of a specific processor, and each intermediate language is interpreted and executed by an intermediate language interpreter. The same thing can be said not only in the network but also in a processing system in which a plurality of processors are connected by communication means in general and distributed processing is performed.

As a conventional invention in which an intermediate language is introduced, there is, for example, JP-A-63-31934. This invention is CP
The purpose is to reduce the access frequency between U and the external memory. According to the invention, a microprocessor chip is mounted on a memory device, and a part of the calculation which has conventionally required processing by the main processor is processed on the memory device side. The purpose is to reduce access frequency.
Further, Japanese Patent Laid-Open No. 132325/1990 refers to a shared variable,
The assignment situation is classified, and the substance of the variable and the copy of the variable value are optimally placed in the local memory of each processor. The present invention is applied to a case where a description having parallelism is taken out at the time of syntax processing from a source program of a sequential description type conventional language (for example, FORTRAN) and parallelized.

[0009]

However, the above-mentioned Japanese Unexamined Patent Application Publication No.
When the conventional method of 3-31934 is used, since the assignment and reference to the shared variable are both performed with the communication between the processes, the shared variable is assumed to be executed every time by the network or other communication means. In the object program with a high access frequency, there is a problem that the effect of executing the processing units in parallel is substantially lost due to the increase in the communication processing time. This is compared to the case where communication means is explicitly described in the parallel description language program,
This is because the operation of referencing assignment to a variable involves careless access in a finer unit (several bytes, etc.).

Further, in the conventional example disclosed in Japanese Patent Laid-Open No. Hei 2-132525, the part where parallelism can be extracted in the description of the serial processing language is only the part where the guarantee that the shared variables are not simultaneously accessed between the processing units can be obtained. Absent. Therefore, if this method is immediately used in a parallel description language, there is a problem that operation guarantee cannot be obtained.

The present invention has been made by paying attention to the problems of the prior art as described above, and the purpose thereof is to:
In a multiprocessor parallel processing device that is composed of a parallel description language compiler that generates an intermediate language description and an intermediate language interpreter, the frequency of interprocess communication is restricted and the operation guarantee of parallel execution is realized to achieve high-speed parallel processing. It is to provide a multiprocessor processing device capable of performing processing.

[0012]

In order to solve such a problem, in the multiprocessor processing apparatus of the present invention, a compiler (a) for generating an object code described by a virtual machine language (hereinafter, intermediate language) And a plurality of processor units that implement an interpreter (b) that executes the intermediate language output by this compiler are a shared memory or a multiprocessor processing device connected by a communication path. ) In the processing procedure described in the source code,
Parsing processing that detects shared variables that are only read-referenced, and a-2) Table-structured data that records information on shared variables that are only read-referenced in each processing procedure that is executed in parallel. The interpreter has a means for adding to an object file consisting of an intermediate language description that is an execution code. B-1) A table structure that records the information of shared variables that are read and added only to the execution code Refer to the data,
Data communication means for arranging a copy of the shared variable in the local memory of the processor in which the processing unit is arranged, and b-2) Rewriting the shared variable for each processing unit to be executed in parallel. In the case of performing, there is an instruction word communication means for rewriting the copy of the shared variable arranged in the local memory of another processor, and when reading, the value of the shared variable placed in the local memory is referred to. And

[0013]

When reading in parallel execution, since the value of the shared variable placed in the local memory is referenced, it is not necessary to go through the communication means each time, and the frequency of communication between processors regarding shared variable access is reduced, The processing speed of the processing system is improved.

[0014]

EXAMPLES Examples will be described in the following order.

1. Description of configuration 1-1. Description of configuration example of operating environment 1-2. Explanation of target software 2. Outline of operation 2-1. Outline of processing procedure 2-2. Overview of runtime operation 3. Description of operation of each part 3-1. Refer to the table structure during compiler operation and parallel processing 3-1-1. Common points with conventional compiler operations 3-1-2. Features of operation of compiler 6 of this embodiment 3-1-3. Features of Execution of Intermediate Language of the Present Embodiment 3-2. Exclusive control and communication between IPPs 1. Description of configuration 1-1. Description of Configuration Example of Operating Environment FIG. 1 is a configuration diagram of an embodiment of the present invention. Communication path 5
The personal computers 1, 2, and 3 are connected via the. Here, the communication path 5 does not necessarily have to be a single system. As a typical communication path 5, there is a "network" which is a bidirectional communication mode having an address management mechanism.

In FIG. 1, the computer 1 becomes the request generation side and starts execution of the object program, and a part of the plurality of processing units of this object program is part of the computer 2.
Alternatively, it is executed in the process of 3. Here, a process is a unit at the time of execution of allocation of processor resources and memory resources in the operating system, and includes a process header including process identifiers and execution management, information for memory management, and a register of the current processor at the time of suspension. It is composed of an area for saving the state of, an object code area, and a stack area.

The target program to be processed is shown as a source program 4 in the figure. The source program 4 is written in a parallel description language, and includes a description regarding parallel execution in the description. As a parallel description language, in this embodiment, "cobegin" is added to the language Pascal.
Use the language specification that extends only the two words, "and coend".
In order to limit the specifications, the following restrictions are added to the processing blocks that are the target of parallel execution.

(1) The processing procedure executed in parallel is proc
Both edure and function are allowed. However, the argument is passed by value (c
only all by value) are allowed.

(2) Variables declared at the top level of the program (hierarchy of the main program) are regarded as shared variables. Only local variables and shared variables are allowed to be accessed in parallel processing procedures.

A processing procedure that does not satisfy the above conditions is "
A compound statement (compound sta surrounded by “cobegin” and “coend”)
parse does not return an error when it appears in There is no inconvenience in code generation and execution unless it is not conforming to the usual Pascal syntax rules, since only parallel execution is not performed.

The source program 4 is compiled by a compiler 6, which is an application program of the computer 1, and converted into an object code 14 that can be interpreted and executed by an intermediate language interpreter. The intermediate language interpreter is an independent process executed in each of the computers 1, 2, and 3. In the following, the process that becomes an intermediate language interpreter is IPP.
Abbreviated.

The IPPs 15, 25, 26 and 27 are developed and implemented by a compiler of a type that directly generates a machine language in each computer. Each IPP is 2
The first communication means 23 is used for the purpose of accepting the request, and the second communication means 24 is used for the purpose of issuing the request. That is,
The IPP is an interpreter that acquires the description in the intermediate language from the communication unit 23 and returns the processing result from the communication unit 23 to the request side. On the other hand, IPP itself
It connects to the PP and uses the communication means 24 to generate a request to another IPP. At this time, a request for another IPP is made with an intermediate language description. The other IPPs receive this intermediate language description by the communication means 23 and return the processing result to the request side by the communication means 23, as described above. As described above, each IPP is a symmetrical one having a completely equivalent configuration, and is different from the so-called client / server type processing.

Some high-performance operating systems include communication between processes via hardware such as a network, and FIFO (ordered memory configured so that preemptive data can be fetched first). There are some which can realize the used communication as an equivalent process. Under the control of such an operating system, IPP2
As in 6 and 27, the communication between processes may be performed via the network and the shared memory resource. In this respect, there is no difference from the conventional technique of multiple programming by interprocess communication.

The IPP is an interpreter that executes virtual machine language instructions defined according to the specifications of the intermediate language. Therefore, when viewed from an application program using the IPP, a processor in which machine language instructions of a certain specification are implemented is installed. It can be treated as if it exists. As a result, it is possible to give an application program the illusion of using a single processor environment built on a "parallel operating environment realized by communicating multiple processes".

1-2. Description of Target Software FIG. 3 shows an example of a typical “description having parallelism” in a conventional sequential processing language. The double loop consisting of'i 'and'j'of'procedurep'in list 301 can be decomposed into three independent simple loops by fixing j as in list 302. Clearly in the list 302, the processing loops for the three i's can be handled by different processors. JP-A-2
In No. 132525, after such parallelizable description parts are parallelized, they are independently processed like arrays a [i, 1], a [i, 2], a [i, 3]. Variables that can be accessed by allocating them are placed in the local memory of each processor to improve the processing speed. Since the parallelization handled by the conventional invention is related to the serial processing language as described above, even if two or more processing procedures (or subroutines) access a common variable, the processing of one procedure is performed. Among them, there was a guarantee that the value of the variable would not be changed by other processing procedures.

On the other hand, a list 303 shows a typical shared variable access example in the parallel description language handled by the present invention. The program in Listing 303 has the language Pasc
It is written in the language of the specification in which the above-mentioned predicate for parallel processing is added to al.
p1 and p2 are executed in parallel. The processing itself is a kind of producer
A variation of the consumer problem, procedures p1 and p2 access variable AA as a shared variable. In procedure 305, the procedure p2 performs a series of processes, and the result of the process is the local variable result.
If a value greater than 100 is assigned to the shared variable AA
The value 1 is assigned to. On the other hand, the procedure p1 continues the process 306 as long as the value of the variable AA is 0.

This type of problem is a problem that occurs in many application programs. As an example, in an application that includes processing for displaying graphics and characters on the display, procedure p2 reads character data and performs outline font shape generation, and in parallel with this procedure p1 processes graphics shape pixel generation. And the like. The outline font shape takes a relatively long processing time, but the pixel data of the processing result per character is small, so about 100 characters are processed continuously, and when the processing is completed, the value of the shared variable AA is changed. Conveniently it can be used to convey the end of processing to other concurrently processed procedures. The procedure p1 processes the generation of graphic pixels as long as the value of the shared variable AA is 0, and when AA = 1, performs the processing of displaying the character shape data generated by the procedure p2.

However, in such a parallel processing problem, the method disclosed in JP-A-2-132525 cannot be used. In the prior art, since the variable AA is only read-referenced in the procedure p1, the value of the variable AA at the time when p1 is called is copied and arranged in the local memory of the processor executing p1. As a result, the value of the variable AA is always 0, and the procedure p1 forms a permanent loop of the process 306.

The embodiment of the present invention solves this problem by the following processing procedure.

2. Outline of operation 2-1. Outline of Processing Procedure An outline of the operation of the language processing system of the present invention will be described below with reference to the configuration diagram of FIG. 1 and the flowchart of FIG. In the following description, the intermediate language description generated by the compiler 6 by analyzing the predicate “cobegin” is written in capital letters “COBEGIN” for the purpose of explanation. Similarly, "COEND" represents an intermediate language description generated after translation of the predicate "coend", and "NEWPROC" represents an intermediate language description inserted by the compiler 6 in the parallel execution mode. As is well known, the Pascal language allows block structures in program descriptions. Each block is a function or procedure,
These can be declared hierarchically. Here, both functions and procedures are written as processing blocks.

The processing is performed in the order of the following procedures 1 to 15.

Procedure 1: The system, which has received the request for "compilation and execution" of the target program, starts a compilation process for converting the source program 4 into an object code 14 (hereinafter abbreviated as OBJ) described in an intermediate language. The contents of the compile processing are the lexical analysis processing 7, the syntax analysis processing 8 and the code generation processing 13.

Step 2: The parsing process 8 in the compiler 6 generates an in-block name table 9 recording the arguments to the block, local variables in the block, local procedure names in the block, local function names, etc. . The purpose of creating this name table is to detect whether there is a reference to a non-local variable in a block, in addition to using it for normal code generation.

Step 3: The syntax analysis process 8 analyzes the process descriptions in the blocks one after another and calls the code generation process 13 to generate a description based on the specifications of the intermediate language. At this time, when a variable is accessed (either substituted or referenced) in the description of the source program 4, it is checked whether this variable is a local variable. In the case of non-local variables, the name table is inspected by sequentially going up the block structure hierarchy to the main program level.

Step 4: If there is a shared variable whose access is detected in step 3 (that is, a variable at the main program level), the syntactic analysis process 8 determines whether the access to the shared variable is assignment or reference and the shared variable for each block. Record in access table 10.

Step 5: The syntactic analysis process 8 records the contents of the block-by-block shared variable access table 10 in the shared variable access table 11 when the syntactic analysis proceeds to the end of the block. Further, the block-by-block shared variable access table 10 and the in-block name table 9 which have become unnecessary are discarded. further,
The relative address on the object code of each processing start position and processing end position of this block and the block name are registered in the block management table 12 (S201).

Step 6: The compiler 6, after the syntax analysis process 8 has finished analyzing all the source program descriptions, the intermediate language description generated by the code generation process 13 and the contents of the shared variable access table 11, The contents of the block management table 12 are linked and the OBJ 14 is output (S202).

Step 7: After the processing of the compiler 6 is completed, the system sends a request to the IPP 15 to start the processing of the execution stage.

Step 8: The IPP 15 reads the OBJ 14 by the communication means 23. At this time, IPP15
Is the shared variable access table 1 recorded in the OBJ 14.
1 and the contents of the block management table 12 are expanded in the work memory 16 of the IPP 15 (S203). As a result of this processing, the above-mentioned table structure is held on the IPP 15 side as the shared variable access table 30 and the block management table 31. The IPP 15 subsequently executes sequential execution until it detects the parallel execution start predicate "COBEGIN" (S204).

Step 9: When the IPB 15 detects the predicate "COBEGIN" in the intermediate language in the reading process of the OBJ 14, the individual predicates are not sequentially executed until the predicate "NEWPROC" appears, and the temporary recording for delayed execution is performed. Area 20
(Hereinafter, abbreviated as execution buffer) (S205).

Step 10: The IPP 15 uses the predicate "NEWPRO
When "C" is detected, another IPP is detected by the communication means 24.
Attempts to connect with 25 etc. (S206). If there is another IPP 25 and there is a response, the requesting IPP 15 sends O
Begin each BJ14 predicate with the above "NEWPROC",
Sequentially take out until another "NEWPROC" is detected,
The data is stored in a temporary recording area 21 (hereinafter referred to as a transfer buffer) for transfer to another IPP 25 (S207). When a call to a procedure or function (which is not a built-in procedure) is detected in the predicate, the requesting IPP 15 makes the procedure 11
And perform step 12.

Step 11: The IPP 15 searches the block management table 31 with the relative address on the object code of the start position of the procedure or function as a key (S208).
The IPP 15 extracts the value of the relative address of the end position and the block number of the block of interest from the record of the block management table 31. The IPP 15 stores the predicate of this entire block in the transfer buffer 21 (S209).

Step 12: Next, the IPP 15 searches the shared variable access table 30 from the block number, and regarding the shared variable which is only referred to in the block of interest,
The reference number of the variable, the number of bytes of space required to store this variable, and the current value of this variable are recorded in a temporary recording area 22 (hereinafter abbreviated as variable buffer) for variable evaluation (S210).

Step 13: After the steps 10 to 12 are completed, the IPP 15 transfers the contents of the variable buffer 22 to the IPP 25. Next, all the objects stored in the transfer buffer 21 are transferred to the IPP 25 (S211). The IPP 25 initializes an execution environment (activation record, hereinafter abbreviated as AR),
Start processing.

Step 14: The IPP 15 repeats Step 10 and subsequent steps until it detects the predicate "COEND" in the OBJ 14. When the predicate "COEND" is detected, the contents of the execution buffer 20 in which the predicate is recorded in step 9 are sequentially executed (S212).

Step 15: After executing the predicate until the end of the execution buffer 20, the IPP 15 sends a status request message to each of the IPPs 25 that requested parallel execution (or IPPs if another IPP was requested). Transfer (S213). Each IPP on the request receiving side finishes processing /
Returns an unfinished status code as a response. When the requesting IPP 15 returns the AR to the IPP that returned the processing end
17 is requested to be returned, and this is received (S214). All IP
Requester IP until P returns AR17 (S215)
P15 repeats the procedure 15.

In the above description, the AR (activation record) is a data structure for managing the state of the virtual processor generally used when the intermediate language interpreter is installed. In this embodiment, a data structure having the following elements is used as AR.

Value returned by function (when calling block is a function) Return address of processing Pointer to last element of name table of upper block that called this processing block Name of upper block in which this processing block is declared Pointer to last element of table-Pointer to name table in block 2-2. Outline of Run-time Operation FIG. 4 is an explanatory diagram of the operation of the processing of this embodiment that is simplified.

The processing block 401 is executed in the IPP 15, and in parallel with this, the processing block 402 is executed in the IPP 25.
Indicates that the is being executed. The two processing blocks are
Although the shared variable 403 is accessed, a copy 404 of the shared variable 403 is arranged in the IPP 25. Also, processing block 402 only makes read references to this shared variable. (This corresponds to the case of procedure p1 in list 303.) At the time of reading reference, processing block 401,
Both 402 refer to the shared variable value on the local memory.
However, in rewriting the shared variable value, the processing block 401 that rewrites the shared variable value 403 in the local memory.
Of the shared variable in the local memory of the IPP 25.

By this processing, the present embodiment guarantees updating of variable values during parallel execution. To realize the above operation, the compiler 6 reads the source program 4 and creates a block management table 12 and a shared variable access table 11 in its working memory when generating an execution code. Shared variable information for parallel execution in the IPP group is generated from the data structures of these two tables. Therefore, the two table structures are recorded in the object code 14 and read into the IPP (15 in this example). IP
The P15 generates the block management table 31 and the shared variable access table 30 on the IPP working memory based on the two table structures. As described above, processing block 402
In the case of a block that only performs read reference for a certain shared variable, the shared variable area 18 of the IPP 25 in which the processing block 402 is distributed is initialized by communication between IPPs. The processing contents of the initial setting are an operation of securing a memory area corresponding to the size of the shared variable of interest and copying the value. The copied address of this shared variable can be uniquely determined by the reference number 141 and the pointer 142 by the data structure of FIG. 14 described later. Therefore, when the processing block 401 rewrites the value of 404 which is a copy of the shared variable together with the shared variable entity 403, the value to be rewritten by communication and the reference number 141 of the shared variable to be rewritten may be specified. The data structure for communication used in this processing will be described later with reference to FIG. The method of realizing each of the other parts is also described in the following sections.

3. Description of operation of each part 3-1. Compiler operation and table structure reference at the time of parallel processing The mechanism for updating the shared variable at the time of parallel execution can be realized by the communication between the IPPs outlined using FIG. In order to actually perform this processing, information on which shared variable each processing block accesses, and information on which processor's local memory the target processing block is located are required. This information is
In this embodiment, the compiler 6 is created when the shared variable access table 11 and the block management table 12 are created. As already mentioned, the table structure is recorded in OBJ14,
At the time of execution, it is loaded into the IPP 15, and is held and referred to as the shared variable access table 30 and the block management table 31 in the work area 16 on the memory of the IPP 15.

Here, the operation of the compiler 6 relating to this table structure generation and table management at the time of execution will be described.

3-1-1. Common Points with Conventional Compiler Operation FIG. 6 is a diagram for explaining a part of the intermediate language description of the present embodiment. An item 601 is an intermediate language instruction word (predicate) expressed in hexadecimal notation, and a name given to it is indicated by an item 602. The operation of the compiler 6 of this embodiment is the same as that of a conventional serial processing language compiler, except that a predicate relating to parallel execution is generated as an intermediate language. The compiler 6 performs well-known recursive descending parsing on a language description having a syntax rule of LL (1) format,
Generate intermediate code.

With respect to the program shown in the list 701 of FIG. 7, the compile result regarding the part of the procedure 702 is shown in the list 704. A list 703 shows the relative address of the object code, and a list 705 shows the list 704 in a disassembled form.

The intermediate language used in this embodiment does not assume a specific processor component such as an accumulator or a register as a virtual processor, and uses a stack as an area for arithmetic operation. More widely used. For the following description, first, a method of arranging variables in a block on a stack will be described with reference to FIG.

The stack is consumed in the state shown at 804 as each block is called at run time. In FIG. 8, the stack pointer immediately before the calling of the processing block indicates the position of the arrow 806, and the upward direction in the drawing is displayed such that the value of the address becomes smaller. First, the above-mentioned five elements of the AR are arranged on the stack, the first local variable 805 is stored thereon, and after all the local variables are arranged, the consumption by the execution code is performed. When each processing block has an argument, the argument is arranged on the stack 804 prior to the AR, so that the position is smaller than the address than the arrow 806 (downward in the figure).
Is located in.

In the block level 802, the level of the main program is 0, and thereafter, as the structure becomes deeper, the level value increases by +1. Taking the program of the list 701 as an example, both variables xx and yy are variables at block level = 0. Also, variables a, b, and c declared in procedurep3
Are all variables at block level = 1. Listing 7
The fifth line of 02, which is the first executable statement in procedure p3, is compiled as the third line following arrow 708. That is, each row corresponds to the next processing.

First line: The address of the fifth position is evaluated by the index on the stack of the block having the block level = 1, and stored at the top of the current stack.

Second line: Store the constant 4 at the top of the stack.

Third line: The value at the top of the stack is stored in the address indicated by the second stage from the top of the stack.

In the above explanation, the variable a is the first variable to appear in the local variable declaration of procedure p3.
The value of the displacement 803 on the stack becomes 5 according to the use status of the stack 804 described above.

3-1-2. Features of the operation of the compiler 6 of this embodiment The features of the operation of the compiler 6 of this embodiment are the following four points.

(1) At the time of execution, the processing block is changed to another IP
A point that generates information for distribution in P.

(2) Generating information for arranging a copy of a read-only shared variable for each processing block executed in parallel.

(3) Generating a predicate that specifies a syntactical position at which a connection with another IPP sharing the parallel execution should be made.

(4) An intermediate language is output instead of a processor-dependent machine language, and a table data structure holding reference information about shared variables and a predicate description for parallel execution are inserted into the intermediate language object. Point to output the object file of the format.

Among the above, (1) and (2) are conditions necessary for realizing the present embodiment, and (3) is a condition for facilitating the processing. (4) is similar to a conventional intermediate language output format compiler in that an intermediate language is generated, but is different from the conventional compiler in that it has means for realizing a parallel language processing system that allows shared variables.

In order to realize the condition (1) in this embodiment, the compiler 6 generates the block management table 12 (or its copy, 31). This will be described below with reference to FIGS. 11 and 12.

The block management table 12 has a data structure shown in FIG. The block number 112 is a number uniquely assigned to each processing block, and is used as a key when searching for information regarding a block. The block start address 113 and the block end address 114 are recorded as relative positions in the object code,
It is referred to when the block is transferred to the local memory of another IPP. The stack depth 115 consumed as an argument is
When transferring a block to another IPP, the value placed on the stack is transferred as an argument to the block, and the transfer destination IPP
When the stack of is initialized, it is referred to for calculating the number of bytes required for initialization. Name reference argument flag 116
Is a flag for detecting whether or not the block uses a name reference argument. As described above, the block recognized as a parallel execution unit has a limit that only a value reference argument is allowed. Therefore, the IPP refers to this flag at the time of execution to determine whether parallel execution is possible. The block external call pointer 117 is a data structure that forms the linked list 118, and is a data structure that holds a block number related to a call block when the block of interest calls another block. Since the number of blocks is variable here, a linked list type data structure 1
18 was used. When an IPP transfers one block to another IPP at runtime, it also retrieves the object code for the external block it calls,
Transfer to another IPP. At this time, each block indicated by the linked list 118 is a transfer target.

Each item of these data structures is shown in FIG. 1 when the syntax analysis process 8 and the code generation process 13 of the compiler 6 detect a processing block (procedure or function).
The procedure shown in the flowchart of No. 2 is performed to generate.

In the block code generation, the argument list is first analyzed (S121). At this time, the stack depth 115 consumed in the argument is recorded, and the name reference argument flag 116 is recorded depending on the presence or absence of the name reference argument. Subsequently, the local variable is analyzed (S122), and the declaration statement such as the data structure definition is analyzed (S123). However, the processing procedure of S122 and S123 is repeated according to the appearance order of the declaration. Further, when there is a declaration of another processing block of either a function or a procedure, code generation is processed recursively. That is, the process recursively calls itself (S124) and the process is continued.

The processing relating to the series of declarations ends at the start of the block body. The block text starts with the reserved word "begin". When this reserved word is detected, the syntax analysis process 8
Calls the sequential code generation process 13 to process the generation of each predicate (S125). At this time, the start address 11 of the block
3 is recorded. Also, during description, the function outside the own block,
Whenever a procedure is called, the external call pointer 117 and the linked list 118 are generated. The block description ends with the reserved word "end", but at this time, the block end address 114 is recorded.

The above condition (2) is realized by performing and recording "detection of shared variable only for read reference". Therefore, in the processing step S125 according to the above procedure,
Access to variables declared at the main program level
It is recorded in the shared variable access table for each block 10. The processing procedure will be described below with reference to FIG.

When the variable is accessed, the syntax analysis process 8 searches the in-block name table 9. If there is no variable name corresponding to this, the level of the block is set to -1, and the in-block name table 9 of the higher block is searched. The variable detected in the in-block name table 9 with the block level = 0 is a "variable declared at the main program level", which is a shared variable in this embodiment. Also,
For variable names that cannot be detected by this search, syntax error processing for variable name undefined is performed. The parsing process 8 refers to the shared variable in the order of declaration in the main program as it is with reference numeral 10.
2 (this matches the order of appearance in the name table 9), the shared variable access table for each block 10 is searched, and whether the access is write or read is recorded in the access flag 103. If read, flag = 0 is added, and if write, flag = 1 is added to the previous value.
Therefore, when the syntactic analysis of the entire block is completed, the contents of the block-by-block shared variable access table 10 are recorded so that the access flag 103 becomes 1 for the shared variable accompanied by writing. When the processing is completed for one processing block, the contents of the shared variable access table for each block 10 are recorded in the shared variable access table 11 each time. The shared variable access table 11 is a data structure for holding a list of blocks that are only read-referenced as a linked list 108, and reference number 10 of each shared variable.
5, variable name 106, and pointer 107 to the linked list. With respect to the shared variable access table 10 for each block of each block, the access flag 103 is checked, and the reference number 102 of the variable with flag = 0 is extracted. Next, the element with the reference number 105 that matches the reference number 102 is searched in the shared variable access table 11,
The block number of the block being processed is added to the linked list after the pointer 107 of this element.

When the above processing procedure is completed for all blocks in the program, the shared variable access table 1
In 1 is recorded information about blocks for which only read reference is performed for all shared variables.

The above condition (3) is realized by inserting the predicate NEWPROC into the object. In the example of list 704, from the COBEGIN predicate shown by arrow 706, arrow 7
The predicate NEWPROC (2C in hexadecimal) that causes parallel execution is inserted between the COEND predicates indicated by 07. IP
If the P processing system detects this predicate at the time of execution, another P
It communicates with P, establishes a connection, and initializes the connected IPP. This will be described later in the item of operation description regarding communication between IPPs.

The above condition (4) has two technical advantages, and constitutes the most basic constituent element in this embodiment. The first technical advantage is that the intermediate language output is generated as a result of execution by the intermediate language interpreter (IPP), and the mechanism of exclusive control and synchronous control when accessing a shared variable can be simply processed. This will be described in the section “3-2. Exclusive control and communication between IPPs”. Needless to say, the second technical advantage is that the information of shared variable access required for parallel execution is recorded in the object file of the intermediate language. This operation allows the runtime processing described in the next section. Parallelization can be realized with a simple operation. If it is attempted to realize a processing system in which information regarding shared variable access is not passed to the IPP group via the object file 14, the actual entity of the variable accessed at the time of execution is observed to determine whether or not the variable is a shared variable. Some mechanism to do this is required. However, the realization thereof can be said to be extremely difficult because the IPP group is a group of processes that communicate with each other via the communication path 5 or the like.

3-1-3. Features of Execution of Intermediate Language of this Embodiment The IPP of this embodiment is largely different from the conventional intermediate language interpreter in two points. The first difference is that
The point is that the IPPs communicate with each other, the processing blocks that can be executed in parallel are distributed to a plurality of IPPs, and the processing is multiplexed. This will be described in detail in “3-2. Exclusive control and communication between IPPs”. The second difference is that as shown in FIG.
The point is that when the processing block is placed in the local memory of the PP and is rewritten by the processing block being executed by another IPP, the rewriting process is performed by performing communication. Here, the second difference will be described.

When the IPP interprets and executes the description of the intermediate language included in the OBJ 14, the information of the shared variable access table 11 created by the compiler 6 is required. This information is OB
It is expanded in the work memory area 16 of the IPP 15 through J14. Shared variable access table 3 generated as a result
The contents of 0 are shown in FIG. The content of the shared variable access table 30 is basically a copy of the shared variable table 11. However, it does make two changes needed at run time. The first change is that the variable name 106 is unnecessary. At runtime, shared variables are referenced only by reference numeral 105. The second change is that the data structure of the linked list 108
This is the point where the P number is added. The IPP number has an initial value of 0 and is recorded when a processing block is transferred to another IPP during parallel execution. That is, when a certain processing block is executed in parallel, the block number in the linked list is searched, and the IPP number (identifier) that actually processes the block is recorded after the corresponding block number.

Substitution processing for all variables including shared variables is performed when the IPP executes the command word STRORE. The processing content of the instruction word STORE is that "the value of the uppermost stage of the stack is stored at the address indicated by the second stage from the top of the stack." Therefore, at this time, it is determined whether or not the address for storing the data is the address of the shared variable.
A mechanism that P can judge is necessary. On the other hand, the command STORE
It is the instruction word LODA that places the value of the variable address to be evaluated on the stack. Therefore, the IPP is the command word LODA.
When executing, it is necessary to determine whether the evaluated address is the address of the shared variable and record it.

From the above request, in this embodiment, the access pointer 40 to the shared variable is set inside the IPP in order to determine whether or not the assignment is to the shared variable and to realize the necessary assignment processing.

First, the processing of the instruction word LODA will be described with reference to FIG. A word of the predicate LODA (hexadecimal 00) is 80
It is composed of three fields of 1, 802 and 803. Here, 801 is an OP code (instruction word predicate code), 802 is a depth level of a block in which a variable to be operated is declared (hereinafter referred to as a block level), and 8
03 is an index to the arrangement on the stack in the block. If the value for block level 802 is 0,
It can be judged that it is a variable declared at the main program level. Since the language specification states that “variables declared at the main program level are regarded as shared variables”, the detection of shared variables can be determined by whether or not the value of the block level 802 of the LODA instruction is 0.

Next, a shared variable access process using the access pointer 40 will be described with reference to the flowchart of FIG. FIG. 9 is a flowchart showing a part of the instruction word processing procedure of IPP.

If the instruction word in the object code is extracted (S901) and the instruction word is LODA, block level 8
The value of 02 is checked for = 0. This judgment is {true}
If so, the address calculation on the shared variable table is performed using the index 803 for the allocation on the stack, and this value is recorded in the access pointer 40 (S903). After this, the actual processing of the LODA instruction is executed (S904).

On the other hand, when executing the instruction word STORE, IPP
Performs processing according to the following procedure.

If the content of the access pointer 40 is = 0, a normal STORE instruction is processed (S907). But,
If the content of the access pointer is not 0, the value of the access pointer is used as an index of the shared variable access table 30, the processor number and the IPP number holding the shared variable are extracted from the shared variable access table 30, and all of these IPP
Then, the "data rewrite command" described later is transferred to update the value of the shared variable (S906).

Shared variables (copy of which are only read / referenced) are individually initialized and generated in the shared variable area 18 in the working memory 16 of each IPP. This shared variable area is shown in FIG. The shared variable area 18 has an area in which a shared variable reference number 141 and a pointer 142 to a real address are stored, and an area in which a variable is actually held. Each shared variable uses the value of the reference number 141 as a key, and uses the pointer 14
The address of the actual storage location 143 can be known from 2.

3-2. Exclusive control and communication between IPPs In a compiler that directly generates a machine language, a mechanism related to exclusive control such as a semaphore type or a monitor type is required when accessing a shared resource, and code generation is performed for this purpose. However, in this embodiment, since the execution is performed by the interpreter, exclusive control is performed on the shared variable,
No special code generation is required for synchronous control.
This is because even if the communication means receives a message for rewriting variables from another IPP, the IP
This is because P is processed sequentially, so that another processing unit does not physically access the variable while rewriting the variable.

When the data string is received from the communication path 5, the processing address of the processor is branched by the operating system to a specific processing portion in the process. This kind of software exception (interrupt) processing is a service provided by most operating systems. The communication unit 23 or 24 is a processing procedure executed by a processing branch when a data string from another process is input to the resource (communication socket) of the operating system secured for communication. Data strings transferred by communication between IPPs are classified into the following two types. (1) A data string of an intermediate language description that is stored in the processing queue of the interpreter and is sequentially fetched and executed.

(2) A data string that is evaluated immediately after reception.

Each of the above data strings is transmitted by the data structure of the format shown in FIG. Data string 501
Has a value uniquely determined by the processor number and the process number in the identifier 502, and an end code 503 indicates the end. If the value of the discrimination flag 504 is 0, the statement 508 in the data string is evaluated immediately. On the other hand, if the value of the determination flag 504 is hexadecimal FF, the data string is enqueued in the queue.

At this time, all the data strings stored in the queue are intermediate language instructions that can be sequentially executed, but in most cases, the stack initialization code 505 consisting of the stack initialization instruction and its arguments, the shared variable table. A shared variable table initialization code 506 consisting of an initialization instruction and its arguments,
Other executable objects 507 are formed in this order. Any of 505, 506, and 507 may be omitted. More specifically, the stack initialization code 505 includes a stack initialization instruction 511, a field length 512,
It is composed of a variable field 513. The content of the variable field contains the actual stack data string. Also,
In both the shared variable table initialization code 506 and the object 507, the data string format is the stack initialization code 50.
The same as 5.

On the other hand, there are the following five types of statements that are evaluated immediately.

-Connect command-Release command-Status acquisition command-Data rewriting command-Data reading command The connect command is a command transferred when the requesting process establishes a connection with the IPP, and is a processor number and a process number. Is sent as an argument. When the receiving IPP is in the idle state or in a state where it can accept a new process, a normal termination code is returned as a response. In other cases, an error code is returned.
As the processor number, in the case of a multiprocessor system using a network, an address prepared by the network mechanism is used, and when other communication means is used, a value that can uniquely identify the processor, such as address assignment to the system bus, is used. To use.

The release instruction is an instruction to be transferred when the requesting process releases the connection with the IPP established by the connect instruction, and has no argument.

The status acquisition instruction is issued by the requesting process by the I
This is an instruction to be transferred when requesting the current processing status of the PP, it has no argument, and the IPP status code is returned as a response.

The data rewrite command 509 is a command transferred from the requesting process to the IPP in order to process the change of the value of the shared variable access table 30. On the IPP side,
Only if this command is received from the currently connected process, the processing is performed, otherwise an error code is returned. The data rewriting instruction 509 is based on the index 141 (array subscript) in the shared variable access table 30 and the actual variable value 510.
Is an argument.

The data read command is a command for requesting the process of fetching the contents of the current stack of the IPP.
The PP side performs processing only when it receives this command from the currently connected process, and otherwise returns an error code. The instruction transfers this instruction with the stack depth value to be acquired as an argument. In terms of processing, this instruction is meaningless only after the execution of a series of objects has been completed, so it is transferred after the completion of processing is confirmed by the status acquisition instruction.

If the instructions that are not evaluated immediately are not implemented, a problem occurs that the effect of parallel processing is lost. IP
If the "data rewriting instruction" is sequentially processed when rewriting the shared variable area in P, it is substantially the same as the sequential processing system. In order to solve this problem, this embodiment implements the above instruction in the IPP processing system.

With the above configuration, the present embodiment maintains the data consistency when a plurality of processing blocks that are executing in parallel access a shared variable, and guarantees the parallel operation. At this time, the processing block that only reads the shared variable value refers to the copied value (shared variable access table 30) of the shared variable that is placed in the local memory, and only the block that performs the rewriting process does the actual communication. Data transfer using path 5 is performed. As a result, communication between processing units executed in parallel could be minimized.

[0101]

As clarified in the above embodiments,
The present invention, in a multiprocessor parallel processing device configured by a parallel description language compiler that generates an intermediate language description and an intermediate language interpreter, reads and references a shared variable among a plurality of intermediate language interpreters that access a shared variable. For an intermediate language interpreter that does only that, the copy of the shared variable value is placed in the local memory area in advance and the copy of the shared variable value is referred to. On the other hand, the intermediate language interpreter that rewrites the shared variable is noted. Simultaneously with the rewriting of the shared variable entity, an intermediate language interpreter holding a copy of the value of the shared variable is detected, and communication for rewriting the copy of the value of the shared variable is performed. Is eliminated, and as a result, the frequency of interprocess communication is restricted, And implementing shared variable access processing time reduction of time, and has the effect of realizing the operation guarantee of the parallel execution.

[0102]

[Brief description of drawings]

FIG. 1 is a configuration diagram of an embodiment of the present invention.

FIG. 2 is a flowchart of an outline of processing according to an embodiment.

FIG. 3 is an explanatory diagram of a parallel description language.

FIG. 4 is an explanatory diagram of variable update processing.

FIG. 5 is an explanatory diagram of a data structure used for communication between IPPs.

FIG. 6 is an explanatory diagram of an intermediate language specification.

FIG. 7 is an explanatory diagram of a compilation result.

FIG. 8 is an explanatory diagram of a stack specification status.

FIG. 9 is a flowchart of a part of IPP instruction predicate processing.

FIG. 10 is an explanatory diagram of a shared variable access table.

FIG. 11 is an explanatory diagram of a block management table.

FIG. 12 is a flowchart of a syntax analysis process when a block is detected.

FIG. 13 is an explanatory diagram of a shared variable access table on the IPP side.

FIG. 14 is an explanatory diagram of a shared variable area.

[Explanation of symbols]

1 ... Request generating computer 2 ... Computer 3 ... Computer 4 ... Source program 5 ... Communication path 6 ... Compiler 7 ... Lexical analysis processing 8 ... Syntax analysis processing 9 ... Block name table 10 ... Shared variable access table for each block 11 ... Shared Variable access table 12 ... Block management table 13 ... Code generation process 14 ... Object code described in intermediate language (abbreviated as OBJ) 15 ... Process that becomes an intermediate language interpreter (IP
16 ... IPP work memory 17 ... Activation record (abbreviated as AR) 18 ... Shared variable (non-local variable) area 20 ... Temporary recording area for delayed execution (abbreviated as execution buffer) 21 ... Transfer Recording area for transfer (abbreviated as transfer buffer) 22 ... Temporary recording area for variable evaluation (abbreviated as buffer) 23 ... Communication means for accepting request 24 ... Communication means for generating request 25 ... IPP 26 ... IPP 27 ... IPP 28 ... File reading process 29 ... Character data 30 ... Shared variable access table (copied to IPP15) 31 ... Block management table (copied to IPP15) 40 ... Access pointer 143 ... Shared variable storage position 301 ... List of description examples in serial processing language 302 ... List of description examples in serial processing language 303 ... For parallel processing language One type 804 ... stack area of the data sequence used for communication between the copying 501 ... IPP list 401 ... processing block 403 ... shared variables 404 ... shared variables described example that

Claims (1)

[Claims] 1. A plurality of compilers (a) for generating an object code written in a virtual machine language (hereinafter, intermediate language) and an interpreter (b) for executing the intermediate language output by the compiler. Regarding the compiler, the processor unit is a multiprocessor processing device connected by a shared memory or a communication path, and a-1) In the processing procedure described in the source code,
Parsing processing that detects shared variables that are only read-referenced, and a-2) Table-structured data that records information on shared variables that are only read-referenced in each processing procedure that is executed in parallel. The interpreter has a means for adding to an object file consisting of an intermediate language description that is an execution code. B-1) A table structure that records the information of shared variables that are read and added only to the execution code Refer to the data,
Data communication means for arranging a copy of the shared variable in the local memory of the processor in which the processing unit is arranged, and b-2) Rewriting the shared variable for each processing unit to be executed in parallel. When the reading is performed, the instruction variable communication unit that rewrites the copy of the shared variable placed in the local memory of another processor is also provided, and when reading, the value is shared by referring to the value of the shared variable placed in the local memory. A multiprocessor processing device characterized in that the frequency of communication between processors regarding variable access is reduced.