JPH065969A - Semiconductor laser - Google Patents

Semiconductor laser

Info

Publication number
JPH065969A
JPH065969A JP15653292A JP15653292A JPH065969A JP H065969 A JPH065969 A JP H065969A JP 15653292 A JP15653292 A JP 15653292A JP 15653292 A JP15653292 A JP 15653292A JP H065969 A JPH065969 A JP H065969A
Authority
JP
Japan
Prior art keywords
layer
plane
semiconductor laser
conductivity type
active region
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP15653292A
Other languages
Japanese (ja)
Inventor
Hideki Fukunaga
秀樹 福永
Shigeyuki Otake
茂行 大竹
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujifilm Business Innovation Corp
Original Assignee
Fuji Xerox Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fuji Xerox Co Ltd filed Critical Fuji Xerox Co Ltd
Priority to JP15653292A priority Critical patent/JPH065969A/en
Publication of JPH065969A publication Critical patent/JPH065969A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To obtain a low threshold value and a stable lateral mode in a buried semiconductor laser. CONSTITUTION:An active region made of an optical waveguide layer 3 and a quantum well active layer 4 is buried in a surface A (111) between clad layers 2 and 5 on an n-type GaAs substrate 1 (001) having the surface A (111), a cap layer 6 is provided on the layer 5, and a current block layer 7 is provided on a surface (001) except the surface A (111). Since crystal orientation of a surface for crystal growth are decided to the surfaces (001) and A (111), when growing conditions are decided, crystal growth velocities on the surfaces are hence decided, and a thickness of the film, a width of the active region can be finely controlled. Further, since the active region is formed only on an oblique surface of the surface A (111), recombination of a current diffused in a lateral direction in the upper clad layer of an injected current can be suppressed.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】この発明は、埋め込み型半導体レ
ーザ装置に係り、特にGaAs基板の(111)A面の
斜面上や(111)B面と(001)面で形成されたV
字型の溝の底部上に光とキャリアの閉じ込めを行う構造
の半導体レーザ装置に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an embedded semiconductor laser device, and more particularly to a V formed on a slope of a (111) A plane of a GaAs substrate or on a (111) B plane and a (001) plane.
The present invention relates to a semiconductor laser device having a structure for confining light and carriers on the bottom of a V-shaped groove.

【0002】[0002]

【従来の技術】従来、埋め込み型半導体レーザは幾つか
の構造が提案されており、大別して3つの構造に分類す
ることができる。第1の構造は、(001)面基板上に
活性層を含む結晶成長を行った後、エッチングによって
リッジを形成し、活性領域であるリッジの側面に再成長
によって埋め込み層が形成されたものである。この構造
では活性層厚みと埋め込み幅、及び埋め込み結晶の屈折
率が独立に選択でき、素子設計の自由度が高い。第2の
構造は、(001)面基板にエッチングによって溝、リ
ッジ等を形成した後、結晶成長を行うことにより、リッ
ジの側面での活性層の折れ曲がりによって、リッジ上の
活性領域が上部クラッド層内に埋め込まれるか、または
溝底部の活性領域が下部クラッド層内に埋め込まれたも
のである。この構造の場合、一回の結晶成長で作製が可
能である。第3の構造は、まず活性層を含む結晶成長を
行い、次に必要な活性層幅を残して不純物の拡散を行
い、活性層とクラッド層を混晶化させることによって活
性領域を混晶化領域間に埋め込んだものである。この構
造の場合も、一回の結晶成長で作製が可能で、かつプレ
ーナ型であるため汎用性が高い。
2. Description of the Related Art Conventionally, some structures of buried type semiconductor lasers have been proposed and can be roughly classified into three structures. The first structure is that a ridge is formed by etching after crystal growth including an active layer on a (001) plane substrate, and a buried layer is formed by regrowth on the side surface of the ridge which is an active region. is there. In this structure, the thickness of the active layer, the embedding width, and the refractive index of the embedding crystal can be selected independently, and the degree of freedom in device design is high. In the second structure, a groove, a ridge and the like are formed on a (001) plane substrate by etching, and then crystal growth is performed to bend the active layer on the side surface of the ridge so that the active region on the ridge becomes an upper clad layer. Or the active region at the bottom of the trench is embedded in the lower cladding layer. In the case of this structure, it can be manufactured by one crystal growth. In the third structure, first, crystal growth including the active layer is performed, and then impurities are diffused while leaving a necessary active layer width to mix the active layer and the clad layer to form a mixed crystal in the active region. It is embedded between areas. In the case of this structure as well, it can be manufactured by one-time crystal growth, and since it is a planar type, it is highly versatile.

【0003】[0003]

【発明が解決しようとする課題】ところで、第2の構造
では、リッジあるいは溝側面での活性層の折れ曲がりに
よって活性領域を埋め込んでいるが、通常の結晶成長の
場合リッジや溝の端部では、高次の面における成長速度
が平坦部と異なるため、薄膜の不均一が生じる。また、
リッジや溝の側面における薄膜は、斜面の角度によって
決まり、リッジの形状により活性層の幅やリッジ部にお
ける実行屈折率が変動するため、低しきい値でかつ安定
な横モードを得るために、リッジ作製を精度良く作製す
ることは困難である。
By the way, in the second structure, the active region is buried by the bending of the active layer on the side surface of the ridge or groove, but in the case of normal crystal growth, at the end of the ridge or groove, Since the growth rate on the higher-order surface is different from that on the flat portion, nonuniformity of the thin film occurs. Also,
The thin film on the side surface of the ridge or groove is determined by the angle of the slope, and the width of the active layer and the effective refractive index in the ridge portion vary depending on the shape of the ridge. It is difficult to manufacture a ridge with high accuracy.

【0004】さらに、リッジ以外の(001)面上にも
活性層が形成されているため、上部クラッド層で横方向
に拡散した電流が、リッジ横平坦部の活性層に流れ込み
再結合する。ここで発生した光はリッジ上の活性領域で
のレーザの誘導放出には寄与しないため、横方向に拡散
した電流は漏れ電流となり、しきい値の増加をまねくと
いう問題がある。本発明の目的は、低しきい値でかつ安
定な横モードが得られる埋め込み半導体レーザ装置を提
供することにある。
Further, since the active layer is formed on the (001) plane other than the ridge, the current diffused in the lateral direction in the upper cladding layer flows into the active layer in the lateral flat portion of the ridge and recombines. Since the light generated here does not contribute to the stimulated emission of the laser in the active region on the ridge, the current diffused in the lateral direction becomes a leakage current, which causes a problem of increasing the threshold value. An object of the present invention is to provide an embedded semiconductor laser device that can obtain a stable lateral mode with a low threshold value.

【0005】[0005]

【課題を解決するための手段】上記の目的を達成させる
ため、本発明は第一導電型GaAs基板の結晶方位に対
して[011]方向に伸びたストライプ状の(111)
A面の斜面を有する(001)面基板上に成長させた、
第一導電型クラッド層と第二導電型クラッド層との間に
光導波層により挟まれた活性層が設けられた半導体レー
ザ装置において、前記光導波層と該光導波層により挟ま
れた活性領域とが前記(001)面基板の(111)A
面の斜面上に埋め込まれた構成にある。
In order to achieve the above object, the present invention provides a stripe-shaped (111) extending in the [011] direction with respect to the crystal orientation of the first conductivity type GaAs substrate.
Grown on a (001) plane substrate having a slope of plane A,
In a semiconductor laser device in which an active layer sandwiched by an optical waveguide layer is provided between a first conductivity type cladding layer and a second conductivity type cladding layer, the optical waveguide layer and an active region sandwiched by the optical waveguide layer are provided. And (111) A of the (001) plane substrate
The structure is embedded on the slope of the surface.

【0006】また第一導電型GaAs基板は、(11
1)A面を挟んで一方側の(001)面の表面を不純物
拡散により第二導電型とし、他方側の(001)面上に
第二導電型半導体層が形成された半導体レーザ装置の構
成にある。
The first conductivity type GaAs substrate is (11
1) Configuration of a semiconductor laser device in which the surface of the (001) surface on one side across the A surface is made the second conductivity type by impurity diffusion and the second conductivity type semiconductor layer is formed on the (001) surface on the other side. It is in.

【0007】また第一導電型GaAs基板は、(11
1)A面の斜面と(001)面からなる複数のストライ
プ状の凸部を有し、前記複数の(111)A面の斜面上
に活性領域が埋め込まれた多ビーム型半導体レーザ装置
の構成にある。
The first conductivity type GaAs substrate is (11
1) Configuration of a multi-beam type semiconductor laser device having a plurality of stripe-shaped convex portions composed of an A-plane slope and a (001) plane, and an active region being embedded on the plurality of (111) A-plane slopes It is in.

【0008】さらに他の発明の半導体レーザ装置は、第
一導電型(001)面GaAs基板上に、所定幅を残し
て順次積層された第二導電型埋め込み層と第一導電型埋
め込み層を有し、前記GaAs基板の結晶方位に対して
[011]方向に伸びたストライプ状の(111)B面
を斜面とし、(001)面を底面及び上面としたV字型
の溝形状が形成され、該V字型の溝形状の底部上に活性
領域が埋め込まれた構成にある。
A semiconductor laser device according to still another invention has a second-conductivity-type buried layer and a first-conductivity-type buried layer which are sequentially stacked with a predetermined width left on a first-conductivity-type (001) plane GaAs substrate. Then, a V-shaped groove having a stripe-shaped (111) B surface extending in the [011] direction with respect to the crystal orientation of the GaAs substrate as an inclined surface and a (001) surface as a bottom surface and an upper surface is formed, An active region is embedded on the bottom of the V-shaped groove.

【0009】また第一導電型(001)面GaAs基板
上に形成されたV字型の溝形状の側面は、V字型の溝形
状の底部上に埋め込まれた活性領域の光導波層よりも低
い屈折率を持つ半導体層からなる半導体レーザ装置の構
成にある。
The side surface of the V-shaped groove formed on the GaAs substrate of the first conductivity type (001) surface is more than the optical waveguide layer of the active region buried on the bottom of the V-shaped groove. The semiconductor laser device is composed of a semiconductor layer having a low refractive index.

【0010】また第一導電型(001)面GaAs基板
はストライプ状の(111)B面を斜面とし(001)
面を底面及び上面とする複数のV字型の溝形状を有し、
この複数のV字型の溝形状の底部上に活性領域が埋め込
まれた多ビーム型半導体レーザ装置の構成にある。
The first conductivity type (001) plane GaAs substrate has a striped (111) B plane as a slope (001).
It has a plurality of V-shaped groove shapes whose surfaces are a bottom surface and an upper surface,
This is a configuration of a multi-beam type semiconductor laser device in which an active region is embedded on the bottoms of a plurality of V-shaped groove shapes.

【0011】[0011]

【作用】(001)面基板の(111)A面の斜面上に
活性領域が埋め込まれた半導体レーザの場合、結晶成長
が行われる面の結晶方位は(001)と(111)Aと
決まっているため、成長条件を決めるとそれぞれの面上
での結晶成長速度が決まり、時間によって膜厚を細かく
制御することができる。したがって、それぞれの面上で
の膜厚を均一にすることができるため、リッジの高さと
各面での結晶成長速度を決めることにより、活性領域の
幅も制御できる。ストライプ状斜面の高さを制御するこ
とにより、活性領域の幅も変えることができる。また、
(111)A面の斜面上のみに活性領域が形成されてい
るため、注入された電流のうち上部クラッド層で横方向
に拡散した電流の再結合を抑制することができる。
In the case of a semiconductor laser in which the active region is embedded on the slope of the (111) A plane of the (001) plane substrate, the crystal orientations of the planes on which crystal growth is carried out are always (001) and (111) A. Therefore, if the growth conditions are determined, the crystal growth rate on each surface is determined, and the film thickness can be finely controlled by time. Therefore, since the film thickness can be made uniform on each surface, the width of the active region can be controlled by determining the height of the ridge and the crystal growth rate on each surface. The width of the active region can also be changed by controlling the height of the striped slope. Also,
Since the active region is formed only on the slope of the (111) A plane, it is possible to suppress recombination of the injected current that is laterally diffused in the upper cladding layer.

【0012】また第一導電型(001)面GaAs基板
上に、所定幅を残して順次積層された第二導電型埋め込
み層、第一導電型埋め込み層を有し、前記GaAs基板
の結晶方位に対して[011]方向に伸びたストライプ
状の(111)B面を斜面とし、(001)面を底面及
び上面としたV字型の溝形状が形成され、該V字型の溝
形状の底部上に活性領域が埋め込まれた半導体レーザの
場合、V字型の溝幅と(001)面上での結晶成長速度
により活性領域の幅を制御することが可能である。ま
た、溝部の活性領域に効率良く電流を注入することがで
きる。
Further, a first-conductivity-type (001) plane GaAs substrate is provided with a second-conductivity-type buried layer and a first-conductivity-type buried layer, which are sequentially stacked with a predetermined width left, and has a crystal orientation of the GaAs substrate. On the other hand, a V-shaped groove shape having a stripe-shaped (111) B surface extending in the [011] direction as an inclined surface and having a (001) surface as a bottom surface and an upper surface is formed, and the bottom portion of the V-shaped groove shape is formed. In the case of a semiconductor laser in which an active region is embedded above, the width of the active region can be controlled by the V-shaped groove width and the crystal growth rate on the (001) plane. Further, current can be efficiently injected into the active region of the groove.

【0013】[0013]

【実施例】以下、本発明の実施例を説明する。図1は本
発明による半導体レーザ装置の第1の実施例を示す断面
構造を示している。本実施例ではn型を第一導電型と
し、p型を第二導電型として説明する。半導体レーザ装
置は、(111)A面を有する(001)面n型GaA
s基板1上に順次積層された、第一クラッド層2と、
(111)A面に形成された光導波層3と、該光導波層
3に挟まれた量子井戸活性層4と、第二クラッド層5
と、キャップ層6とを備え、該キャップ層6には電流ブ
ロック層として(111)A面を除く(001)面にS
34膜7を設け、該Si34膜7および(111)A
面のキャップ層6に接触するp側電極8および(00
1)面n型GaAs基板1の底面に接触するn側電極9
とを有する構成になっている。
EXAMPLES Examples of the present invention will be described below. FIG. 1 shows a sectional structure showing a first embodiment of a semiconductor laser device according to the present invention. In this embodiment, the n-type is the first conductivity type and the p-type is the second conductivity type. The semiconductor laser device has a (001) plane n-type GaA having a (111) A plane.
The first clad layer 2 sequentially laminated on the substrate 1;
The optical waveguide layer 3 formed on the (111) A plane, the quantum well active layer 4 sandwiched between the optical waveguide layers 3, and the second cladding layer 5.
And a cap layer 6, and the cap layer 6 serves as a current blocking layer with S on the (001) plane excluding the (111) A plane.
The i 3 N 4 film 7 is provided, and the Si 3 N 4 film 7 and (111) A
P-side electrodes 8 and (00
1) Surface n-side electrode 9 in contact with the bottom surface of the n-type GaAs substrate 1
It is configured to have and.

【0014】上記半導体レーザ装置の製造を図2に基づ
いて説明する。なお、本製造では結晶成長にMOCVD
法を使用した。まず、(111)A面を有する(00
1)面n型GaAs基板1上に、等方的に成長する成長
条件でSeドープA10.6Ga0.4Asからなる厚さ1μ
mの第一クラッド層2を成長させる(図2(a))。そ
の後、(111)A面上で成長速度が速くなる成長条件
でアンドープA10.3Ga0.7As光導波層3、アンドー
プGaAs量子井戸活性層4およびアンドープA10.3
Ga0.7As光導波層3を成長させる(図2(b))。
Manufacturing of the semiconductor laser device will be described with reference to FIG. In this production, MOCVD is used for crystal growth.
Used the method. First, (00) having a (111) A plane
1) A thickness of 1 μm composed of Se-doped A1 0.6 Ga 0.4 As under growth conditions for growing isotropically on a plane n-type GaAs substrate 1.
m first clad layer 2 is grown (FIG. 2A). After that, under the growth condition that the growth rate becomes faster on the (111) A plane, the undoped A1 0.3 Ga 0.7 As optical waveguide layer 3, the undoped GaAs quantum well active layer 4, and the undoped A1 0.3
The Ga 0.7 As optical waveguide layer 3 is grown (FIG. 2B).

【0015】次に、等方的に成長する成長条件でMgド
ープAl0.6Ga0.4Asからなる厚さ1μmの第二クラ
ッド層5,MgドープGaAsからなる厚さ0.1μm
のキャップ層6を順次成長させる(図2(c))。通常
のMOCVD法による成長では、V/IIIの比を60、
基板における成長温度を700〜800℃としており、
この成長条件の下では成長速度は等方的か又は(00
1)面上が速い。また、光導波層と量子井戸活性層を成
長させる場合には、V/IIIの比を60、基板における
成長温度を600℃とすることにより、(111)A面
上での成長速度が(001)面上に比べ3倍となる。
Next, under the growth condition of isotropic growth, the second cladding layer 5 made of Mg-doped Al 0.6 Ga 0.4 As and having a thickness of 1 μm, and the thickness of 0.1 μm made of Mg-doped GaAs.
The cap layer 6 is sequentially grown (FIG. 2C). In the ordinary MOCVD method, the V / III ratio is 60,
The growth temperature on the substrate is 700 to 800 ° C.,
Under this growth condition, the growth rate is isotropic or (00
1) The surface is fast. Further, when growing the optical waveguide layer and the quantum well active layer, the growth rate on the (111) A plane is (001) by setting the V / III ratio to 60 and the growth temperature on the substrate to 600 ° C. ) Three times as much as on the surface.

【0016】したがって、(111)A面上での光導波
層の厚さをそれぞれ0.1μm、量子井戸活性層の厚さ
を100Åとすると、(001)面上での光導波層の厚
さはそれぞれ0.03μm、また量子井戸活性層の厚さ
は30Åとなる。すると、厚さの違いによって、(00
1)面上の量子井戸活性層の井戸内におけるエネルギー
ギャップは(111)A面上の量子井戸活性層より約1
00meV大きくなるため、注入されたキャリアは(1
11)A面上の量子井戸活性層に閉じ込められる。
Therefore, assuming that the thickness of the optical waveguide layer on the (111) A plane is 0.1 μm and the thickness of the quantum well active layer is 100Å, the thickness of the optical waveguide layer on the (001) plane is Is 0.03 μm, and the thickness of the quantum well active layer is 30 Å. Then, due to the difference in thickness, (00
The energy gap in the well of the quantum well active layer on the 1) plane is about 1 than that of the quantum well active layer on the (111) A plane.
Since it becomes larger by 00 meV, the injected carriers are (1
11) Confined in the quantum well active layer on the A surface.

【0017】さらに、(001)面上での光導波層は薄
く、また(111)A面上と(001)面上の間では光
導波層が折れ曲がり、(111)A面上の光導波層が
(001)面上のクラッド層により横方向に埋め込まれ
るため、光は(111)A面上の導波層内に閉じ込めら
れる。結晶成長後、電流ブロック層として全面にSi3
4膜7を0.1μm着膜し、フォトリソグラフィによ
り電流注入領域となる(111)A面上のSi34膜7
をエッチングによって除去する(図3(d))。その
後、p側電極8とn側電極9を蒸着する(図3
(e))。このように、斜面を有する基板と選択成長に
より、容易に埋め込み型のレーザを作製することができ
る。
Further, the optical waveguide layer on the (001) plane is thin, and the optical waveguide layer is bent between the (111) A plane and the (001) plane, and the optical waveguide layer on the (111) A plane is formed. Is laterally embedded by the cladding layer on the (001) plane, so that the light is confined in the waveguide layer on the (111) A plane. After crystal growth, Si 3 is formed on the entire surface as a current blocking layer.
The N 4 film 7 is deposited to a thickness of 0.1 μm, and the Si 3 N 4 film 7 on the (111) A plane which becomes the current injection region is formed by photolithography.
Are removed by etching (FIG. 3D). After that, the p-side electrode 8 and the n-side electrode 9 are vapor-deposited (see FIG. 3).
(E)). As described above, the embedded laser can be easily manufactured by the substrate having the inclined surface and the selective growth.

【0018】図4および5は、第1の実施例の半導体レ
ーザを製造する改良された方法の工程を示している。ま
ず、n型GaAs基板上1にSi34膜7を着膜し、フ
ォトリソグラフィによって窓を開ける。このSi34
7をマスクとして、GaAs基板の表面にZnを0.5
μm拡散させ、Zn拡散領域11を形成する(図4
(a))。Si34膜7を除去した後、MOCVD法に
より厚さ2μmのSeドープGaAs層12、厚さ0.
1μmのMgドープGaAs層13を順次成長させる
(図4(b))。その後、再びSi34膜7を着膜した
後、フォトリソグラフィによって窓を開ける(図4
(c))。
4 and 5 show the steps of an improved method of manufacturing the semiconductor laser of the first embodiment. First, a Si 3 N 4 film 7 is deposited on the n-type GaAs substrate 1 and a window is opened by photolithography. Using this Si 3 N 4 film 7 as a mask, 0.5
.mu.m to form a Zn diffusion region 11 (FIG. 4).
(A)). After removing the Si 3 N 4 film 7, the Se-doped GaAs layer 12 having a thickness of 2 μm and the thickness of 0.1 is formed by the MOCVD method.
A 1 μm Mg-doped GaAs layer 13 is sequentially grown (FIG. 4B). Then, after depositing the Si 3 N 4 film 7 again, a window is opened by photolithography (FIG. 4).
(C)).

【0019】そして、H2SO4:H22:H2O=1:
8:80のエッチャントにより、Zn拡散領域11に到
達するまでエッチングを行い、(111)A面の斜面を
形成する(図5(d))。マスクとしたSi34膜7を
除去した後、第1の実施例と同様の結晶成長を行う(図
5(e))。これにより、Zn拡散領域11およびMg
ドープGaAs層13の上下の層の間でn−p−n構造
となるため、電流の流れが抑えられる。したがって、第
1の実施例に比べn側も電流狭搾されるため、漏れ電流
の少ない低しきい値半導体レーザとなる。
Then, H 2 SO 4 : H 2 O 2 : H 2 O = 1:
Etching is performed until the Zn diffusion region 11 is reached by an 8:80 etchant to form a slope of the (111) A plane (FIG. 5D). After removing the Si 3 N 4 film 7 used as a mask, the same crystal growth as in the first embodiment is performed (FIG. 5E). Thereby, the Zn diffusion region 11 and the Mg
Since an npn structure is formed between the upper and lower layers of the doped GaAs layer 13, the current flow is suppressed. Therefore, the current is squeezed on the n-side as compared with the first embodiment, so that a low threshold semiconductor laser with less leakage current is obtained.

【0020】本実施例では、第1導電型GaAs基板を
n型とし、不純物としてZn,Mgを用いているが、p
型ドーパントとなるBeやCでも良い。また第1導電型
GaAs基板をp型とした場合、拡散させる不純物はS
i,Ge,Se,Sなどのn型ドーパントを用いる。ま
た本実施例では、不純物導入法として、熱拡散を用いて
いるが、イオン注入によっても不純物の導入ができる。
In this embodiment, the first-conductivity-type GaAs substrate is n-type and Zn and Mg are used as impurities.
Be or C, which is a type dopant, may be used. When the first conductivity type GaAs substrate is p-type, the impurity to be diffused is S
An n-type dopant such as i, Ge, Se or S is used. In this embodiment, thermal diffusion is used as the impurity introducing method, but the impurity can be introduced also by ion implantation.

【0021】次に本発明の第2の実施例について説明す
る。図6は本発明が適用された多ビーム半導体レーザ装
置の断面構造を示している。多ビーム半導体レーザ装置
は、(111)A面と(001)面からなる複数のスト
ライプ状のリッジが形成されたn型GaAs基板1に順
次積層された、第一クラッド層2と、それぞれの(11
1)A面に形成された光導波層3および該光導波層3に
挟まれた量子井戸活性層4と、第二クラッド層5と、キ
ャップ層6とを備え、該キャップ層6には電流ブロック
層として(111)A面を除く(001)面にSi34
膜7を設け、またそれぞれの(111)A面との間に絶
縁領域10を形成すると共に、Si34膜7および(1
11)A面のキャップ層6に接触するp側電極8および
(001)面n型GaAs基板1の底面に接触するn側
電極9とを有する構成になっている。
Next, a second embodiment of the present invention will be described. FIG. 6 shows a sectional structure of a multi-beam semiconductor laser device to which the present invention is applied. The multi-beam semiconductor laser device includes a first clad layer 2 sequentially laminated on an n-type GaAs substrate 1 on which a plurality of striped ridges composed of (111) A plane and (001) plane are formed, and ( 11
1) An optical waveguide layer 3 formed on the A surface, a quantum well active layer 4 sandwiched between the optical waveguide layers 3, a second cladding layer 5, and a cap layer 6 are provided, and the cap layer 6 has a current As a block layer, Si 3 N 4 is formed on the (001) plane except the (111) A plane.
The film 7 is provided, and the insulating region 10 is formed between each film and the (111) A plane, and the Si 3 N 4 film 7 and (1
11) It has a structure having a p-side electrode 8 in contact with the cap layer 6 on the A surface and an n-side electrode 9 in contact with the bottom surface of the (001) surface n-type GaAs substrate 1.

【0022】上記多ビーム型半導体レーザ装置の製造に
ついて説明すると、n型GaAs基板1上にSiO2
を0.1μm堆積させた後、フォトリソグラフィによっ
てSiO2膜に複数の窓を開ける。この基板上に第1の
実施例で述べたように、MOCVD法により(001)
面での成長速度が速い成長条件で1.5μmの厚さのS
eドープGaAs層を選択成長させるか、あるいは硫酸
系のエッチャントを用いて選択的にGaAs基板をエッ
チングを行うことによって、(111)A面と(00
1)面からなる複数のストライプ状のリッジを形成す
る。ここで、各ビームが光学的に相互作用しないよう
(111)A面間の距離は3μm以上とする。
The manufacture of the multi-beam type semiconductor laser device will be described. After depositing a SiO 2 film of 0.1 μm on the n-type GaAs substrate 1, a plurality of windows are opened in the SiO 2 film by photolithography. On this substrate, as described in the first embodiment, (001) was formed by the MOCVD method.
S growth of 1.5 μm under the growth condition that the growth rate on the surface is fast.
By selectively growing the e-doped GaAs layer or selectively etching the GaAs substrate using a sulfuric acid-based etchant, the (111) A plane and the (00) plane are formed.
1) Form a plurality of striped ridges each having a surface. Here, the distance between (111) A planes is set to 3 μm or more so that the beams do not optically interact with each other.

【0023】この基板上に第1の実施例と同様の結晶成
長を行うことによって、複数の(111)A面に活性領
域が形成される。結晶成長後、この活性領域にプロトン
を1.2μm深さ注入し、絶縁領域10を設ける。次に
全面にSi34膜7を着膜し、フォトリソグラフィによ
り(111)A面上のSi34膜7をエッチングによっ
て除去する。その後、p側電極8を蒸着した後、エッチ
ングあるいはリフトオフによって活性領域間のp側電極
8を除去し、n側電極9を蒸着する。これによって、一
つのチップ上に個別にアドレス可能な多ビーム半導体レ
ーザが作製される。
By performing crystal growth on this substrate in the same manner as in the first embodiment, active regions are formed on a plurality of (111) A planes. After crystal growth, protons are injected into the active region to a depth of 1.2 μm to provide the insulating region 10. Then-deposit a the Si 3 N 4 film 7 on the entire surface the Si 3 N 4 film 7 on by photolithography (111) A plane is removed by etching. After that, after the p-side electrode 8 is deposited, the p-side electrode 8 between the active regions is removed by etching or lift-off, and the n-side electrode 9 is deposited. This produces a multi-beam semiconductor laser that can be individually addressed on a single chip.

【0024】なお、活性層を量子井戸としているため、
出射される光はTEモードが支配的となり、隣り合った
活性領域は基板に対する傾きが逆であるために、隣り合
った活性領域から出射される光の偏波面が異なる。次に
本発明の第3の実施例を説明する。図7は本発明が適用
された埋め込み型半導体レーザの断面構造を示してい
る。なお、第1の実施例と同一機能をもつ層には同一の
参照番号を付し、その説明を省略する。
Since the active layer is a quantum well,
Since the TE mode is dominant in the emitted light, and the adjacent active regions have opposite inclinations with respect to the substrate, the polarization planes of the light emitted from the adjacent active regions are different. Next, a third embodiment of the present invention will be described. FIG. 7 shows a sectional structure of an embedded semiconductor laser to which the present invention is applied. The layers having the same functions as those in the first embodiment are designated by the same reference numerals and the description thereof will be omitted.

【0025】半導体レーザ装置は、第一導電型(00
1)面GaAs基板1上に、所定幅を残して順次積層さ
れた第一導電型埋め込み層22、第二導電型埋め込み層
23を有し、前記GaAs基板の結晶方位に対して[0
11]方向に伸びたストライプ状の(111)B面を斜
面とし、(001)面を底面及び上面としたV字型の溝
形状24を設け、このV字型の溝形状の底部上に埋め込
まれた活性領域20を有する構成になっている。上記半
導体レーザ装置の製造を図8に基づいて説明する。な
お、本製造では結晶成長にMOCVD法を使用した。
The semiconductor laser device has a first conductivity type (00
1) A plane-type GaAs substrate 1 has a first-conductivity-type buried layer 22 and a second-conductivity-type buried layer 23, which are sequentially stacked with a predetermined width left, and has a crystal orientation [0
[11] B plane extending in the [11] direction is a slope, and a V-shaped groove shape 24 having a (001) plane as a bottom surface and an upper surface is provided and embedded on the bottom of this V-shaped groove shape. It is configured to have an active region 20 that is formed. The manufacture of the semiconductor laser device will be described with reference to FIG. In this production, the MOCVD method was used for crystal growth.

【0026】まず、(001)面GaAs基板上1にS
iO2膜を1000Å堆積させ、フォトリソグラフィに
より[011]方向に延びた幅3μmのストライプ21
を形成する(図8(a))。この基板上にストライプ状
のSiO2膜をマスクとして、MgドープGaAsから
なる厚さ0.1μmの第一埋め込み層22およびSeド
ープAl0.4Ga0.6Asからなる厚さ1.2μmの第二
埋め込み層23を成長させる。MOCVD法では成長速
度に異方性があり、通常(001)面上で成長する成長
条件では(111)B面上には成長しないため、SiO
2膜11上の(111)方向への成長は起こらず、Si
2膜の両端を斜面の起点とした、(111)B面を斜
面とするV字型の溝形状が得られる(図8(b))。
First, S is formed on a (001) plane GaAs substrate 1.
A stripe 21 having a width of 3 μm was formed by depositing 1000 liters of an iO 2 film and extending in the [011] direction by photolithography.
Are formed (FIG. 8A). A 0.1 μm thick first burying layer 22 made of Mg-doped GaAs and a second burying layer 1.2 μm thick made of Se-doped Al 0.4 Ga 0.6 As were formed on this substrate by using a stripe-shaped SiO 2 film as a mask. Grow 23. In the MOCVD method, the growth rate has anisotropy, and under normal growth conditions for growing on the (001) plane, it does not grow on the (111) B plane.
2 Growth in the (111) direction on the film 11 does not occur, and Si
A V-shaped groove shape is obtained in which the both ends of the O 2 film are the starting points of the slope and the (111) B plane is the slope (FIG. 8B).

【0027】そして、ストライプ状に延びたSiO2
をエッチングで除去した後、再び(001)面上でのみ
成長する成長条件で、SeドープAl0.6Ga0.4Asか
らなる厚さ1μmのクラッド層2、アンドープAl0.3
Ga0.7Asからなる厚さ0.1μmの光導波層3、アン
ドープGaAsからなる厚さ0.01μmの量子井戸活
性層4、アンドープAl0.3Ga0.4Asからなる厚さ
0.1μmの光導波層3、MgドープAl0.6Ga0.4
sからなる厚さ1μmのクラッド層5、MgドープGa
Asからなる厚さ0.1μmのキャップ層6を順次積層
する(図8(c))。この場合も(111)B面上で
(111)方向への成長は行われず、(001)面上で
(001)方向に成長するため、V字型の溝24に活性
領域が埋め込まれる。
After the SiO 2 film extending in a stripe shape is removed by etching, the cladding layer 2 made of Se-doped Al 0.6 Ga 0.4 As and having a thickness of 1 μm is grown under the growth condition of growing only on the (001) plane. , Undoped Al 0.3
An optical waveguide layer 3 made of Ga 0.7 As and having a thickness of 0.1 μm, a quantum well active layer 4 made of undoped GaAs and having a thickness of 0.01 μm, and an optical waveguide layer 3 made of undoped Al 0.3 Ga 0.4 As and having a thickness of 0.1 μm. , Mg-doped Al 0.6 Ga 0.4 A
1 μm thick clad layer 5 made of s, Mg-doped Ga
A cap layer 6 made of As and having a thickness of 0.1 μm is sequentially laminated (FIG. 8C). In this case as well, the growth in the (111) direction is not performed on the (111) B surface, but the growth is performed in the (001) direction on the (001) surface, so that the V-shaped groove 24 is filled with the active region.

【0028】ここに挙げた構造では、第二埋め込み層2
3のAlAs混晶比を光導波層3のAlAs混晶比より
も高くしているため、第二埋め込み層23の屈折率は低
く、溝内の光導波を伝搬する光が横方向にも閉じ込めら
れる屈折率導波構造となる。この試料上にSi34膜7
を堆積させ、フォトリソグラフィによって溝部のSi3
4膜を除去した後、p側電極8とn側電極9を蒸着す
る。
In the structure described here, the second buried layer 2
Since the AlAs mixed crystal ratio of No. 3 is higher than the AlAs mixed crystal ratio of the optical waveguide layer 3, the refractive index of the second buried layer 23 is low, and the light propagating in the optical waveguide in the groove is also confined laterally. It is a refractive index guiding structure that can be used. A Si 3 N 4 film 7 is formed on this sample.
And deposit Si 3 on the groove by photolithography.
After removing the N 4 film, the p-side electrode 8 and the n-side electrode 9 are vapor-deposited.

【0029】本実施例によれば、溝部のキャップ層6か
ら注入された電流は、活性領域20に流れ込む有効電流
とV字型の溝の側面の第二埋め込み層23に流れる漏れ
電流との成分が生じるが、n型の第二埋め込み層23と
p型のクラッド層2のAlAs混晶比が高く、活性領域
20に比べターンオンボルテージが高いために、n型埋
め込み層とp型クラッド層で形成されるp−n接合によ
り第二埋め込み層23への電流は流れにくくなり、効率
的に活性領域20に電流が注入される。また埋め込み層
22,23と基板の間でn−p−n構造となっているた
めに、溝部以外を通過する電流は抑制される。
According to the present embodiment, the current injected from the cap layer 6 in the groove is a component of the effective current flowing into the active region 20 and the leakage current flowing in the second buried layer 23 on the side surface of the V-shaped groove. However, since the AlAs mixed crystal ratio of the n-type second buried layer 23 and the p-type clad layer 2 is high and the turn-on voltage is higher than that of the active region 20, the n-type buried layer and the p-type clad layer are formed. Due to the formed pn junction, it becomes difficult for the current to flow into the second buried layer 23, and the current is efficiently injected into the active region 20. Further, because of the npn structure between the buried layers 22 and 23 and the substrate, the current passing through other than the groove is suppressed.

【0030】次に本発明の第4の実施例を説明する。図
9は本発明が適用された多ビーム半導体レーザの断面構
造を示している。n型GaAs基板上にSiO2膜を1
000Å堆積させ、フォトリソグラフィにより[01
1]方向に延びた幅3μmの複数のストライプを10μ
m間隔で形成する。その後、第3の実施例と同様の結晶
成長を行うことによって複数のV字型の溝24a,24
bに活性領域20が埋め込まれる。次に全面にSi34
膜を堆積させ、フォトリソグラフィによって溝部のSi
34膜を除去する。その後p側電極を蒸着した後、エッ
チングあるいはリフトオフによって活性領域間の電極を
除去し、n側電極を蒸着する。これにより、一つの半導
体レーザチップ上に個別にアドレス可能な多ビーム半導
体レーザが作製される。
Next, a fourth embodiment of the present invention will be described. FIG. 9 shows a sectional structure of a multi-beam semiconductor laser to which the present invention is applied. 1 SiO 2 film on n-type GaAs substrate
000Å deposit and photolithography [01
1] direction, a plurality of stripes with a width of 3 μm
It is formed at m intervals. After that, crystal growth similar to that of the third embodiment is performed to form a plurality of V-shaped grooves 24a and 24a.
The active region 20 is embedded in b. Next, Si 3 N 4 on the entire surface
The film is deposited and the Si of the groove is formed by photolithography.
The 3 N 4 film is removed. After that, the p-side electrode is vapor-deposited, the electrodes between the active regions are removed by etching or lift-off, and the n-side electrode is vapor-deposited. Thus, individually addressable multi-beam semiconductor lasers are manufactured on one semiconductor laser chip.

【0031】[0031]

【発明の効果】本発明によれば、リッジ及び溝における
活性領域の幅や活性層の厚さを精密に制御することが可
能であるため、低しきい値でかつ安定な横モードを得る
ことができる。また、活性領域以外に活性層が形成され
ていないか、もしくは活性領域以外の活性層への電流の
通路がないため、レーザの誘導放出に寄与しない漏れ電
流が抑制できる。
According to the present invention, since the width of the active region and the thickness of the active layer in the ridge and the groove can be precisely controlled, it is possible to obtain a stable lateral mode with a low threshold value. You can In addition, since the active layer is not formed in regions other than the active region or there is no current path to the active layer in regions other than the active region, leakage current that does not contribute to stimulated emission of laser can be suppressed.

【図面の簡単な説明】[Brief description of drawings]

【図1】 本発明の第1の実施例である半導体レーザ装
置の断面図である。
FIG. 1 is a sectional view of a semiconductor laser device according to a first embodiment of the present invention.

【図2】 第1の実施例の半導体レーザ装置の製造手順
を示す断面図である。
FIG. 2 is a cross-sectional view showing the manufacturing procedure of the semiconductor laser device of the first embodiment.

【図3】 図2に続く製造手順を示す断面図である。FIG. 3 is a cross-sectional view showing the manufacturing procedure following FIG.

【図4】 第1の実施例の半導体レーザ装置の他の製造
手順を示す断面図である。
FIG. 4 is a cross-sectional view showing another manufacturing procedure of the semiconductor laser device of the first embodiment.

【図5】 図4に続く製造手順を示す断面図である。FIG. 5 is a cross-sectional view showing the manufacturing procedure following FIG.

【図6】 本発明の第2の実施例である多ビーム半導体
レーザ装置の断面図である。
FIG. 6 is a sectional view of a multi-beam semiconductor laser device according to a second embodiment of the present invention.

【図7】 本発明の第3の実施例である半導体レーザ装
置の断面図である。
FIG. 7 is a sectional view of a semiconductor laser device according to a third embodiment of the present invention.

【図8】 第3の実施例の半導体レーザ装置の製造手順
を示す断面図である。
FIG. 8 is a cross-sectional view showing the manufacturing procedure of the semiconductor laser device according to the third embodiment.

【図9】 本発明の第4の実施例である多ビーム半導体
レーザの断面図である。
FIG. 9 is a sectional view of a multi-beam semiconductor laser according to a fourth embodiment of the present invention.

【符号の説明】[Explanation of symbols]

1 n型GaAs基板、2 n型SeドープAI0.6
0.4Asクラッド層、3 アンドープAI0.3Ga0.4
As光導波層、4 アンドープGaAs量子井戸活性
層、5 p型MgドープAI0.6Ga0.4Asクラッド
層、6 p型MgドープGaAsキャップ層、7 Si
34膜、8 p側電極、9 n側電極、10プロトン注
入領域、11 Zn拡散領域、20 活性領域、21
SiO2膜 22 MgドープGaAs(第2埋め込み層)、23
SeドープAl0.4Ga0 .6As埋め込み層(第2埋め込
み層)
1 n-type GaAs substrate, 2 n-type Se-doped AI 0.6 G
a 0.4 As clad layer, 3 undoped AI 0.3 Ga 0.4
As optical waveguide layer, 4 undoped GaAs quantum well active layer, 5 p-type Mg-doped AI 0.6 Ga 0.4 As clad layer, 6 p-type Mg-doped GaAs cap layer, 7 Si
3 N 4 film, 8 p-side electrode, 9 n-side electrode, 10 proton injection region, 11 Zn diffusion region, 20 active region, 21
SiO 2 film 22 Mg-doped GaAs (second buried layer), 23
Se doped Al 0.4 Ga 0 .6 As buried layer (second buried layer)

Claims (6)

【特許請求の範囲】[Claims] 【請求項1】 第一導電型GaAs基板の結晶方位に対
して[011]方向に伸びたストライプ状の(111)
A面の斜面を有する(001)面基板上に成長させた、
第一導電型クラッド層と第二導電型クラッド層との間に
光導波層により挟まれた活性層が設けられた半導体レー
ザ装置において、 前記光導波層と該光導波層により挟まれた活性領域とが
前記(001)面基板の(111)A面の斜面上に埋め
込まれていることを特徴とする半導体レーザ装置。
1. A stripe-shaped (111) extending in the [011] direction with respect to the crystal orientation of the first conductivity type GaAs substrate.
Grown on a (001) plane substrate having a slope of plane A,
In a semiconductor laser device having an active layer sandwiched between optical waveguide layers between a first conductivity type cladding layer and a second conductivity type cladding layer, the optical waveguide layer and an active region sandwiched between the optical waveguide layers. Are embedded on the slope of the (111) A plane of the (001) plane substrate.
【請求項2】 第一導電型GaAs基板は(111)A
面を挟んで一方側の(001)面の表面を不純物拡散に
より第二導電型とし、他方側の(001)面上に第二導
電型半導体層が形成されていることを特徴とする請求項
1記載の半導体レーザ装置。
2. The first conductivity type GaAs substrate is (111) A.
7. A surface of a (001) surface on one side of the surface is made to have a second conductivity type by impurity diffusion, and a second conductivity type semiconductor layer is formed on the (001) surface of the other side. 1. The semiconductor laser device according to 1.
【請求項3】 第一導電型GaAs基板は(111)A
面の斜面と(001)面からなる複数のストライプ状の
凸部を有し、前記複数の(111)A面の斜面上に活性
領域が埋め込まれていることを特徴とする請求項1記載
の半導体レーザ装置。
3. The first conductivity type GaAs substrate is (111) A.
2. The active region is embedded on the plurality of (111) A plane slopes, which has a plurality of stripe-shaped convex portions composed of a surface slope and a (001) plane. Semiconductor laser device.
【請求項4】 第一導電型(001)面GaAs基板上
に、所定幅を残して順次積層された第二導電型埋め込み
層と第一導電型埋め込み層を有し、前記GaAs基板の
結晶方位に対して[011]方向に伸びたストライプ状
の(111)B面を斜面とし、(001)面を底面及び
上面としたV字型の溝形状が形成され、該V字型の溝形
状の底部上に活性領域が埋め込まれていることを特徴と
する半導体レーザ装置。
4. A first conductivity type (001) plane GaAs substrate having a second conductivity type buried layer and a first conductivity type buried layer, which are sequentially stacked with a predetermined width left, and a crystal orientation of the GaAs substrate. On the other hand, a stripe-shaped (111) B surface extending in the [011] direction is a slope, and a V-shaped groove shape having a (001) surface as a bottom surface and an upper surface is formed. A semiconductor laser device having an active region embedded on the bottom.
【請求項5】 第一導電型(001)面GaAs基板上
に形成されたV字型の溝形状の底部上に埋め込まれた活
性層を有し、前記V字型の溝形状の側面が前記活性領域
の光導波層よりも低い屈折率を持つ半導体層からなるこ
とを特徴とする請求項4記載の半導体レーザ装置。
5. An active layer embedded on the bottom of a V-shaped groove formed on a GaAs substrate of the first conductivity type (001) surface, wherein the side surface of the V-shaped groove has the side surface. 5. The semiconductor laser device according to claim 4, wherein the semiconductor laser device comprises a semiconductor layer having a refractive index lower than that of the optical waveguide layer in the active region.
【請求項6】 第一導電型(001)面GaAs基板は
ストライプ状の(111)B面を斜面とし(001)面
を底面及び上面とする複数のV字型の溝形状を有し、前
記複数のV字型の溝形状の底部上に活性領域が埋め込ま
れていることを特徴とする請求項4記載の半導体レーザ
装置。
6. A first-conductivity-type (001) -plane GaAs substrate has a plurality of V-shaped groove shapes in which a striped (111) B plane is a slope and a (001) plane is a bottom surface and an upper surface. The semiconductor laser device according to claim 4, wherein an active region is embedded on the bottoms of the plurality of V-shaped grooves.
JP15653292A 1992-06-16 1992-06-16 Semiconductor laser Pending JPH065969A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15653292A JPH065969A (en) 1992-06-16 1992-06-16 Semiconductor laser

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15653292A JPH065969A (en) 1992-06-16 1992-06-16 Semiconductor laser

Publications (1)

Publication Number Publication Date
JPH065969A true JPH065969A (en) 1994-01-14

Family

ID=15629855

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15653292A Pending JPH065969A (en) 1992-06-16 1992-06-16 Semiconductor laser

Country Status (1)

Country Link
JP (1) JPH065969A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002280674A (en) * 2001-03-19 2002-09-27 Toshiba Corp Semiconductor light emitting device and its manufacturing method
US7911188B2 (en) 2005-06-24 2011-03-22 Mitsubishi Electric Corporation Power generation control apparatus of a rotating electrical machine for a vehicle
DE112017005117T5 (en) 2016-10-06 2019-06-27 Toyota Jidosha Kabushiki Kaisha Vehicle seat device and air pressure control method for a vehicle seat

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002280674A (en) * 2001-03-19 2002-09-27 Toshiba Corp Semiconductor light emitting device and its manufacturing method
US7911188B2 (en) 2005-06-24 2011-03-22 Mitsubishi Electric Corporation Power generation control apparatus of a rotating electrical machine for a vehicle
DE112017005117T5 (en) 2016-10-06 2019-06-27 Toyota Jidosha Kabushiki Kaisha Vehicle seat device and air pressure control method for a vehicle seat

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