JPH0656941B2 - Ladder type piezoelectric filter with improved group delay characteristics - Google Patents

Ladder type piezoelectric filter with improved group delay characteristics

Info

Publication number
JPH0656941B2
JPH0656941B2 JP59121023A JP12102384A JPH0656941B2 JP H0656941 B2 JPH0656941 B2 JP H0656941B2 JP 59121023 A JP59121023 A JP 59121023A JP 12102384 A JP12102384 A JP 12102384A JP H0656941 B2 JPH0656941 B2 JP H0656941B2
Authority
JP
Japan
Prior art keywords
resistor
ladder
group delay
type piezoelectric
piezoelectric filter
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP59121023A
Other languages
Japanese (ja)
Other versions
JPS60264113A (en
Inventor
二郎 井上
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Murata Manufacturing Co Ltd
Original Assignee
Murata Manufacturing Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Murata Manufacturing Co Ltd filed Critical Murata Manufacturing Co Ltd
Priority to JP59121023A priority Critical patent/JPH0656941B2/en
Priority to US06/711,210 priority patent/US4651109A/en
Priority to CA000476871A priority patent/CA1231398A/en
Priority to DE19853520895 priority patent/DE3520895A1/en
Publication of JPS60264113A publication Critical patent/JPS60264113A/en
Priority to US06/887,925 priority patent/US4716377A/en
Publication of JPH0656941B2 publication Critical patent/JPH0656941B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03HIMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H9/00Networks comprising electromechanical or electro-acoustic devices; Electromechanical resonators
    • H03H9/46Filters
    • H03H9/54Filters comprising resonators of piezoelectric or electrostrictive material
    • H03H9/58Multiple crystal filters
    • H03H9/60Electric coupling means therefor
    • H03H9/605Electric coupling means therefor consisting of a ladder configuration
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03HIMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H9/00Networks comprising electromechanical or electro-acoustic devices; Electromechanical resonators
    • H03H9/02Details
    • H03H9/05Holders; Supports
    • H03H9/10Mounting in enclosures
    • H03H9/1007Mounting in enclosures for bulk acoustic wave [BAW] devices
    • H03H9/1014Mounting in enclosures for bulk acoustic wave [BAW] devices the enclosure being defined by a frame built on a substrate and a cap, the frame having no mechanical contact with the BAW device
    • H03H9/1028Mounting in enclosures for bulk acoustic wave [BAW] devices the enclosure being defined by a frame built on a substrate and a cap, the frame having no mechanical contact with the BAW device the BAW device being held between spring terminals

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  • Physics & Mathematics (AREA)
  • Acoustics & Sound (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Piezo-Electric Or Mechanical Vibrators, Or Delay Or Filter Circuits (AREA)

Description

【発明の詳細な説明】 (産業上の利用分野) この発明は、群遅延特性が良くしかも低損失のラダー型
圧電フイルタに関する。
Description: TECHNICAL FIELD The present invention relates to a ladder-type piezoelectric filter having good group delay characteristics and low loss.

(従来技術) 圧電フイルタやFM/PM復調回路に用いられるセラミ
ツクデイスクリミネータなどの圧電共振部品の群遅延特
性を改善するには、従来は、低Qm の圧電材料を用いた
り、弾性ゴムシートを用いて機械的にダンピングしてい
た。このような対策を施すと位相の直線性が良くなる
が、第2図に示すように、圧電共振子の等価回路におけ
る等価抵抗Re を増すことに相当し、フイルタの場合、
挿入損失が増大しS/N比が悪化する欠点を有する。こ
の様子を第3図と第4図に示す。すなわち第3図は、群
遅延特性が改善されていない一例を示し、第4図は改善
されたものの挿入損失が増加した一例を示す。この傾向
は、ラダー型フイルタ、面積振動や長さ振動の単一モー
ドを利用するいわゆる三端子型フイルタ、エネルギー閉
じ込め型二重モードフイルタなどにみられる。
(Prior Art) In order to improve group delay characteristics of piezoelectric resonant components such as a piezoelectric filter and a ceramic discriminator used in an FM / PM demodulation circuit, conventionally, a low Qm piezoelectric material is used or an elastic rubber sheet is used. It was used for mechanical damping. If such a measure is taken, the linearity of the phase is improved, but as shown in FIG. 2, this is equivalent to increasing the equivalent resistance Re in the equivalent circuit of the piezoelectric resonator. In the case of the filter,
It has a drawback that the insertion loss increases and the S / N ratio deteriorates. This state is shown in FIGS. 3 and 4. That is, FIG. 3 shows an example in which the group delay characteristics are not improved, and FIG. 4 shows an example in which the insertion loss is increased although the group delay characteristics are improved. This tendency is seen in ladder type filters, so-called three-terminal type filters that use a single mode of area vibration and length vibration, and energy trapping dual mode filters.

近年、自動車電話が普及してきているが、FM変調方式
なので群遅延特性が良好でしかも挿入損失の小さいフイ
ルタが要求されている。また、これに限らず、AMステ
レオ受信用フイルタや、フイルタのみならず、FM/P
M復調回路に用いられるエラミツクデイスクリミネータ
でも同様な特性が求められている。
In recent years, car telephones have become widespread, but a filter having good group delay characteristics and small insertion loss is required because it is an FM modulation system. Further, the present invention is not limited to this, and is not limited to the AM stereo reception filter and the FM / P filter.
Similar characteristics are required for the elastic discriminator used in the M demodulation circuit.

(発明の目的) この発明の目的は、群遅延特性が平坦で、いいかえると
位相特性が直線的で、かつ挿入損失の少ないラダー型圧
電フイルタを提供することである。
(Object of the Invention) An object of the present invention is to provide a ladder-type piezoelectric filter having a flat group delay characteristic, in other words a linear phase characteristic, and a small insertion loss.

すなわち、この発明は、直列共振子と並列共振子とが交
互に接続されてなるラダー型圧電フイルタにおいて、直
列共振子と並列に第1の抵抗体が、並列共振子と直列に
第2の抵抗体が、それぞれ接続されてなるラダー型圧電
フイルタである。
That is, according to the present invention, in a ladder-type piezoelectric filter in which a series resonator and a parallel resonator are alternately connected, a first resistor is provided in parallel with the series resonator and a second resistor is provided in series with the parallel resonator. This is a ladder-type piezoelectric filter in which the bodies are connected together.

(実施例) 以下にこの発明の実施例について図面を参照しながら説
明する。
(Embodiment) An embodiment of the present invention will be described below with reference to the drawings.

第1図は第1の実施例の回路図であり、この第1の実施
例は、 n− 0.5段のラダー型フイルタにこの発明を適用
したものである。直列共振子XS1、XS2、…、XSnにそ
れぞれ並列抵抗RS1,RS2、…、RSnを接続し、並列共
振子XP1、XP2、…、XP(n-1)にそれぞれ直列抵抗
P1、RP2、…、RP(n-1)を接続する。図示例では各共
振子に必ず直列あるいは並列に抵抗が接続されている
が、これに限らず必要な部分にのみ抵抗を接続するだけ
でもよい。また、直列抵抗RP1、RP2、…、RP(n-1)
挿入位置は図示例では並列共振子XP1、XP2、…、X
P(n-1)のアース側であるが、ホツト側に挿入してもよ
い。
FIG. 1 is a circuit diagram of the first embodiment, and the first embodiment is an application of the present invention to an n-0.5 stage ladder type filter. Series resonator X S1, X S2, ..., parallel resistance R S1 each X Sn, R S2, ..., connected to R Sn, parallel resonators X P1, X P2, ..., the X P (n-1) Series resistors R P1 , R P2 , ..., R P (n-1) are connected to each other. In the illustrated example, the resistors are always connected in series or in parallel to each resonator, but the present invention is not limited to this, and the resistors may be connected only to necessary portions. Further, the insertion positions of the series resistors R P1 , R P2 , ..., R P (n-1) are parallel resonators X P1 , X P2 , ..., X in the illustrated example.
Although it is the ground side of P (n-1) , it may be inserted in the hot side.

このような構成にすると、直列共振子XS1、XS2、…、
Snの反共振周波数faにおけるインピーダンスおよび
位相変化が、それぞれ第5図、第6図に示すように実線
状態(抵抗接続前)から破線状態(抵抗接続後)へと変
化する。同様に、並列共子XP1、XP2、…、XP(n-1)
共振周波数frにおけるインピーダンスおよび位相変化
がそれぞれ第7図、第8図に示すように実線状態(抵抗
挿入前)から破線状態(抵抗挿入後)へと変化する。つ
まり、直列共振子XS1、XS2、…、XSnの反共振周波数
faにおけるインピーダンスおよび位相変化、ならび
に、並列共振子XP1、XP2、…、XP(n-1)の共振周波数
frにおけるインピーダンスおよび位相変化が急峻状態
から緩慢状態になる。これは、第9図に示す、フイルタ
の位相特性において位相変化が直線的になることを意味
し、いいかえると、第10図に示すように、実線状態(抵
抗接続、挿入前)から破線状態(抵抗接続、挿入後)へ
と変化、つまり、群遅延時間が一定になることを意味す
る。ここで注目すべきは、直列共振子に並列に抵抗(第
1の抵抗)を接続し、並列共振子に直列に抵抗(第2の
抵抗)を挿入したので、フィルタの高周波側と低周波側
それぞれの減衰極近傍のみで共振が抑制されてQが低下
し、中心周波数(f0)近傍はQが変化しないので、フ
イルタの挿入損失が多くならずに群遅延時間特性を向上
できた点である。
With such a configuration, the series resonators X S1 , X S2 , ...
The impedance and phase change of X Sn at the anti-resonance frequency fa change from the solid line state (before resistance connection) to the broken line state (after resistance connection) as shown in FIGS. 5 and 6, respectively. Similarly, the impedance and the phase change of the parallel coaxes X P1 , X P2 , ..., X P (n-1) at the resonance frequency fr are as shown by solid lines (before the resistance is inserted) as shown in FIGS. 7 and 8, respectively. Changes to the broken line state (after inserting the resistor). That is, the impedance and phase change of the series resonators X S1 , X S2 , ..., X Sn at the antiresonance frequency fa, and the resonance frequency fr of the parallel resonators X P1 , X P2 , ..., X P (n-1). The impedance and phase changes in the state change from the steep state to the slow state. This means that the phase change becomes linear in the phase characteristic of the filter shown in FIG. 9. In other words, as shown in FIG. 10, the solid line state (resistive connection, before insertion) to the broken line state ( Resistance connection, after insertion), that is, the group delay time becomes constant. It should be noted that the resistor (first resistor) was connected in parallel to the series resonator and the resistor (second resistor) was inserted in series in the parallel resonator, so that the high frequency side and the low frequency side of the filter were Resonance is suppressed only in the vicinity of each attenuation pole, and Q is reduced, and Q does not change in the vicinity of the center frequency (f 0 ), so that the group delay time characteristic can be improved without increasing the insertion loss of the filter. is there.

なお、抵抗値が適正範囲外だと抵抗接続、挿入前と比べ
さほど差がでなかったり、逆に第10図に一点鎖線で示す
ように上に凸の状態になってしまう。また、抵抗接続、
挿入によって、その抵抗値次第では、シエープフアクタ
の悪化や最大減衰量の低下といった弊害もでてくるので
抵抗値はユーザーの要求に従ってケースバイケースで設
定される。
If the resistance value is out of the proper range, there is not much difference compared to before resistance connection and insertion, or conversely, it will be in a state of being convex upward as shown by a dashed line in FIG. Also, resistance connection,
Depending on the resistance value, depending on the resistance value, the adverse effects such as deterioration of the shape factor and reduction of the maximum attenuation may occur, so the resistance value is set on a case-by-case basis according to the user's request.

つまり、このようなラダー型フイルタにおいては、一般
に、ユーザーから要求されるフイルタ特性を満足するよ
うに、共振子と抵抗の組合せが選択される。この組合せ
は、種々の共振子と抵抗の組合せをシユミレーシヨン
し、最も、要求特性に近いものが選択されるという方法
で決定される。参考までに第11図のような特性をもつ従
来構造のものにこの発明を実施した例を第12図〜14図に
示す。なお、この従来構造のものは、実開昭56−31
718号の第1図に示す様な構造を有する。第12図は並
列抵抗(第1の抵抗)RS1、RS2、…、RSn=150kΩ、
直列抵抗(第2の抵抗)RP1、RP2、…、RP(n-1)=60
Ωの例、第13図は、並列抵抗(第1の抵抗)RS1
S2、…、RSn=50kΩ、直列抵抗(第2の抵抗)
P1、RP2、…、RP(n-1)= 200Ωの例、第14図は、並
列抵抗(第1の抵抗)RS1、RS2、…、RSn= 15kΩ、
直列抵抗(第2の抵抗)RP1、RP2、…、RP(n-1)= 6
00Ωの例を示す。
That is, in such a ladder type filter, generally, a combination of the resonator and the resistor is selected so as to satisfy the filter characteristics required by the user. This combination is determined by simulating various combinations of resonators and resistors, and selecting the one that most closely matches the required characteristics. For reference, FIGS. 12 to 14 show examples in which the present invention is applied to a conventional structure having the characteristics shown in FIG. In addition, this conventional structure has a practical construction of 56-31.
718 has a structure as shown in FIG. FIG. 12 shows parallel resistors (first resistors) R S1 , R S2 , ..., R Sn = 150 kΩ,
Series resistance (second resistance) R P1 , R P2 , ..., R P (n-1) = 60
Ω example, FIG. 13 shows parallel resistance (first resistance) R S1 ,
R S2 , ..., R Sn = 50 kΩ, series resistance (second resistance)
An example of R P1 , R P2 , ..., R P (n-1) = 200Ω, and FIG. 14 shows parallel resistances (first resistances) R S1 , R S2 , ..., R Sn = 15 kΩ,
Series resistance (second resistance) R P1 , R P2 , ..., R P (n-1) = 6
An example of 00Ω is shown.

なお、これらの第11図ないし第14図において、実線
は、振幅特性を、破線は、その一部を拡大して示す振幅
特性を、一点鎖線は、群遅延時間を各々示す。実線で示
す振幅特性は、図中の広い周波数目盛に対応した減衰量
を、図中の大きい減衰量目盛で示し、破線で示す振幅特
性は、実線で示す振幅特性の一部を拡大して示し、その
減衰量を、図中の狭い周波数目盛と小さい減衰量目盛で
示している。また、一点鎖線で示す群遅延時間は、図中
の狭い周波数範囲に対応した群遅延時間を示すものであ
る。
11 to 14, a solid line indicates an amplitude characteristic, a broken line indicates an enlarged amplitude characteristic of a part thereof, and a dashed-dotted line indicates a group delay time. The amplitude characteristic indicated by the solid line shows the attenuation amount corresponding to the wide frequency scale in the figure, and the large attenuation amount scale in the figure shows the amplitude characteristic, and the amplitude characteristic indicated by the broken line shows a part of the amplitude characteristic shown by the solid line in enlarged form. The attenuation amount is shown by a narrow frequency scale and a small attenuation scale in the figure. The group delay time indicated by the one-dot chain line indicates the group delay time corresponding to the narrow frequency range in the figure.

このような各実施例において、抵抗を製品中に具現する
にはいろいろな構造が考えられるが以下に数例をあげ
る。
In each of these embodiments, various structures are conceivable for embodying the resistance in the product, but some examples will be given below.

エネルギー閉じ込め型の場合は圧電板上のあきスペース
に抵抗膜を形成するのがよい。あるいは圧電板をとりつ
けた基板に抵抗膜を形成してもよい。非エネルギー閉じ
込め型の場合は、圧電板の振動ノード部分、たとえば角
板の拡がり振動モードの場合は辺中央において対向電極
間を抵抗膜で接続することにより、直列共振子に並列接
続する第1の抵抗を具現できる。並列共振子に直列に挿
入する第2の抵抗は圧電板の振動電極膜を抵抗性のもの
で形成することが考えられる。また、圧電板に設けた振
動電極膜に圧接されて振動電極膜と外部との接続および
圧電共振子の保持のための端子板自体を抵抗性のもので
形成してもよい。ラダー型フイルタの場合、ケースのベ
ース部分の内表面や外表面上に接続パターンを形成して
ラダー構成を実現しているものがあるが、このようなも
のでは、単体の抵抗部品(チップ型が好適)をパターン
に実装したり接続パターンとともに抵抗膜も構成しても
よい。また、ラダー型フイルタの一構造としてケース内
に収容した圧電共振子、端子板、絶縁スペーサ、バネ板
などがとび出さないようケース開口部を覆う押え板に上
述のようにチップ抵抗を用いたり抵抗パターンを構成し
てもよい。以下にこの具体例を述べる。第15図は 3.5段
のラダー型フイルタを示す。このフイルタのケース内部
の状況を概略平面図として第16図に示す。なお、図示例
は見やすくするために内部部品を間隔をおいて図示した
し、図示を省略した部分もある。図において、10はケー
ス、11は各種端子板、12は絶縁板である。直列共振子X
S1とXS2、XS2とXS3、XS3とXS4とを接続する端子板
は連結部分11a とともに一体形成されたものである。入
力ピンP11と隣接の端子板11とが接続され、出力ピンP
21と隣接の端子板11とが接続されている。押え板13には
抵抗膜または抵抗部品RS1〜RS4、RP1〜RP3とこれら
を接続する導電膜ないしターミナル電極膜が設けられて
いる。このような押え板13でケース10の開口部を覆い、
直列共振子XS1の両側に存在する端子板11、11と抵抗
(第1の抵抗)RS1の両端電極とを接続する。同様に直
列共振子XS2の両端に存在する端子板11,11と抵抗(第
1の抵抗)RS2の両端電極とを接続し、直列共振子XS3
の両端に存在する端子板11、11と抵抗(第1の抵抗)R
S3の両端電極を接続し、直列共振子XS4の両端に存在す
る端子板11、11と抵抗R(第1の抵抗)S4の両端電極を
接続する。抵抗R(第2の抵抗)P1〜RP3の各一端側を
連結する導電パターンの両端を入力側アースピンP12
出力側アースピンP22にそれぞれ接続する。また、抵抗
P1の非アース側電極と並列共振子XP1のアース側端子
板11とを接続する。同様に、抵抗RP2の非アース側電極
と並列共振子XP2のアース側端子板11とを接続し、抵抗
P3の非アース側電極と並列共振子XP3のアース側端子
板11とを接続すると第15図のような結線状態になる。次
に、入力ピンP11、出力ピンP21と関係端子板との接続
作業を容易にしたり、入力側アースピンP12、出力側ア
ースピンP22と押え板の導電パターンとの接続作業を容
易にしたり、連結部分11a をもつ端子板を不要とした押
え板14を第18図に示す。
In the case of the energy trapping type, it is preferable to form a resistance film in the open space on the piezoelectric plate. Alternatively, the resistance film may be formed on the substrate to which the piezoelectric plate is attached. In the case of the non-energy confinement type, by connecting the opposing electrodes with a resistance film at the vibration node portion of the piezoelectric plate, for example, in the center of the side in the spreading vibration mode of the rectangular plate, the first resonator is connected in parallel with the series resonator. It can realize resistance. It is conceivable that the second resistor inserted in series with the parallel resonator is formed of a resistive vibrating electrode film of the piezoelectric plate. Alternatively, the terminal plate itself, which is pressed against the vibrating electrode film provided on the piezoelectric plate to connect the vibrating electrode film to the outside and holds the piezoelectric resonator, may be made of a resistive material. In the case of a ladder type filter, there are some which realize a ladder structure by forming a connection pattern on the inner surface or the outer surface of the base portion of the case. (Preferably) may be mounted on a pattern, or a resistive film may be configured together with the connection pattern. Also, as one structure of the ladder type filter, the chip resistor or the resistor is used for the holding plate that covers the case opening so that the piezoelectric resonator, terminal plate, insulating spacer, spring plate, etc. housed in the case do not protrude. You may comprise a pattern. A specific example of this will be described below. Figure 15 shows a 3.5-stage ladder type filter. The inside of the case of this filter is shown in FIG. 16 as a schematic plan view. It should be noted that in the illustrated example, internal parts are illustrated with a space therebetween for the sake of clarity, and some parts are not shown. In the figure, 10 is a case, 11 is various terminal plates, and 12 is an insulating plate. Series resonator X
The terminal plates connecting S1 and X S2 , X S2 and X S3 , and X S3 and X S4 are integrally formed with the connecting portion 11a. The input pin P 11 and the adjacent terminal board 11 are connected, and the output pin P 11
21 and the adjacent terminal board 11 are connected. The holding plate 13 is provided with a resistance film or resistance components R S1 to R S4 , R P1 to R P3 and a conductive film or a terminal electrode film connecting these. Cover the opening of the case 10 with such a holding plate 13,
The terminal plates 11, 11 existing on both sides of the series resonator X S1 are connected to both electrodes of the resistor (first resistor) R S1 . Similarly, the terminal plates 11 and 11 existing at both ends of the series resonator X S2 are connected to both electrodes of the resistor (first resistor) R S2 , and the series resonator X S3 is connected.
Terminal plates 11 and 11 present at both ends of the and resistance (first resistance) R
The electrodes of both ends of S3 are connected, and the terminal plates 11, 11 present at both ends of the series resonator X S4 are connected to the electrodes of both ends of the resistor R (first resistor) S4 . Both ends of the conductive pattern connecting the respective one ends of the resistors R (second resistors) P1 to R P3 are connected to the input side ground pin P 12 and the output side ground pin P 22 , respectively. Further, the non-earth side electrode of the resistor R P1 and the earth side terminal plate 11 of the parallel resonator X P1 are connected. Similarly, the non-ground side electrode of the resistor R P2 and the ground side terminal plate 11 of the parallel resonator X P2 are connected, and the non-ground side electrode of the resistor R P3 and the ground side terminal plate 11 of the parallel resonator X P3 are connected. When connected, the wiring will be as shown in Fig. 15. Next, it is easy to connect the input pin P 11 and the output pin P 21 to the related terminal board, and to easily connect the input side ground pin P 12 and the output side ground pin P 22 to the conductive pattern of the holding plate. FIG. 18 shows a holding plate 14 that does not require a terminal plate having a connecting portion 11a.

つまり、端子板11の連結部分に代わる導電膜15が設けら
れるとともにピンP11、P12、P21、P22まで延設され
た導電パターンが特徴となっている。なお、各ピン
11、P12、P21、P22や各端子板11の接続部分が挿通
される孔が設けられているが、孔に限らずスリットだっ
たり辺部分から凹んだ切欠きであってもよい。また、抵
抗を形成するのは板の一面のみならず二面に分けてやっ
てもよい。さらに複数板の板に設けてもよい。
That is, the conductive film 15 that replaces the connecting portion of the terminal plate 11 is provided and the conductive pattern that extends to the pins P 11 , P 12 , P 21 , and P 22 is a feature. It should be noted that although holes for inserting the pins P 11 , P 12 , P 21 , P 22 and the connecting portions of the terminal plates 11 are provided, the holes are not limited to the holes and may be slits or notches recessed from the sides. It may be. Further, the resistance may be formed not only on one surface of the plate but also on two surfaces. Further, it may be provided on a plurality of plates.

(発明の効果) 以上の実施例からあきらかなように、この発明による
と、電気的な抵抗の接続、挿入位置を工夫することによ
り、挿入損失の増加なしに群遅延時間特性の改善が達成
できた。したがってS/N比を悪化させることがなくな
り、、また増幅器の利得ないし段数を増やすことなしに
低歪の受信機を製造することができる。このようなメリ
ツトは特に通信機の受信部のようにきびしい条件が付さ
れるものに有効である。
(Effects of the Invention) As is apparent from the above embodiments, according to the present invention, the group delay time characteristics can be improved without increasing the insertion loss by devising the connection of the electric resistance and the insertion position. It was Therefore, the S / N ratio is not deteriorated, and a low distortion receiver can be manufactured without increasing the gain or the number of stages of the amplifier. This kind of merits is particularly effective for objects that are subject to severe conditions, such as the receiver of a communication device.

【図面の簡単な説明】[Brief description of drawings]

第1図は本発明一実施例の等価回路図、第2図は圧電共
振子の等価回路図、第3図と第4図はフイルタの振幅特
性ならびに群遅延特性図、第5図は直列共振子おインピ
ーダンス曲線、第6図は同じく位相特性図、第7図は並
列共振子のインピーダンス曲線、第8図は同じく位相特
性図、第9図はフイルタの位相特性図、第10図は同じく
群遅延特性図、第11図は、従来例の実測特性図、第12図
〜第14図は本発明一実施例の実測特性図、第15図は本発
明の別の実施例の等価回路図、第16図はラダー型フイル
タの内部構造平面図、第17図と第18図は押え板の平面
図。 XS1、XS2、…、XSnは直列共振子、XP1、XP2、…、
P(n-1)は並列共振子、RS1、RS2、…、RSnは、第1
の抵抗、、RP1、RP2、…、RP(n-1)は第2の抵抗。
FIG. 1 is an equivalent circuit diagram of an embodiment of the present invention, FIG. 2 is an equivalent circuit diagram of a piezoelectric resonator, FIGS. 3 and 4 are amplitude characteristics and group delay characteristics of filters, and FIG. 5 is series resonance. Fig. 6 shows the same phase characteristic diagram as Fig. 6, Fig. 7 shows the impedance curve of a parallel resonator, Fig. 8 shows the same phase characteristic diagram, Fig. 9 shows the phase characteristic diagram of a filter, and Fig. 10 shows the same group. Delay characteristic diagram, FIG. 11 is a measured characteristic diagram of a conventional example, FIGS. 12 to 14 are measured characteristic diagrams of one embodiment of the present invention, FIG. 15 is an equivalent circuit diagram of another embodiment of the present invention, FIG. 16 is a plan view of the internal structure of the ladder type filter, and FIGS. 17 and 18 are plan views of the holding plate. X S1 , X S2 , ..., X Sn are series resonators, X P1 , X P2 ,.
X P (n-1) is parallel resonator, R S1, R S2, ... , R Sn is first
, R P1 , R P2 , ..., R P (n-1) are the second resistors.

Claims (5)

【特許請求の範囲】[Claims] 【請求項1】直列共振子と並列共振子とが交互に接続さ
れてなるラダー型圧電フイルタにおいて、前記直列共振
子と並列に第1の抵抗体を接続し、前記並列共振子と直
列に第2の抵抗体を接続したことを特徴とする群遅延特
性改善ラダー型圧電フイルタ。
1. A ladder type piezoelectric filter in which a series resonator and a parallel resonator are alternately connected, a first resistor is connected in parallel with the series resonator, and a first resistor is connected in series with the parallel resonator. A ladder-type piezoelectric filter with improved group delay characteristics, characterized in that two resistors are connected.
【請求項2】前記第1の抵抗体および第2の抵抗体は、
ケース部材に設けられていることを特徴とする特許請求
の範囲第1項記載の群遅延特性改善ラダー型圧電フイル
タ。
2. The first resistor and the second resistor are
The ladder-type piezoelectric filter with improved group delay characteristics according to claim 1, wherein the ladder-type piezoelectric filter is provided on the case member.
【請求項3】前記第1の抵抗体および第2の抵抗体は、
内部部品押え部材に設けられていることを特徴とする特
許請求の範囲第1項記載の群遅延特性改善ラダー型圧電
フイルタ。
3. The first resistor and the second resistor are
A ladder-type piezoelectric filter with improved group delay characteristics according to claim 1, wherein the ladder-type piezoelectric filter is provided on the internal component pressing member.
【請求項4】前記第1の抵抗体および第2の抵抗体は、
圧電板に設けられていることを特徴とする特許請求の範
囲第1項記載の群遅延特性改善ラダー型圧電フイルタ。
4. The first resistor and the second resistor are
The ladder-type piezoelectric filter with improved group delay characteristics according to claim 1, wherein the ladder-type piezoelectric filter is provided on the piezoelectric plate.
【請求項5】前記第1の抵抗体および第2の抵抗体は、
圧電板の取りつけ基板に設けられていることを特徴とす
る特許請求の範囲第1項記載の群遅延特性改善ラダー型
圧電フイルタ。
5. The first resistor and the second resistor are
The ladder-type piezoelectric filter with improved group delay characteristics according to claim 1, wherein the ladder-type piezoelectric filter is provided on a substrate on which the piezoelectric plate is mounted.
JP59121023A 1984-06-12 1984-06-12 Ladder type piezoelectric filter with improved group delay characteristics Expired - Lifetime JPH0656941B2 (en)

Priority Applications (5)

Application Number Priority Date Filing Date Title
JP59121023A JPH0656941B2 (en) 1984-06-12 1984-06-12 Ladder type piezoelectric filter with improved group delay characteristics
US06/711,210 US4651109A (en) 1984-06-12 1985-03-13 Piezoelectric resonance component having an improved group delay time characteristic
CA000476871A CA1231398A (en) 1984-06-12 1985-03-19 Piezoelectric resonance component having an improved group delay time characteristic
DE19853520895 DE3520895A1 (en) 1984-06-12 1985-06-11 PIEZOELECTRIC RESONATOR DEVICE WITH FLAT GROUP RUN TIME CHARACTERISTICS
US06/887,925 US4716377A (en) 1984-06-12 1986-07-22 Piezoelectric resonance component having an improved group delay time characteristic

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59121023A JPH0656941B2 (en) 1984-06-12 1984-06-12 Ladder type piezoelectric filter with improved group delay characteristics

Publications (2)

Publication Number Publication Date
JPS60264113A JPS60264113A (en) 1985-12-27
JPH0656941B2 true JPH0656941B2 (en) 1994-07-27

Family

ID=14800897

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59121023A Expired - Lifetime JPH0656941B2 (en) 1984-06-12 1984-06-12 Ladder type piezoelectric filter with improved group delay characteristics

Country Status (1)

Country Link
JP (1) JPH0656941B2 (en)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6253819U (en) * 1985-09-21 1987-04-03
JPS6253820U (en) * 1985-09-21 1987-04-03
JP2728244B2 (en) * 1986-03-28 1998-03-18 ティーディーケイ株式会社 Group delay equalizer
JP2875270B2 (en) * 1989-01-25 1999-03-31 株式会社日立製作所 FM demodulation circuit
JPH0629778A (en) * 1992-07-09 1994-02-04 Murata Mfg Co Ltd Ladder type filter

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3633134A (en) * 1969-10-10 1972-01-04 Motorola Inc Crystal band pass filter circuit
JPS5642418A (en) * 1979-09-13 1981-04-20 Murata Mfg Co Ltd Bulk wave piezoelectric resonator device

Also Published As

Publication number Publication date
JPS60264113A (en) 1985-12-27

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