JPH0648977Y2 - Bias power supply circuit for static induction transistor - Google Patents

Bias power supply circuit for static induction transistor

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Publication number
JPH0648977Y2
JPH0648977Y2 JP1987031988U JP3198887U JPH0648977Y2 JP H0648977 Y2 JPH0648977 Y2 JP H0648977Y2 JP 1987031988 U JP1987031988 U JP 1987031988U JP 3198887 U JP3198887 U JP 3198887U JP H0648977 Y2 JPH0648977 Y2 JP H0648977Y2
Authority
JP
Japan
Prior art keywords
voltage
bias
power supply
circuit
supply circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP1987031988U
Other languages
Japanese (ja)
Other versions
JPS63139615U (en
Inventor
和見 佐野
浩之 和田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Tokin Corp
Original Assignee
Tokin Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokin Corp filed Critical Tokin Corp
Priority to JP1987031988U priority Critical patent/JPH0648977Y2/en
Publication of JPS63139615U publication Critical patent/JPS63139615U/ja
Application granted granted Critical
Publication of JPH0648977Y2 publication Critical patent/JPH0648977Y2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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  • Amplifiers (AREA)
  • Continuous-Control Power Sources That Use Transistors (AREA)

Description

【考案の詳細な説明】 〔産業上の利用分野〕 本考案は静電誘導トランジズタ(以下SITと略す)を用
いた線形増幅回路用のSITバイアス電源回路に関する。
[Detailed Description of the Invention] [Industrial field of application] The present invention relates to a SIT bias power supply circuit for a linear amplification circuit using an electrostatic induction transistor (hereinafter abbreviated as SIT).

〔従来の技術〕[Conventional technology]

電源を商用電源から受電しない車載用,またはガソリン
エンジンを用いた発電機を電源とする増幅器は不安定な
電源で使用されている。従来一般に使用されているSIT
を使用する増幅器は第3図のブロック図の例に示すよう
に整流平滑回路11の出力である+B電源5は充分に安定
化されていないし,また増幅器のバイアスとしての固定
バイアス回路12は交流電源1を整流している。これらの
増幅器に使用されているSIT4のドレイン−ソース電圧V
DSに対し,その電流との関係は第4図の特性曲線図に示
すようにゲート−ソース間にはドレイン用の+B電源5
とは別にバイアスとしてソースゲート電圧VSGが印加さ
れる。この電圧VSGをどの値で印加するかによって増幅
器の動作点がA級,B級,またはAB級に変り電圧VDSに対
するドレイン電圧の阻止,すなわち増幅器が異る。この
図から明らかなように電圧VSGが−5ボルトのときと−1
5ボルトの場合では増幅器が異ってくる。
In-vehicle amplifiers that do not receive commercial power from the power source, or amplifiers that use a gasoline engine generator as the power source, are used as unstable power sources. Conventionally used SIT
As shown in the example of the block diagram of FIG. 3, the amplifier using the + B power source 5 which is the output of the rectifying and smoothing circuit 11 is not sufficiently stabilized, and the fixed bias circuit 12 as the bias of the amplifier is an AC power source. 1 is rectified. SIT4 drain-source voltage V used in these amplifiers
The relationship between DS and the current is + B power supply 5 for drain between the gate and the source as shown in the characteristic curve diagram of FIG.
Separately from the above, the source gate voltage V SG is applied as a bias. The operating point of the amplifier changes to class A, class B, or class AB depending on the value of the voltage V SG applied, and the drain voltage is blocked with respect to the voltage V DS , that is, the amplifier is different. As is clear from this figure, when the voltage V SG is -5 volts and -1
In the case of 5 volts, the amplifier will be different.

第3図のように交流電源1からバイアス電圧を得る回路
では交流電圧1が上昇するとき+B電源5も上昇し,こ
れにともないバイアス電圧も上昇するとき電圧増幅率μ
であらわされる。この変化を少くするように従来第5図
のようにトランジスタ6と定電圧ダイオード7を含み、
整流器3の出力する直流電圧の変化に合わせて電圧の変
化するバイアス回路も使用されている。
In the circuit for obtaining the bias voltage from the AC power supply 1 as shown in FIG. 3, when the AC voltage 1 rises, the + B power supply 5 also rises, and when the bias voltage also rises, the voltage amplification factor μ
Is It is represented by. In order to reduce this change, a transistor 6 and a constant voltage diode 7 are conventionally included as shown in FIG.
A bias circuit in which the voltage changes according to the change in the DC voltage output from the rectifier 3 is also used.

〔考案が解決しようとする問題点〕[Problems to be solved by the invention]

しかし第5図の従来のバイアス回路では、交流電源1が
定格電圧より低くなった場合、すなわち90ボルト以下に
減少するとき,+B電圧5とともにバイアス電圧も減少
することになり電圧増幅器が小さいところで動作する。
なぜなら、第4図に示したように、SITの電圧増幅率μ
は小さい所で増幅することになる。例えば、VSGが−30V
から−25Vに低下すれば、μは13.3から12.0になり、+
B電圧5を阻止出来なくなる。したがってドレイン電圧
を阻止できず,+B電源5からのドレイン電流は大きく
なり,ついにSIT4が損傷するので,交流電源1の減少も
危険を招くという欠点がある。
However, in the conventional bias circuit shown in FIG. 5, when the AC power supply 1 becomes lower than the rated voltage, that is, when it is reduced to 90 V or less, the bias voltage is reduced together with the + B voltage 5, and the voltage amplifier operates in a small size. To do.
Because, as shown in FIG. 4, the voltage amplification factor μ of SIT
Will be amplified in a small place. For example, V SG is -30V
From μ to −25 V, μ changes from 13.3 to 12.0,
The B voltage 5 cannot be blocked. Therefore, the drain voltage cannot be blocked, the drain current from the + B power source 5 becomes large, and finally the SIT 4 is damaged, so that the AC power source 1 decreases, which is also dangerous.

〔問題点を解決するための手段〕[Means for solving problems]

本考案は従来のかかる欠点を除き,交流電源(1)を整
流し平滑した直流電圧(VDC)を用いて静電誘導トラン
ジスタ(4)に必要なドレイン用の+B電源(5)を出
力するB電源回路手段(1)及びゲート用のバイアス電
圧(VG)を出力するバイアス電源回路手段を有する電源
回路であって、前記バイアス電源回路手段が、前記直流
電圧の変化に合わせて電圧の変化するバイアス用変動電
圧回路(8)と、前記直流電圧を電圧調整可能な定電圧
に変えて出力するバイアス用定電圧回路(9)と、該2
つの電圧回路の出力を各々逆流阻止用ダイオード(71,7
2)を経て結合する手段とを有し、該結合する点(Q)
を通る出力を前記バイアス電圧とする静電誘導トランジ
スタ用バイアス電源回路である。
The present invention eliminates the above-mentioned drawbacks of the prior art, and outputs a + B power source (5) for drain required for the electrostatic induction transistor (4) by using a DC voltage (V DC ) rectified and smoothed from the AC power source (1). A power supply circuit having B power supply circuit means (1) and bias power supply circuit means for outputting a bias voltage (V G ) for a gate, wherein the bias power supply circuit means changes the voltage in accordance with the change in the DC voltage. A variable voltage circuit for bias (8), a constant voltage circuit for bias (9) for converting the DC voltage into a constant voltage capable of voltage adjustment, and outputting the constant voltage.
The outputs of the two voltage circuits are connected to the backflow prevention diodes (71, 7
2) and a means for connecting, and the connecting point (Q)
Is a bias power supply circuit for an electrostatic induction transistor in which an output passing through is the bias voltage.

〔作用〕[Action]

ベースのバイアス電圧の変化に従って増幅率が大きく変
わるのを防止するために,他のバイアス用の定電圧回路
を設けてバイアス電圧を一定にし、バイアス電圧をある
一定値より下げないようにして増幅器を安定に動作させ
る。
In order to prevent the amplification factor from greatly changing in accordance with the change in the bias voltage of the base, another bias constant voltage circuit is provided to keep the bias voltage constant, and the amplifier is designed so that the bias voltage does not drop below a certain fixed value. Operate stably.

〔実施例〕〔Example〕

本考案のSITバイアス電源回路の実施例は第1図の回路
図に示す。
An embodiment of the SIT bias power supply circuit of the present invention is shown in the circuit diagram of FIG.

図面に示すように交流電源1からの入力はトランスホー
マ2と整流器3を含む整流平滑回路11で規定電圧の直流
電圧VDCとなる。この直流電圧VDCはバイアス用変動電圧
回路8に加えられる。このバイアス用変動電圧回路8
は、従来の第3図の場合と同じように、トランジスタ6
と定電圧ダイオード7を含み、前記直流電圧の変化に合
わせて電圧が変化する。また直流電圧VDCを分岐してト
ランジスタ6′と定電圧ダイオード7′を含む回路によ
ってSIT4のゲートに電圧が供給されるバイアス用定電圧
回路9が得られる。このバイアス用変動電圧回路8とバ
イアス用定電圧回路9との間にダイオード71およびダイ
オード結合点Qを挟んで接続し、それぞれの回路の間の
送流が防止される。バイアス電圧はバイアス用定電圧回
路9中の可変抵抗10によって変えることができる。+B
電源5は整流平滑回路11の出力の一部を取るか、又は従
来例の第3図に示すように、同じ交流電源を別の整流平
滑回路(11)からとることによって得られる。
As shown in the drawing, the input from the AC power supply 1 becomes a DC voltage V DC of a specified voltage in a rectifying / smoothing circuit 11 including a transformer 2 and a rectifier 3. This DC voltage V DC is applied to the bias voltage changing circuit 8. This bias voltage changing circuit 8
Is the same as in the conventional case of FIG.
And a constant voltage diode 7, and the voltage changes according to the change of the DC voltage. Further, a bias constant voltage circuit 9 in which a voltage is supplied to the gate of SIT4 is obtained by branching the DC voltage V DC and including a transistor 6'and a constant voltage diode 7 '. The variable voltage circuit for bias 8 and the constant voltage circuit for bias 9 are connected to each other with the diode 71 and the diode coupling point Q interposed therebetween to prevent the flow of current between the circuits. The bias voltage can be changed by the variable resistor 10 in the bias constant voltage circuit 9. + B
The power supply 5 is obtained by taking a part of the output of the rectifying / smoothing circuit 11 or by taking the same AC power supply from another rectifying / smoothing circuit (11) as shown in FIG. 3 of the conventional example.

本考案による回路を用いることによって,第2図に示す
ように交流電源1の交流電圧VACに対するゲートのバイ
アス電圧VGとの関係によって,たとえば交流電圧VACが9
0ボルト以下でもゲートのバイアス電圧VGはほぼ一定で
ある。ここに(8)で示した太い実線は、バイアス用変
動電圧回路8の出力を示し、(9)で示した太い破線は
バイアス用定電圧回路9の出力を示す。したがってバイ
アス電圧VGの変化による過大な電流が流れる危険はなく
増幅器の動作点はAB級からC級となるが交流電圧VACが7
0ボルト以下の電圧変動に充分対応できる。
By using the circuit according to the present invention, as shown in FIG. 2, for example, the AC voltage V AC is 9 V depending on the relationship between the AC voltage V AC of the AC power source 1 and the gate bias voltage V G.
The gate bias voltage V G is almost constant even at 0 V or less. The thick solid line shown in (8) here indicates the output of the bias variable voltage circuit 8, and the thick broken line shown in (9) shows the output of the bias constant voltage circuit 9. Therefore, there is no danger of an excessive current flowing due to a change in the bias voltage V G , and the operating point of the amplifier is from class AB to class C, but the AC voltage V AC is 7
It can handle voltage fluctuations of 0 V or less.

〔考案の効果〕[Effect of device]

以上述べたように、本考案によれば、バイアス用変動電
圧回路8に並列にバイアス用定電圧回路9を設け、さら
に逆流防止のためのダイオード71,72を設けることによ
り、+B電源5が安定電圧化されない場合でも,増幅器
は安全な動作となり,SITのような大電力増幅器も低コス
ト軽量化できる。
As described above, according to the present invention, by providing the bias constant voltage circuit 9 in parallel with the bias variable voltage circuit 8 and further providing the diodes 71 and 72 for preventing backflow, the + B power source 5 is stabilized. Even when the voltage is not applied, the amplifier operates safely, and a large power amplifier such as SIT can be made low cost and light weight.

【図面の簡単な説明】[Brief description of drawings]

第1図は本考案のSIT用バイアス電源回路の実施例によ
る回路図,第2図は第1図の回路による交流電圧の変化
に対するゲートのバイアス電圧との関係を示す特性曲線
図,第3図は従来のバイアス回路の例のブロック図,第
4図はSITのドレイン・ソース電圧の変化に対する電流
の変化をバイアス電圧をパラメータとして示す特性曲線
図,第5図は従来のバイアス回路の例の一部を示す回路
図である。 なお, 1:交流電源,2:トランスホーマ,3:整流器,4:SIT,5:+B
電源,6,6′:トランジスタ,7,7′:定電圧ダイオード,7
1,72:ダイオード,8:バイアス用変動電圧回路,9:バイア
ス用定電圧回路,10:可変抵抗,11:整流平滑回路,12:固定
バイアス回路。
FIG. 1 is a circuit diagram of an embodiment of a bias power supply circuit for SIT according to the present invention, FIG. 2 is a characteristic curve diagram showing a relation between a bias voltage of a gate and a change of AC voltage by the circuit of FIG. 1, FIG. Is a block diagram of an example of a conventional bias circuit, FIG. 4 is a characteristic curve diagram showing a change of current with respect to a change of drain-source voltage of SIT with a bias voltage as a parameter, and FIG. 5 is an example of a conventional bias circuit. It is a circuit diagram which shows a part. In addition, 1: AC power supply, 2: Transformer, 3: Rectifier, 4: SIT, 5: + B
Power supply, 6,6 ': Transistor, 7,7': Voltage regulator diode, 7
1, 72: diode, 8: variable voltage circuit for bias, 9: constant voltage circuit for bias, 10: variable resistor, 11: rectifying / smoothing circuit, 12: fixed bias circuit.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 【請求項1】交流電源を整流し平滑した直流電圧を用い
て静電誘導トランジスタに必要なドレイン用+B電源を
出力するB電源回路手段及びゲート用のバイアス電圧を
出力するバイアス電源回路手段を有する電源回路であっ
て、前記バイアス電源回路手段が、前記直流電圧の変化
に合わせて電圧の変化するバイアス用変動電圧回路
(8)と、前記直流電圧を電圧調整可能な定電圧に変え
て出力するバイアス用定電圧回路(9)と、該2つの電
圧回路の出力を各々逆流阻止用ダイオード(71,72)を
経て結合する手段とを有し、該結合する点(Q)を通る
出力を前記バイアス電圧とする静電誘導トランジスタ用
バイアス電源回路。
1. A B power supply circuit means for outputting a drain + B power supply necessary for an electrostatic induction transistor by using a DC voltage obtained by rectifying and smoothing an AC power supply, and a bias power supply circuit means for outputting a bias voltage for a gate. In the power supply circuit, the bias power supply circuit means converts the DC voltage into a variable voltage circuit for bias (8) in which the voltage changes in accordance with the change in the DC voltage, and outputs the DC voltage converted into a constant voltage that can be adjusted. A bias constant voltage circuit (9) and means for coupling the outputs of the two voltage circuits via the respective backflow blocking diodes (71, 72) are provided, and the output passing through the coupling point (Q) is Bias power supply circuit for static induction transistor with bias voltage.
JP1987031988U 1987-03-06 1987-03-06 Bias power supply circuit for static induction transistor Expired - Lifetime JPH0648977Y2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1987031988U JPH0648977Y2 (en) 1987-03-06 1987-03-06 Bias power supply circuit for static induction transistor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1987031988U JPH0648977Y2 (en) 1987-03-06 1987-03-06 Bias power supply circuit for static induction transistor

Publications (2)

Publication Number Publication Date
JPS63139615U JPS63139615U (en) 1988-09-14
JPH0648977Y2 true JPH0648977Y2 (en) 1994-12-12

Family

ID=30838237

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1987031988U Expired - Lifetime JPH0648977Y2 (en) 1987-03-06 1987-03-06 Bias power supply circuit for static induction transistor

Country Status (1)

Country Link
JP (1) JPH0648977Y2 (en)

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5663064U (en) * 1979-10-20 1981-05-27
JPS61123641U (en) * 1985-01-19 1986-08-04

Also Published As

Publication number Publication date
JPS63139615U (en) 1988-09-14

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