JPH0638306B2 - Motor rotation control device - Google Patents

Description

Description: TECHNICAL FIELD The present invention relates to an information reproducing apparatus such as a video disc player or a compact disc player for reproducing an information signal from a rotating recording medium, and more particularly to rotating the rotating recording medium. The present invention relates to a motor rotation control device capable of preventing large fluctuations in the rotation speed of a motor and runaway.

[Conventional technology]

An information reproducing apparatus for reproducing the information signal from a disc-shaped rotary recording medium (hereinafter referred to as a disk) in which information signals such as a video signal and a digital audio signal are recorded at high density has been put into practical use. Some of these high density recording disks are recorded at a constant linear velocity in order to increase the recording capacity. In order to perform such constant linear velocity reproduction, it is necessary to control the motor for rotating the disc so that the number of revolutions of the disc is high when reproducing the inner peripheral part of the disc and slow when reproducing the outer peripheral part. There is.

A motor rotation control device that performs such control extracts the synchronization signal included in the reproduction signal from the disc and controls the rotation of the motor so that the frequency of the synchronization signal matches the frequency of the reference synchronization signal. Can be given.

However, in such a device, the signal indicating the number of rotations of the motor is a synchronization signal included in the reproduction signal from the disk, and unless the reproduction of the synchronization signal is performed correctly, the rotation control of the motor is not performed correctly. Therefore, for example, when the information signal is lost due to a defect of the disk, or when the tracking servo is stopped due to the random access operation, the synchronization signal cannot be obtained correctly, and the correct rotation control of the motor becomes impossible, The number of rotations of the motor fluctuates greatly and it takes time to recover.

Therefore, in order to solve the above problems, a frequency generator (hereinafter referred to as FG) is added to the motor, and the rotation speed of the motor is obtained from the frequency of the output signal of this FG, and the synchronization signal cannot be obtained correctly. There is a device for controlling the rotation of the motor so that the obtained rotation speed of the motor matches the target rotation speed of the reference motor. Examples of this type of apparatus include, for example, Japanese Patent Laid-Open Nos. 61-24055 and 5 Sho.
The thing described in 9-71168 gazette is mentioned.

[Problems to be solved by the invention]

However, the above-mentioned conventional technique has the following problems.

That is, in the former device disclosed in Japanese Patent Laid-Open No. 61-24055, when the synchronization signal is obtained correctly,
The rotation speed of the motor obtained from the output signal of the FG is sequentially stored as an analog amount (hold voltage) by the sample hold circuit, and when the synchronization signal cannot be obtained correctly, it is stored in the sample hold circuit. The rotation speed of the motor is controlled by setting the rotation speed of the motor representing the hold voltage as the target rotation speed of the motor.
However, since the sample hold circuit is an analog circuit, it is not very suitable for an LSI, and it is difficult to maintain the hold voltage with high accuracy.

On the other hand, in the latter device described in Japanese Patent Laid-Open No. 59-71168, the signal output from the signal generating means is divided by the dividing means to create a reference signal, which corresponds to the frequency of the reference signal. The rotation of the motor is controlled by using the value as the target rotation speed of the motor described above. However, as described above, in order to perform the constant linear velocity reproduction, the rotation speed of the motor must be changed according to the reproduction position on the disk, and therefore the frequency dividing means for determining the target rotation speed of the motor. It was necessary to sequentially change the frequency division value of (3) from the outside according to the reproduction position on the disc. Also, especially
At the time of random access, the rotation speed of the motor must be changed rapidly, so that the response time becomes very problematic when the frequency division value is changed accordingly.

Therefore, an object of the present invention is to solve the above-mentioned problems of the prior art and to prevent a large fluctuation in the rotation speed of the motor or a runaway of the motor even when the synchronization signal cannot be obtained correctly. Moreover, it is an object of the present invention to provide a motor rotation control device that is suitable for use in an LSI, has high control accuracy, and does not need to reset the target rotation speed of the motor from the outside.

[Means for solving problems]

In order to achieve the above-mentioned object, in the present invention, a pulse signal generating means for generating a pulse signal having a frequency proportional to the rotation speed of a motor for rotating a rotary recording medium, and a frequency dividing means for dividing the pulse signal. And a motor rotation speed measuring means for measuring the rotation speed of the motor based on the cycle or frequency of the output signal from the frequency dividing means and outputting data corresponding to the rotation speed, and the output data. A memory circuit for storing, a memory control means for controlling a storing operation of the memory circuit, and a pulse signal corresponding to the rotation speed based on data stored in the memory circuit corresponding to the rotation speed of the motor. Reference pulse signal generating means for generating a reference pulse signal having a frequency substantially equal to the frequency, a synchronization signal reproduced from the rotary recording medium, and a reference synchronization signal serving as a reference for the synchronization signal. And a phase difference between the pulse signal from the pulse signal generating means and the reference pulse signal from the reference pulse signal generating means (hereinafter referred to as the second phase difference). The phase difference detection means for detecting one of the phase difference signals and selecting one of the phase difference signals and outputting the phase error signal corresponding to the selected phase difference signal, and amplifying the phase error signal from the phase difference detection means. A motor rotation control device that drives the motor with the amplified signal, wherein the phase difference detection means includes a pulse signal from the pulse signal generation means and a reference pulse signal generation means. Of the reference pulse signal is smaller than a predetermined first value, the first phase difference is selected; otherwise, the second phase difference is selected.
In addition to selecting the phase difference, the memory control means detects whether or not the desired information among the information reproduced from the rotary recording medium is correctly obtained, and when it is correctly obtained, the memory circuit To update the memory contents,
At other times, the storage control is performed so as to stop the update of the stored contents in the memory circuit.

[Action]

In the present invention, when the rotation speed of the motor is stable, the phase difference detection means performs rotation control by the synchronization signal. However, when the synchronization signal cannot be obtained correctly and the rotation speed of the motor fluctuates. Then, the rotation control is immediately switched to the pulse signal. Therefore, even if the synchronization signal is not correctly obtained, the number of revolutions of the motor does not fluctuate significantly and the motor does not run out of control.

Further, among the information reproduced from the rotary recording medium, when the desired information, for example, the synchronization signal is correctly obtained, the memory circuit sequentially updates the stored contents, so that the memory circuit always stores The data corresponding to the latest motor rotation speed will be stored. When the synchronization signal cannot be obtained correctly and the rotation control is switched to the pulse signal, the update is stopped and the data stored at that time becomes the target rotation speed of the motor. Therefore, even when the number of rotations of the motor must be changed by changing the reproduction position, the target number of rotations of the motor is sequentially updated as the storage data of the memory circuit according to the reproduction position. There is no need to reconfigure from outside.

Further, in measuring the rotation speed of the motor, the motor rotation speed measurement means performs digital processing based on the cycle or frequency of the output signal of the frequency dividing circuit, and the obtained data is digitally stored in the memory circuit. It is stored as a quantity. Therefore, since the whole can be configured by a digital circuit, it is suitable for an LSI, and the stored data can be maintained with high precision, so that the control precision can be improved.

〔Example〕

Hereinafter, embodiments of the present invention will be described with reference to the accompanying drawings.

FIG. 1 is a block diagram showing a motor rotation control device as a first embodiment of the present invention.

In FIG. 1, 1 is a disk, 2 is a frequency generator (hereinafter, F
It is called G. ) 3 is a frequency dividing circuit, 4 is a period measuring circuit, 5 is a memory circuit, 6 is a memory control circuit, 7 is a reference FG signal generating circuit, and 8 and 8'are phase frequency comparing circuits (hereinafter PFC).
Say. ), 9 and 9'is a phase compensation circuit, 10 is a pickup, 11 is a preamplifier, 12 is an FM demodulation circuit, 13 is a sync signal separation circuit, 14 is a reference signal generation circuit, 15 is a frequency dividing circuit, 16 is a changeover switch, 17 is a motor drive circuit, 18 is a disk motor, 19 switch control circuits, 2
0 is a switch control signal, 21 is a memory control signal, 22 is a synchronization signal, 23 is a reference synchronization signal, 24 is an FG signal, 25
Is the reference FG signal.

The signal read by the pickup 10 from the disc 1 is amplified by the preamplifier 11 and is then transmitted to the FM demodulation circuit 1
It is demodulated by 2 and becomes a reproduction signal. The sync signal separation circuit 13 to which the reproduction signal is input separates the sync signal 22 used for controlling the motor rotation speed from the reproduction signal.
Input to 8 '. On the other hand, a reference synchronizing signal 23 obtained by dividing the output signal from the reference signal generating circuit 14 by the frequency dividing circuit 15 is also input to the PFC 8 '. Therefore, a phase error signal corresponding to the phase difference between the sync signal 22 and the reference sync signal 23 is obtained at the output of the PFC 8 '.

On the other hand, the FG signal 24 output from the FG 2 is frequency-divided by the frequency dividing circuit 3 and then input to the period measuring circuit 4. The cycle measuring circuit 4 measures the cycle of an input signal input as a pulse signal and outputs a digital signal corresponding to the measured value as output data. Then, the memory circuit 5 stores the output data from the cycle measuring circuit 4 in response to the memory control signal 21 from the memory control circuit 6. Next, the standard F
The G signal generation circuit 7 is for generating a signal of a frequency corresponding to the measured cycle from the data stored in the memory circuit 5, and this generated signal is input to the PFC 8 as the reference FG signal 25. The FG signal 24 from the FG2 is also input to the PFC8, and the reference FG is output to the PFC8.
A phase error signal corresponding to the phase difference between the signal 25 and the FG signal 24 is obtained.

The memory control circuit 6 includes a synchronization signal 22 and a reference synchronization signal 23.
A memory for updating the stored data in the memory circuit 5 when the ratio or difference of the frequency with the frequency is smaller than a predetermined value, and prohibiting the update when the rotational speed of the disk motor 18 deviates and becomes larger than the predetermined value. The control signal 21 is output. Therefore, the memory circuit 5 based on the memory control signal 21 always stores the data corresponding to the latest motor rotation speed when the disk 1 is rotating at the regular rotation speed, and the rotation speed fluctuates and the synchronization signal 22 and the reference signal are used. Sync signal 23
When the ratio or difference in frequency between and exceeds a predetermined value, data corresponding to the motor rotation speed immediately before exceeding that value is stored.

The switch control circuit 19 outputs, for example, a logic "1" level as the switch control signal 20 when the ratio or difference of the frequencies of the FG signal 24 and the reference FG signal 25 is smaller than a predetermined value, and otherwise outputs the logic "1" level. Output 0 "level. The changeover switch 16 has a switch control signal 2
According to the logic level of 0, the phase compensating circuit 9'is provided when the level is "1" and the phase compensating circuit 9 is provided when the level is "0".
Switch to the side. Therefore, when the disk 1 is rotating within the range of the predetermined number of rotations, the disk motor 18
The rotation speed is controlled by the synchronizing signal 22 reproduced from the disk 1.

However, when the signal is lost due to the defect of the disk 1 or the pickup 10 is moved at a high speed while the tracking servo is stopped due to the random access operation, the sync signal 22 is not correctly reproduced. Therefore, the PFC 8'outputs an incorrect phase comparison result, and the rotation speed of the disk motor 18 fluctuates.

The frequency of the FG signal 24 also changes due to this change in the number of revolutions, and when the ratio or difference of the frequency with the reference FG signal 25 exceeds a predetermined range, the switch control signal 20 causes the changeover switch 16 to keep the disk motor 18 until now. The output of the phase compensating circuit 9'which has been controlling the rotation is switched to the output of the phase compensating circuit 9. On the other hand, as described above, when the number of revolutions deviates from the predetermined value, the update of the data stored in the memory circuit 5 is prohibited.
The frequency of the G signal 25 is substantially equal to the frequency of the FG signal 24 when the disk motor 18 is rotating at a regular rotation speed. Therefore, the disk motor 18 controlled by the output of the phase compensation circuit 9 returns to the normal rotation speed again, so that the rotation speed of the disk motor 18 does not fluctuate greatly or runaway. Moreover, the recovery time is short.

Next, a second embodiment of the present invention will be described.

FIG. 2 is a block diagram showing a second embodiment of the present invention.

In Fig. 2, the same components as those in Fig. 1 described above are denoted by the same reference numerals as in Fig. 1. In addition, 16 'is a changeover switch.

Hereinafter, the present embodiment will be described while comparing the points different from the first embodiment.

In the first embodiment, a PFC (phase frequency comparator) for obtaining the phase difference between the sync signal 22 and the reference sync signal 23.
By using two PFCs 8 ′ and PFC8 for obtaining the phase difference between the FG signal 24 and the reference FG signal 25, and switching their output signals by the changeover switch 16,
A control signal for controlling the rotation of the disk motor 18 is selected.

On the other hand, in this embodiment, only PFC8 is used,
The selection of the control signal for the disk motor 18 is performed by switching between the two input signals of the PFC 8. That is, when the phase difference between the sync signal 22 and the reference sync signal 23 is obtained, the changeover switches 16 and 16 'are set to the A side, and when the phase difference between the FG signal and the reference FG signal is obtained, the changeover switches 16 and 16' are set to the B side.

According to the configuration of this embodiment, the PF is different from that of the first embodiment.
Since only one C (phase frequency comparator) is required, the configuration becomes simple.

By the way, in the first and second embodiments, the dividing ratio N of the dividing circuit 3 can take any value, but in particular, N is the number of pulses of the FG signal 24 during one rotation of the disk motor 18. When the same is applied, the signal input to the cycle measuring circuit 4 becomes one pulse every one rotation of the disk motor 18. In this case, since the cycle of the input signal of the cycle measuring circuit 4 does not depend on the accuracy of the FG 2, the rotation speed of the disk motor 18 can be accurately measured.

To explain this in more detail, for example, FG2
However, even if the configuration is such that 10 pulses are output as the FG signal 24 while the disk motor 18 makes one rotation (360 °), in reality, the pulse is accurately output at a rate of 1 pulse at 36 °. Is not output, but depending on the mechanical processing accuracy of the FG 2, for example, the ratio may be one every 30 ° in a certain section or one in every 40 ° in another section. That is, even if the rotation speed of the disk motor 18 is constant, the cycle of the FG signal 24 changes. However, of the 10 pulses output from the FG2 during one rotation, for example, when focusing on only the first pulse, the cycle of only the first pulse output once per rotation is If the number of rotations of the disk motor 18 is constant, it will always be constant. Therefore, as described above, the frequency dividing ratio N of the frequency dividing circuit 3 is set to the same as the number of pulses of the FG signal 24 (10 in this case) during one rotation of the disk motor 18, and the disk motor 18 operates. By generating a signal that becomes one pulse for each rotation, it is possible to obtain a signal having a cycle corresponding to the number of rotations of the disk motor 18 on a one-to-one basis.

In both the first and second embodiments, the number of revolutions of the disk motor 18 is the frequency of the output of the FG2 by the frequency dividing circuit 3 in both cases.
Although it is measured from the cycle of the signal divided by, the frequency is not limited to the cycle, and the frequency may be measured as long as it corresponds to the rotation speed of the disk motor 18.

Furthermore, in the first embodiment, the changeover switch 16 is used to select the phase error signal, but this is not limited to the switch, and the addition ratio of the two phase error signals is changed by a predetermined value. I wish I had it.

In addition, in the first and second embodiments, the memory circuit 5
Is not limited to one memory, but a plurality of memories may be used, and one of them may be selected by a signal from a system control circuit (not shown).

For example, three memories are used, and the first memory stores the output data from the cycle measuring circuit 4 similar to that described above,
Consider a case in which the second memory stores data output from the system control circuit, and the third memory permanently stores data corresponding to a predetermined rotation speed.

That is, for example, data corresponding to the number of rotations of the disc 1 at the time of starting reproduction is output from the system control circuit and stored in the second memory by the memory control circuit 6, or the data is previously stored in the second memory. 3 is stored in the memory 3, the disk motor 18 reaches the desired number of revolutions from the start of reproduction by selecting the second or third memory at the start of reproduction.
The time until a normal signal is obtained can be shortened. Further, at the time of random access, the data corresponding to the number of revolutions in the target track is output from the system control circuit, stored in the second memory by the memory control circuit 6, and the second memory is selected to select the pickup 10. If the rotation speed of the disk motor 18 is adjusted during movement, the time required for random access can be shortened.

In addition, in the first and second embodiments, by providing a hysteresis in the range in which the frequency ratio or the difference is detected in the memory control circuit 6 and the switch control circuit 19, the effect of preventing hunting is provided. Is also good. Specifically, for example, the switch control circuit 1
9 detects whether the ratio or the difference between the frequencies of the FG signal 24 and the reference FG signal 25 is larger or smaller than a predetermined value and switches the logic level of the switch control signal 20 to be output. The rotation control by the synchronization signal 22 and the FG signal 24 are made different by changing the value between the case where the logic "1" level is changed to the logic "0" level and the case where the logic "0" level is changed to the logic "1" level. This prevents frequent switching (rotation control) due to (hunting).

〔The invention's effect〕

In the motor rotation control device according to the present invention, when the synchronization signal cannot be obtained correctly, such as when the information signal is lost due to the defect of the disk or when the tracking servo is stopped due to the random access operation, the synchronization signal When the number of revolutions of the motor controlled by is fluctuated, the update of the stored contents of the memory circuit is stopped, the data corresponding to the immediately preceding fluctuating motor number is stored in the memory circuit, and this is used as the target number of revolutions of the motor. Then, the control is switched to the control by the FG signal to maintain the rotation speed of the motor at the rotation speed before the fluctuation. Therefore, even in such a case, the number of rotations of the motor does not fluctuate significantly and the motor does not run out of control.

Further, since the whole can be configured by a digital circuit, it is suitable for an LSI and has an effect that the control accuracy can be kept high. Furthermore, even if the rotation speed of the motor must be changed due to the change of the reproduction position, the target rotation speed of the motor is sequentially updated as the storage data of the memory circuit according to the reproduction position. , No need to reconfigure from outside.

[Brief description of drawings]

FIG. 1 is a block diagram showing the first embodiment of the present invention, and FIG.
The figure is a block diagram showing a second embodiment of the present invention. Explanation of symbols 1 ... Disk, 2 ... Frequency generator, 3 ... Dividing circuit, 4 ... Period measuring circuit, 5 ... Memory circuit, 6 ... Memory control circuit, 7 ... Reference FG signal generating circuit , 8 ... Phase frequency comparison circuit, 16 ... Changeover switch, 19 ...
Switch control circuit.

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Yonemitsu Mori 292 Yoshida-cho, Totsuka-ku, Yokohama-shi, Kanagawa, Ltd. Inside the Yokohama factory of Hitachi, Ltd. (56) Reference JP-A-61-224176 (JP, A) JP Sho 63-112864 (JP, A)

Claims (3)

[Claims] 1. A pulse signal generating means for generating a pulse signal having a frequency proportional to the number of rotations of a motor for rotating a rotary recording medium, a frequency dividing means for dividing the pulse signal, and a frequency dividing means for dividing the pulse signal. Motor rotation speed measuring means for measuring the rotation speed of the motor based on the cycle or frequency of the output signal and outputting data corresponding to the rotation speed, a memory circuit for storing the output data, and the memory Memory control means for controlling the memory operation of the circuit, and based on the data corresponding to the rotation speed of the motor stored in the memory circuit,
Reference pulse signal generating means for generating a reference pulse signal having a frequency substantially equal to the frequency of the pulse signal corresponding to the rotation speed, a synchronization signal reproduced from the rotary recording medium, and a reference synchronization serving as a reference of the synchronization signal. And a phase difference between the pulse signal from the pulse signal generating means and the reference pulse signal from the reference pulse signal generating means (hereinafter referred to as the second position). Phase difference), each phase difference is selected, and a phase error signal corresponding to the selected phase difference is output, and a phase error signal from the phase difference detection means is amplified. And a motor drive means for driving the motor by the amplified signal, wherein the phase difference detecting means is a pulse signal from the pulse signal generating means. And the reference pulse signal from the reference pulse signal generating means has a frequency ratio or difference smaller than a predetermined first value, the first phase difference is selected; otherwise, the second phase difference is selected. In addition to selecting, the memory control means detects whether or not desired information is correctly obtained from the information reproduced from the rotary recording medium,
A motor rotation control device characterized by causing the memory circuit to update the stored content when it is obtained correctly, and performing storage control so as to stop the update of the stored content in the memory circuit at other times. 2. The motor rotation control device according to claim 1, wherein the desired information is a synchronization signal reproduced from the rotary recording medium, and the memory control means is configured to synchronize the synchronization signal with the synchronization signal. When the ratio or difference of the frequency with the reference synchronization signal is smaller than a predetermined second value, it is determined that the synchronization signal has been correctly obtained, and the memory circuit updates the stored contents. A motor rotation control device characterized by performing storage control so as to stop updating of stored contents in a memory circuit. 3. The motor rotation control device according to claim 1 or 2, wherein the memory control means is capable of arbitrarily writing desired data to the memory circuit. Motor rotation control device.