JPH0636206A - Color-video-signal recording and replay - Google Patents

Abstract

PURPOSE:To achieve a skip search without a sense of visual incongruity by a method wherein a color video signal to be replayed at a high-speed replay by separate heads is overlapped and recorded on one part or the whole of a track on which a color video signal has been recorded. CONSTITUTION:A color video signal to be replayed at a high-speed replay by serrate heads 23 to 25 is overlapped and recorded on one part or the whole of a track on which a color video signal has been recorded. A switcher circuit 29 for changeover use is provided in such a way that, in an ordinary replay, a demodulation circuit 39 and a decoding circuit 40 are connected to replay a conventional video signal and that, in a high-speed replay, the demodulation circuit 39 and the decoding circuit 40 are connected. Thereby, at the high-speed replay, frames which are different in terms of time are not output on the same screen, and, even at the high-speed replay, an image in the same time can be replayed intermittently on the same screen.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a color video signal recording / reproducing apparatus such as a video tape recorder for digitally recording and reproducing a color video signal on a magnetic tape.

[0002]

2. Description of the Related Art FIG. 4, FIG. 8, FIG. 9 and FIG.
And it demonstrates using FIG. FIG. 8 is an example of a block diagram of a signal processing unit of a conventional digital VTR. Further, FIG. 9 shows recording patterns of the image frame to be recorded and the image frame recorded on the tape. Originally, since the scan is a helical scan, the print pattern should be described diagonally as shown in FIG. 9C, but to simplify the description, it is printed vertically as shown in FIG. 9B. Describe the pattern.

In FIG. 8, 1 is an A / D converter, 2 is a high efficiency coding circuit, 3 is a channel division circuit, 4 is an error correction coding circuit, 5 is a modulation circuit, 6 is a recording amplifier, and 7 is an error. Correction coding circuit, 8 is modulation circuit, 9 is recording amplifier, 18
Is a rotating cylinder, 19 is a rotating direction of the rotating cylinder, 20
Is a magnetic tape, 21 is a tape moving direction, 22 is a head,
24 is a head, 26 is a reproduction amplifier, 27 is a low pass filter, 28 is a demodulation circuit, 40 is a decoding circuit, 33 is a reproduction amplifier, 34 is a low pass filter, 35 is a demodulation circuit, 41
Is a decoding circuit, 42 is a channel synthesis circuit, 43 is a decoding circuit, and 44 is a D / A converter.

First, the time of recording will be described. The input color video signal is converted into digital data by the A / D converter 1 and transmitted to the high efficiency coding circuit 2. The high-efficiency coding circuit 2 compresses the input digital data, such as DCT, and transmits the compressed digital data to the channel division circuit 3. High-efficiency coding techniques such as DCT are explained in detail in documents such as "systematic image coding".

The channel division circuit 3 divides the input digital data into two channels, and transmits the digital data to the error correction coding circuit 4 and the error correction coding circuit 7. After that, the error correction coding circuit 4, the error correction coding circuit 7, the modulation circuit 5, the modulation circuit 8, and the recording amplifier 6 and the recording amplifier 9 perform the same operation, so that the error correction coding circuit 4 and the modulation circuit 5 are performed.
The operation of the recording amplifier 6 will be described.

The digital data input to the error correction coding circuit 4 is added with an error correction parity symbol such as a Reed-Solomon product code, and the modulation circuit 5 is added.
Be transmitted to. Further, error correction codes such as Reed-Solomon product codes are described in detail in Imai, "Code Theory" (edition of the Institute of Electronics, Information and Communication Engineers).

The digital data input to the modulation circuit 5 is converted into a recording code such as NRZ and transmitted to the recording amplifier 6. Recording codes such as NRZ are described in detail in "Digital Video Recording Technology" by Eto et al. Then, a recording track is formed on the magnetic tape 20 from the recording amplifier 6 via the head 22 and the head 24. The head 22 and the head 24 are combination heads having reverse azimuth. At this time, 18 is a rotary cylinder, and a head 22 and a head 24 are provided. Reference numeral 19 is a cylinder rotation direction, and 21 is a magnetic tape running direction. The error correction coding circuit 7, the modulation circuit 8, and the recording amplifier 9 also perform the same operation as above, and the head having the other azimuth of the head 22 (the azimuth of the head to which a signal is input from the recording amplifier 6 is opposite to that of the head). Digital data is recorded on the magnetic tape 20 via the azimuth head).

At this time, for example, the image frames P0, P1, P2, P3, P4, P5, P6 and P7 of FIG.
9B is an image frame to be recorded, the pattern recorded on the tape is as shown in FIG. 9B.

Next, the time of reproduction will be described. Reproducing amplifier 26, reproducing amplifier 33, low-pass filter 27, low-pass filter 34, decoding circuit 28, and decoding circuit 35.
The decoding circuit 40 and the decoding circuit 41 operate in the same manner. Therefore, the reproduction amplifier 26 and the low-pass filter 2
7, the operation of the decoding circuit 28 and the decoding circuit 40 will be described.

The head 22 and the head 24 are shown in FIG. 9 (B).
A reproduction signal is obtained when passing through the recording pattern on the magnetic tape shown in FIG. The reproduction signal obtained from the head 24 is input to the reproduction amplifier 26, amplified by the reproduction amplifier 26, and transmitted to the low pass filter 27. The low-pass filter 27 extracts the band of the solid line portion shown in FIG. 4 and transmits it to the demodulation circuit 28. The demodulation circuit 28 extracts digital data from the signal transmitted from the low-pass filter 27 by a method such as integral detection, and transmits it to the decoding circuit 40. The operation of the demodulation circuit 28 is written by Kuwahara,
It is explained in detail in "Digital Microwave Communication".

The decoding circuit 40 is a circuit for decoding the error correction code, and performs decoding processing of the error correction code on the digital data transmitted from the demodulation circuit 28 by, for example, the Peterson decoding method and the like, and a channel synthesis circuit. 42. The operation of the decoding circuit 40 is described by Imai,
It is explained in detail in "Code Theory" (Edited by The Institute of Electronics, Information and Communication Engineers). In the present embodiment, the channel synthesizing circuit 42 shows an example of 2-channel recording, so that the digital data from the decoding circuit 40 which is the first channel and the digital data from the decoding circuit 41 which is the second channel are synthesized. And transmits it to the decoding circuit 43.

The decoding circuit 43 is a circuit for decoding high efficiency coding, and decodes the digital data from the channel synthesizing circuit 42 and transmits it to the D / A converter 44. The D / A converter 44 is a circuit that converts the digital data from the decoding circuit 43 into an analog color video signal.

[0013]

However, in these conventional digital VTRs, a problem occurs in the reproduced image during high speed reproduction. Here, high-speed reproduction at quadruple speed will be described with reference to FIGS. 10 and 12. FIG. 10 shows the head scanning lines at the time of high-speed reproduction of 4 times speed in the conventional digital VTR.
The area indicated by is the area picked up by the head during high-speed reproduction at quadruple speed, and P0, P1, P2, and P3 are recorded image frames, and the frame times are different in this order.

Further, although the recording track is drawn perpendicularly to the tape moving direction in FIG. 10, this is for ease of understanding, and basically a helical scan may be used. Then, FIG. 12 shows a reproduced image at the time of high speed reproduction of 4 times speed in the conventional digital VTR.
0 to S19 and P0 to P3 are S0 to S19 and P0 in FIG.
Corresponds to P3.

As shown in FIG. 12, a conventional digital V
In quadruple speed reproduction by TR, four temporally different frames (P0, P1,
P2, P3) will be displayed. Therefore, there is a problem that reproduced images are temporally separated.

In view of the above points, the present invention provides a color video signal recording / reproducing apparatus capable of intermittently reproducing at least one frame of data during high-speed reproduction in an apparatus for recording / reproducing on a tape-shaped medium. .

[0017]

To achieve the above object, a color video signal recording / reproducing apparatus of the present invention reproduces a high speed reproduction by a separate head on a part or all of a track on which a color video signal is recorded. The color video signal for recording is overlaid and recorded. Here, the color video signal for reproduction during high-speed reproduction is a color video signal in which a part of a frame of the color video signal is extracted and duplicated. And The conventional color image signal is reproduced during normal reproduction, and the changeover color image signal is reproduced during high speed reproduction during high speed reproduction.

[0018]

With the above-described structure, the present invention does not output temporally different frames to the same screen during high-speed reproduction, and intermittently reproduces images at the same time on the same screen even during high-speed reproduction. Is possible.

[0019]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A first embodiment of the present invention will be described below with reference to the drawings. FIG. 1 is a block diagram of a main part of a color video signal according to an embodiment of the present invention.

In FIG. 1, the color video signal input from the input terminal is output by the A / D converter 1 to 120 Mbps.
It is converted into digital data of a certain degree and transmitted to the high efficiency encoding circuit 2. The digital data transmitted to the high-efficiency coding circuit 2 is, for example, 40 Mb using DCT or the like.
It is converted into digital data of about ps and transmitted to the channel division circuit 3. The digital data input to the channel dividing circuit 3 is divided into two channels,
It is transmitted to the error correction coding circuit 4 and the error correction coding circuit 7. After that, since the error correction coding circuit 4 and the error correction coding circuit 7, the modulation circuit 5 and the modulation circuit 8, and the recording amplifier 6 and the recording amplifier 9 perform the same operation, respectively, the error correction coding circuit 4 and the modulation circuit 5 are performed. The operation of the recording amplifier 6 will be described.

The digital data input to the error correction coding circuit 4 is added with an error correction parity symbol such as a Reed-Solomon product code and transmitted to the gate 10 and the modulation circuit 5. Further, error correction codes such as Reed-Solomon product codes are described in detail in Imai, "Code Theory" (edition of the Institute of Electronics, Information and Communication Engineers). The digital data input to the modulation circuit 5 is converted into a recording code such as NRZ and transmitted to the recording amplifier 6. Further, recording codes such as NRZ are described in detail in "Digital Video Recording Technology" (Nikkan Kogyo Shimbun) by Eto et al.

At this time, the band of the fundamental wave component is 0 to 10 MHz shown by the solid line in FIG. Then, the recording amplifier 6 forms a first recording track on the magnetic tape 20 via the head 22 and the head 24. Further, the head 22 and the head 24 are combination heads each having a reverse azimuth. Reference numeral 18 denotes a rotary cylinder, and the rotary cylinder 18 includes a head 22 and a head 2 of a combination head.
Eight heads, 3 and 24 and 25 are provided.

Reference numeral 19 is a cylinder rotation direction, and 21 is a magnetic tape running direction. The error correction coding circuit 7, the modulation circuit 8, and the recording amplifier 9 also perform the same operation as above, and the head having the other azimuth of the head 22 (the azimuth of the head to which a signal is input from the recording amplifier 6 is opposite to that of the head). Digital data is recorded on the magnetic tape 20 via the azimuth head). Here, the digital data transmitted from the error correction coding circuit 4 to the gate 10 will be described. Here again, the gate 10, the gate 14, the special reproduction image data generation circuit 11, the special reproduction image data generation circuit 15, the modulation circuit 12, the modulation circuit 16, the recording amplifier 13, and the recording amplifier 17 perform the same operation.

Regarding the data input to the gate 10, the gate 10 transmits only the digital data of the frame to be recorded to the special reproduction image data generation circuit 11, and the digital data of the other frames is generated as the special reproduction image data. Not transmitted to circuit 11. In the present embodiment, the special reproduction image data generation circuit 11 generates one frame for every four frames.
To transmit. Then, the special reproduction image data generation circuit 1
In 1, the digital data of the transmitted frame is copied a plurality of times and transmitted to the modulation circuit 12. In this embodiment,
Make three copies.

The operation of the gate 10 and the special reproduction image data generation circuit 11 will be described in more detail with reference to FIG. In FIG. 5, (A) is an image frame that flows in the time direction, and is an image frame that is later in time from P0 to P7. FIG. 5B shows digital data of an image frame recorded on the magnetic tape, which is P0 to P7.
Corresponds to P0 to P7 of the image frame of (A).
FIG. 5B shows the first signal recording track.

FIG. 5C shows digital data of the image frame recorded on the magnetic tape, and P0 and P4 correspond to P0 and P4 of the image frame of (A). FIG. 5C shows the second signal recording track, which is a special reproduction digital color video signal. In this case, it is assumed that special playback is high-speed playback that is 4 times the normal speed. Further, in FIG. 5, the recording track is perpendicular to the tape running direction, but this is for the purpose of facilitating the explanation, and there is no problem even with the conventional helical scan.

In the gate 10, the digital data P0 and P4 of the sequentially input digital data are transmitted to the special reproduction image data generation circuit 11, and the other P1,
Digital data of P2, P3, P5, P6 and P7 is not transmitted to the special reproduction image data generation circuit 11. Then, the special reproduction image data generating circuit 11 uses the memory or the like to generate the digital data of P0 so that the same data as P0 is recorded on the magnetic tape for the time of 4 frames. That is, the second recording track P0 is formed on the first recording tracks P0 to P3. Similarly, the second recording track P4 is formed on the first recording tracks P4 to P7.

Here, the special reproduction image data generation circuit 1
1 will be described in more detail with reference to FIG. FIG. 7 is a block diagram of the special reproduction image data generation circuit 11, where 51 is a storage circuit and 52 is a gate.

When one frame of data is input from the gate 10 to the special reproduction image data generation circuit 11, the data is input to the storage circuit 51 and transmitted to the modulation circuit 12 after one frame. At the same time, it is transmitted to the gate 52. The gate 52 transmits data to the storage circuit 51 except when the data from the gate 10 is input to the special reproduction image data generation circuit 11.

In the modulation circuit 12, the digital data is converted into a signal having a band of 10 to 20 MHz indicated by a broken line in FIG. 4 by using, for example, a four-valued QPSK system, and the recording amplifier 13 outputs the signal through the head 23 and the head 25. A second recording track is formed on the magnetic tape 20. At this time, the head 23 and the head 25 are combination heads having reverse azimuth. Like the recording amplifier 13, the recording amplifier 17 also has a head having the other azimuth of the head 23 and the head 25 (a head of reverse azimuth with respect to the azimuth of the head to which a signal is input from the recording amplifier 13). A second recording track is formed on the magnetic tape 20.

Here, the recording amplifier 6 and the recording amplifier 9
Is the recording level at which the recording current value of the head 22 and the head 24 is almost the maximum at the reproduction output from the magnetic tape,
The so-called saturated recording level is set. On the other hand, the outputs of the recording amplifier 13 and the recording amplifier 17 are set to an unsaturated recording level in which the recording current values of the head 23 and the head 25 are lower than the recording level at which the reproduction output from the magnetic tape is maximum. . Since the recording levels of the two heads 23 and 25 are small, even if the second signal recording track overlaps the first signal recording track,
The first signal is hardly erased, and the second signal can be newly recorded.

FIG. 2 shows an example of the recording track pattern. The head 22 and the head 24 are combination heads having azimuth angles of +6 degrees and -6 degrees, respectively. Further, the head 23 and the head 25 are respectively −
A combi head having azimuth angles of 15 degrees and +15 degrees. In FIG. 2, T1 (+6) and T1 (-6)
Are tracks recorded by the head 22 and the head 24, T2 (+15) and T2 (-15) are, respectively,
The tracks are recorded by the head 23 and the head 25, respectively. Also, T1 (+6), T1 (-6)
Has a recording track width of 19.3 μm, T2 (+15),
The recording track width of T2 (−15) is 10 μm. The recording track width is not limited to that in this embodiment, and other recording track widths and the tracks T1 and T2 may have the same width.

FIG. 3 shows a sectional view of the magnetic tape. 60 is a magnetic layer, 61 is a signal recording layer, 62 is a signal non-recording layer, 63
Is a base film and 64 is a back coat. In FIG. 3, 65 is a T1 (+6) track and 66 is a T2 (-).
15) tracks, 67 is a T1 (-6) track, and 68 is a T2 (+15) track. Since the recording level of the T2 (+15) track and the T2 (-15) track is small, the recording depth is shallow and the recording is mainly performed on the surface layer portion of the magnetic tape.

Next, the time of reproduction will be described. Reproduction amplifier 26, reproduction amplifier 33, low-pass filter 27, low-pass filter 34, demodulation circuit 28, and demodulation circuit 3
5 and switcher circuit 29 and switcher circuit 36
The decoding circuit 40 and the decoding circuit 41 operate in the same manner. Therefore, the reproduction amplifier 26 and the low-pass filter 2
7, the operation of the demodulation circuit 28, the switcher circuit 29, and the decoding circuit 40 will be described.

The reproduction signal obtained from the head 24 is input to the reproduction amplifier 26, amplified by the reproduction amplifier 26, and transmitted to the low pass filter 27. Low-pass filter 27
Then, the band of the solid line portion shown in FIG.
To transmit. In the demodulation circuit 28, the low pass filter 27
Digital data is extracted from the transmitted signal,
It is transmitted to the switcher circuit 29. The demodulation circuit 28
The operation of is similar to that of a demodulation circuit used in a conventional digital VTR, digital communication system, or the like.

In the switcher circuit 29, the demodulation circuit 28 and the decoding circuit 40 are connected during the normal reproduction, and the demodulation circuit 39 and the decoding circuit 40 are connected during the special reproduction. That is, the digital data from the demodulation circuit 28 is transmitted to the decoding circuit 40 during normal reproduction, and the digital data from the demodulation circuit 39 is transmitted to the decoding circuit 40 during special reproduction. The decoding circuit 40 is a circuit for decoding the error correction code, performs decoding processing of the error correction code on the digital data transmitted from the switcher circuit 29, and transmits the digital data to the channel synthesis circuit 42. The operation of the decoding circuit 40 is described in detail in the above-mentioned Imai, "Code Theory" (edited by the Institute of Electronics, Information and Communication Engineers).

In this embodiment, the channel synthesizing circuit 42 shows an example of 2-channel recording. Therefore, the digital data from the decoding circuit 40 which is the first channel and the digital data from the decoding circuit 41 which is the second channel are recorded. The data is combined and transmitted to the decoding circuit 43. The decoding circuit 43 is a circuit for decoding high efficiency encoding, decodes the digital data from the channel synthesizing circuit 42, and transmits it to the D / A converter 44. In the D / A converter 44, the decoding circuit 4
3 is a circuit for converting digital data from 3 into an analog color video signal.

Since the reproduction amplifier 37, the reproduction amplifier 30, the bandpass filter 38, the bandpass filter 31, the demodulation circuit 39, and the demodulation circuit 32 perform the same operation,
Here, the reproduction amplifier 37 and the bandpass filter 3
8 and the operation of the demodulation circuit 39 will be described.

The reproduction signal obtained from the head 25 is input to the reproduction amplifier 37, is amplified, and is transmitted to the bandpass filter 3
8 is transmitted. The bandpass filter 38 extracts the frequency region shown by the broken line in FIG. 4 from the input signal and transmits it to the demodulation circuit 39. The demodulation circuit 39 detects digital data from the signal from the bandpass filter 38 using, for example, Viterbi decoding, and transmits the digital data to the switcher circuit 29. The demodulation circuit 39 demodulates the waveform modulated by the modulation circuit 12, and although it is related to the modulation method, both the modulation circuit 12 and the demodulation circuit 39 can be performed by the conventional technique. The switcher circuit 29 performs operations such that the demodulation circuit 28 and the decoding circuit 40 are connected during normal reproduction, and the demodulation circuit 39 and the decoding circuit 40 are connected during special reproduction.

By the above-described reproduction operation, the signal from the first recording track is reproduced during normal reproduction. Then, during high speed reproduction, the signal from the second recording track is reproduced. FIG. 6 shows the head locus at the time of high-speed search at 4 × speed in the case of the present embodiment, and FIG. 11 shows the reproduction screen at that time. 6 and 11, skip search is performed every 4 frames during high-speed reproduction, but skip search is performed every 4/30 seconds, so that there is almost no problem visually.

In the present embodiment, the case has been described where quadruple-speed high-speed reproduction is performed, but it goes without saying that other double-speed high-speed reproduction can be easily realized.

[0042]

As described above, according to the present invention, by recording the color video signal to be reproduced at the time of high speed reproduction by another head on a part or all of the track on which the color video signal is recorded, In high-speed playback, frames that are temporally different are not output to the same screen, and even during high-speed playback, the images at the same time are played back intermittently on the same screen, making it a visually almost comfortable feel. Search is possible.

[Brief description of drawings]

FIG. 1 is a block diagram of a signal processing unit of a color video signal recording / reproducing apparatus according to an embodiment of the present invention.

FIG. 2 is a recording track pattern diagram in one embodiment of the present invention.

FIG. 3 is a sectional view of a magnetic tape for explaining a signal recording state on the magnetic tape according to the embodiment of the present invention.

FIG. 4 is a diagram for explaining frequency allocation of recording signals in an embodiment of the present invention.

5A is a diagram showing an image frame flowing in the time direction. FIG. 5B is a diagram showing a first signal track recorded on a magnetic tape. FIG. 5C is a high-speed reproduction recorded on a magnetic tape. Showing the second signal track of the

FIG. 6 is a diagram of a head scanning locus during high-speed reproduction according to an embodiment of the present invention.

FIG. 7 is a diagram of a special reproduction image data generation circuit according to an embodiment of the present invention.

FIG. 8 is a block diagram of a signal processing unit of a conventional color video signal recording / reproducing apparatus.

9A is a diagram showing an image frame flowing in the time direction. FIG. 9B is a schematic track pattern diagram of an image frame recorded on a magnetic tape. FIG. 9C is digital data of the image frame recorded on the magnetic tape. Showing

FIG. 10 is a diagram of a head scanning locus during high-speed reproduction in a conventional digital VTR.

FIG. 11 is a diagram of a playback screen during high-speed playback according to the present invention.

FIG. 12 is a diagram of a playback screen during high-speed playback of a conventional digital VTR.

[Explanation of symbols]

 1 A / D converter 2 High efficiency coding circuit 3 Channel division circuit 4 Error correction coding circuit 5 Modulation circuit 6 Recording amplifier 7 Error correction coding circuit 8 Modulation circuit 9 Recording amplifier 10 Gate 11 Special reproduction image generation circuit 12 Modulation circuit 13 Recording amplifier 14 Gate 15 Special reproduction image generation circuit 16 Modulation circuit 17 Recording amplifier 18 Rotation cylinder 19 Cylinder rotation direction 20 Magnetic tape 21 Magnetic tape running direction 22-25 Head 26 Reproduction amplifier 27 Low-pass filter 28 Demodulation circuit 29 Switcher Circuit 30 Reproducing amplifier 31 Band pass filter 32 Demodulating circuit 33 Reproducing amplifier 34 Low pass filter 36 Switcher circuit 35 Demodulating circuit 37 Reproducing amplifier 38 Band pass filter 39 Demodulating circuit 40 Decoding circuit 41 Decoding circuit 42 Channel synthesis Road 43 decoding circuit 44 D / A converter 51 storage circuit 52 gate

Claims (7)

[Claims] 1. A / D for an input color video signal
A / D converter that performs conversion and A / D conversion by the A / D converter
An error correction coding circuit for adding an error correction parity symbol to the converted digital data, and a recording having a first bandwidth suitable for recording the digital data from the error correction coding circuit. A first modulation circuit for converting into a code, a first recording amplifier for amplifying a signal transmitted from the first modulation circuit suitable for recording, and a signal transmitted from the first recording amplifier. The first head for recording on the medium and part of the digital data of all the digital data transmitted with respect to the digital data from the error correction coding circuit are transmitted to the special reproduction image data generation circuit. A gate, a special reproduction image data generation circuit for copying the digital data transmitted from the gate for a plurality of frame times, and the special reproduction. A second modulation circuit for converting the data transmitted from the use image data generation circuit into a recording code having a second bandwidth, and an amplification suitable for recording the signal transmitted from the second modulation circuit. A color video signal recording / reproducing apparatus comprising a second recording amplifier for performing the above, and a second head for recording the waveform transmitted from the second recording amplifier on the recording medium. 2. A special reproduction image data generation circuit receives data from a gate as input, a storage circuit for transmitting data of a modulation circuit and a second gate for each time of one frame, and a storage circuit from the gate. 2. The color video signal recording / reproducing apparatus according to claim 1, further comprising a second gate for transmitting the input data to the storage circuit when there is no input data. 3. A first reproduction amplifier for amplifying a signal reproduced by a first head, and a first band for extracting a first band from the signal from the first reproduction amplifier and transmitting the first band to a first demodulation circuit. No. 1 filter, a first demodulation circuit for extracting a digital signal from the signal from the first filter and transmitting it to a switcher circuit, and a second reproduction amplifier for amplifying a waveform reproduced by the second head. And a second filter for extracting the second band from the signal from the second reproduction amplifier and transmitting it to the second demodulation circuit, and a digital signal from the signal from the second filter, and the switcher A second demodulation circuit for transmitting to the circuit, a decoding circuit for decoding the error correction code for the digital signal from the switcher circuit, and transmitting to the D / A converter, and a decoding circuit from the decoding circuit. The digital signal includes a D / A converter for converting an analog signal, the switcher circuit,
A color video signal recording / reproducing apparatus for transmitting a digital signal from the first demodulation circuit to the decoding circuit during normal reproduction, and transmitting a digital signal from the second demodulation circuit to the decoding circuit during high-speed reproduction. . 4. A high-efficiency encoding circuit for performing data compression on a digital signal from an A / D converter and transmitting the compressed data to an error correction encoding circuit. The color video signal recording / reproducing apparatus according to claim 1. 5. A second decoding circuit for decoding a digital signal from a decoding circuit for decoding an error correction code into a high efficiency code and transmitting the decoded signal to a D / A converter. The color video signal recording / reproducing apparatus according to claim 3. 6. A channel division circuit for dividing a digital signal from a high efficiency encoding circuit into a plurality of channels and transmitting the divided signals to a plurality of error correction encoding circuits, wherein each signal divided by the channel division circuit is provided. 5. The color video signal recording / reproducing apparatus according to claim 4, wherein the color video signal recording / reproducing apparatus is configured so that an error correction code is applied to the image data, and modulation / special reproduction image data is generated and modulated and recorded on a recording medium. 7. A plurality of reproduction amplifiers and filters, a demodulation circuit, a switcher circuit and a decoding circuit for obtaining a reproduction signal from a recording medium recorded by a plurality of recording channels, and synthesizing digital data from the plurality of decoding circuits. The second decoding circuit further comprises a channel synthesizing circuit for transmitting the synthesized data.
The described color video signal recording / reproducing apparatus.