JPH06348855A - Plotting processor and straight line generation parallel processing method for the same and graphic board and cad system - Google Patents

Abstract

PURPOSE:To attain a processing without providing with a divider inside, and to attain the high speed of straight line plotting by imparting a straight line with both a start point and an end point at the time of plotting the straight line in parallel by plural plotting processors. CONSTITUTION:An inclination is obtained in the form of fraction from the coordinates of the start point and end point of a straight line, and the inclination is successively added from the start point, and the coordinate of a picture element on the straight line is obtained. At that time, the value of the numerator of the inclination is multiplied by 2, 4, and 8, and added by an adder 82, and the value of the denominator is subtracted by an adder 83, and the coordinates ahead of 2 picture element, 4 picture elements, and 8 picture elements are obtained. The straight line is imparted with the start point and the end point so that the load of a host processor can be reduced. Also, the picture element is generated in parallel by the plural plotting processors so that the high speed processing can be attained, and it is not necessary to provide with the divider inside the plotting processor so that hardware amounts can be reduced.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for generating a straight line graphic on a display screen of a workstation, and more particularly, it is suitable for performing a high speed straight line drawing process by a drawing processor having a plurality of processors. Straight line generation parallel processing method and the like.

[0002]

2. Description of the Related Art A conventional apparatus for drawing a straight line is roughly 2
It is divided into types. One is, for example, Japanese Patent Publication No. 2-4179.
As described in Japanese Patent No. 0, the deviation between the true straight line and the coordinate system of the integer lattice in the image memory is represented by a fraction,
A method to generate the pixel in the image memory that is closest to the straight line given only by the fractional calculation (Bresenham's algorithm)
Is. Secondly, as described in, for example, Japanese Patent Laid-Open No. 3-36676, the slope of a straight line is given as a decimal number, and the value of the slope is repeatedly added to the starting point coordinates, so that the pixels on the straight line are determined. This is the method that occurs.

On the other hand, as a method for generating pixels on a straight line in parallel by a plurality of processors, Japanese Patent Laid-Open No. 207/207
There is 886 issue. In this conventional technique, only the necessary pixels are generated by multiplying the slope of the straight line by the number of processors and adding the value to the start point of the straight line.

[0004]

The prior art in which a plurality of processors are used to generate a straight line in parallel is effective for simultaneously obtaining the coordinates and brightness of pixels on a straight line, but Even if it is constant, division is required to find the slope of the straight line. For this reason, there is a problem that the load on the upper processor becomes heavier than that of the method using the Bresenham algorithm. Specifically, when the Bresenham algorithm is used, the data to be given is only the coordinate data of the start point and the coordinate data of the end point, whereas in the case of the method of expressing the slope by decimals, x and y of the start point and the end point are used. In addition to the coordinates, it is necessary to give a value for the slope with sufficient accuracy and the length of the straight line. Furthermore, division must be performed to obtain the slope of the straight line, which increases the load on the host processor. I will end up.

An object of the present invention is to improve the Bresenham's algorithm so that when a plurality of processors are used to generate straight lines in parallel, a straight line generation parallel processing method and a drawing processor capable of reducing the load on the upper processor, and the drawing processor are provided. The purpose is to provide a CAD system or the like used.

It is another object of the present invention to provide a straight line generation parallel processing method and the like which is not accompanied by enormous increase in hardware when improving the Bresenham algorithm.

[0007]

The above-mentioned object is to have an input means for designating a straight line to be drawn by starting point coordinates and ending point coordinates in parallel processing of a straight line drawing having a plurality of drawing processors, and an image memory. Means for dividing the pixels into pixel groups for each periodic array and assigning one drawing processor to each pixel group, and each drawing processor executing the Bresenham algorithm with the pixel group that it handles and the pixels corresponding to the straight line When the error term indicating the deviation between the pixel coordinate and the true straight line is an improper fraction, the denominator is repeatedly subtracted from the numerator to convert it into a mixed number, and the integer part of this mixed number is added to the pixel coordinate. This is achieved by providing means for successively finding pixels corresponding to a straight line and means for drawing the pixels found by each drawing processor on the screen.

[0008]

Function: Briefly, Bresenham's algorithm is
This is a method in which the slope of a straight line is expressed by a fraction (true fraction), and the slope is sequentially added to the coordinates of the starting point to obtain pixels on the straight line. As the denominator of the fraction representing the slope, the larger absolute value of the difference dx, dy between the x and y coordinates of the start point and the end point of the given straight line is set, and the smaller value is set as the numerator. The former is the major axis component L and the latter is the minor axis component S. L is also the number of pixels generated. Now, for the sake of simplicity, the straight line is the first
It is assumed that the inclination is 45 degrees or less in the quadrant. By adding the slope S / L to the starting point coordinates of the straight line, the next pixel on the straight line can be obtained. However, it is necessary to round the obtained results in order to obtain the pixel closest to the straight line. Therefore, it is necessary to add +0.5 to the value of the y coordinate (short axis component side) of the starting point in advance, but since the coordinates are expressed by fractions, the denominator of the fraction expressing the slope is 2L and the numerator is 2S. And double each, and the decimal part of the y coordinate of the starting point is L
/ 2L. In actual hardware, an error term E, which is a deviation between a true straight line and an integer lattice (pixel coordinates), is first set to L, and the numerator 2S of the inclination is added to it. As a result, the coordinates of the pixel next to the starting point can be obtained by a fraction. At this time, if the error term E is larger than 2L, it is an improper fraction, so it is necessary to convert this into a mixed fraction, 2L is subtracted from the numerator, and the integer part of the starting point y coordinate is updated by 1. The x coordinate, which is the major axis component, is updated by 1 regardless of the value of E. By repeating this process, the pixels on the straight line can be obtained only by addition and subtraction.

Now, in order to allow such a straight line generation method to be processed in parallel by a plurality of processors, consider the case where, for example, the processing is performed by two processors which handle pixels with an odd x coordinate and pixels with an even x coordinate. When the x, y coordinates of a certain pixel are obtained, the next next pixel may be obtained. The processing time can be halved because the adjacent pixel is sought by the other processor in parallel. For that purpose, it is necessary to add an inclination of 2 pixels (4S) to the error term E. Further, when the result is an improper fraction, it is necessary to update the integer part of the y coordinate by 1 or 2. If the number of processors increases, the slope added to the error term E may be set to a value obtained by multiplying the number of processors by 2S so that the range of the updated value of the y coordinate can correspond from 0 to the number of processors. .

Now, the bit length of the gradient added to the error term E becomes longer than that in the case where only one processor performs such processing, and a determination circuit for determining how much to update the y coordinate is also required. Is. Among these, the latter needs to have a plurality of circuits for subtracting the value of the denominator from the numerator of the error term. Here, focusing on the fact that the value for updating the y coordinate is 0 or 1 when the straight line is close to horizontal, the amount of hardware was reduced. That is, there is only one circuit that subtracts the denominator 2L from the error term E as a determination circuit that determines how much the y coordinate should be updated, and the subtraction is repeatedly performed until the error term E becomes 2L or less. As a result, the quantity of the determination circuit can be reduced.

Further, since a plurality of processors generate pixels for their owns in parallel, pixels on a straight line can be generated at high speed, and whether the error term E becomes an improper fraction is larger than a denominator. Even if only one circuit is used, if the inclination is small, the determination can be performed once, so that high speed can be maintained.

[0012]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to FIGS. FIG. 1 is a configuration diagram of a main part of a CAD system that processes and displays straight line drawing in parallel. CPU3
Is a higher-level processor that executes a program stored in the main memory 4, and performs a process of giving the starting point coordinates and the ending point coordinates of the straight line to the drawing processor 1 and the drawing processor 2 that are a plurality of processors that generate the straight line. To do.
The drawing processor 1 generates the pixels on the straight line given from the host processor 3 to the frame memory 5 which stores only the pixels of which the x coordinate on the display screen is even. The drawing processor 2 is physically the same as the drawing processor 1 and generates a straight line for the frame memory 6 which stores only pixels having an odd x coordinate on the display screen.

The identification signal for designating which frame memory these drawing processors 1 and 2 are connected to is the PiD signal. In this case, "0" is given to the drawing processor 1 and Set “1” for 2. The pixels stored in the frame memory 5 and the frame memory 6 are always read out in the order of coordinates and are sent to the RAMDAC 7 composed of a color conversion table and a DA converter to be converted into RGB video signals. It is displayed on a CRT monitor (not shown). CR contents of this frame memory
Since the technique of displaying on T is widely known, the details are omitted here.

The state of the pixels handled by the drawing processor 1, that is, the pixels stored in the frame memory 5 is shown in FIG.
Shown in. The circle in the figure indicates one pixel. When two drawing processors are used in this way, pixels to be processed are arranged in every x pixel in the x-axis direction, as shown in FIG. When four drawing processors are used, as shown in FIG. 2B, the x and y coordinates are processed in every one pixel, or
Alternatively, the pixels to be processed are assigned every three pixels with respect to the x coordinate. In this case, the identification signal PiD of the drawing processor
Is composed of 2 bits so that up to 4 drawing processors can be allocated to the x coordinate, and 2 bits so that 4 drawing processors can be allocated to the y coordinate. Therefore, the drawing processor can be expanded up to 16.

FIG. 3 is an internal block diagram of the drawing processor 1. The drawing processor 1 includes a parameter calculation unit 11 and
It includes a pixel generation unit 12, a frame memory (FM) writing unit 13, and a control unit 14. This parameter calculation unit 1
1 is the start point (xs, ys), the end point (xe, ye), the slope (xe / dx, ye / dy), and the length (len) of the straight line set by the CPU 3 (FIG. 1) via the system bus. , It has a register that holds a command (COM) that indicates whether a straight line is given by the start point and end point or by the start point and slope length, and generates various parameters from these values. Then, the pixel generation unit 12 generates the coordinates of the pixel indicated by the identification signal PiD according to the parameters generated by the parameter calculation unit 11, and the FM writing unit 13 generates the pixel coordinates generated by the pixel generation unit 12. According to the above, pixels are written in the frame memory 5 (FIG. 1). The control unit 14 includes the CPU 3
It is determined that the command has been activated by, and a control signal is sent to the pixel generation unit 12 and the FM writing unit 13 so as to generate and write pixels for the length of the activated straight line.

FIG. 4 is a detailed configuration diagram of the parameter calculation unit 11. The parameter calculation unit 11 includes a register xs and a register ys for holding the (x, y) coordinates of the starting point of the straight line.
When the straight line is given by the start point and the end point, the register xe and the register ye which are treated as (x, y) coordinates of the end point of the straight line are the same in substance, but the straight line is given by the start point, the inclination and the length. A register dx and a register dy which are treated as the gradient components of the x-axis and the y-axis of the straight line, and a register which holds the length of the straight line when the straight line is given by the starting point, the slope and the length
There are 6 registers, COM, which start the generation of a straight line for the drawing processor 1 by instructing len and whether a straight line is given at the start point and the end point or a straight line is given at the start point, the inclination, and the length. , Signal lines xs and ys indicating the x and y coordinates of the starting point, sine signals sgnX and sgnY indicating which of the four quadrants the direction of the straight line is, and the inclination of the straight line is 4 with respect to the x axis.
A signal longX indicating 5 degrees or less or 45 degrees or more, the difference between the x and y coordinates of the start and end points of the straight line, or the slope dx of the straight line,
A signal short indicating the shorter absolute value of dy, a signal length indicating the longer absolute value, and a signal COM in which the contents of the register COM are output are output.

The subtractor 111 and the subtractor 112 obtain the difference between the x and y coordinates of the start point and the end point. The selectors 113 and 114 select the outputs of the subtractors 111 and 112 and the slope values of the straight lines held in the registers dx and dy according to the contents of the signal COM.

Absolute value calculator 115 and absolute value calculator 116
Is an absolute value of the outputs of the selector 113 and the selector 114, compares the outputs of the absolute value calculator 115 and the absolute value calculator 116 with the comparator 117, and the selector 118 determines the absolute value calculator with the comparison result of the comparator 117. 115 and the output of the absolute value calculator 116, whichever is smaller, is selected and output, the selector 119 selects the larger one, and when the signal COM indicates that a straight line is given at the start point and the end point, it is output as it is, Otherwise, the value stored in register len is output.

FIG. 5 is a detailed block diagram of the pixel generation section 12. The pixel generation unit 12 follows the signal group output from the parameter generation unit 11 and the control signal generated by the control unit 14 so that the x and y coordinates of the pixel to be written in the frame memory 5 and the signal px,
py and the signal ajust indicating that it is not valid, and the signals next_sameX and next_sameY indicating whether the x and y coordinates match the pixel specified by the identification signal PiD (the pixel it has) after the next coordinate update. And a signal same indicating whether the coordinates indicated by the signals px and py match the pixel designated by the identification signal PiD.
Comparator 122 and comparator 123 for obtaining and outputting X and sameY
And an RGB register 124 indicating the color of a straight line set by the CPU 3 via the system bus.

When the pixel writing signal PIXEL_OUT output from the control unit 14 is output, the FM writing unit 13 outputs R to the coordinates px and py of the frame memory 5 output from the pixel generation unit 12.
The value of the pixel output from the GB register is written. The frame memory 5 outputs a permission signal FM_accept to the control unit 14 to indicate whether or not writing can be performed.

FIG. 6 is a detailed block diagram of the control unit 14.
The control unit 14 according to the present embodiment includes a sequence unit 141,
It is composed of a counter unit 142. Sequence part 1
Reference numeral 41 recognizes that the command is activated by the write signal COM_WRITE to the COM register of the parameter calculation unit 11, and signals FM_accept, sameX, sameY, long.
According to the values of the X and ajust signal lines and the output line end of the counter section 142, the operation start signal load,
It outputs a 1-pixel update signal up1 and a 2-pixel update signal up2, a pixel write signal PIXEL_OUT to the FM writing unit 13, and a command permission signal COM_accept indicating whether or not the drawing processor 1 can accept activation of a command.

Here, the write signal COM_WRITE and the command permission signal COM_accept are connected to a system bus interface unit (not shown) which controls writing to registers inside the drawing processor.

Next, the pixel generating section 1 which is a feature of this embodiment
2 will be described in more detail. FIG. 7 shows the coordinate generator 12
It is a block diagram of 1. The coordinate generation unit 121 includes an x counter 125 that holds x coordinates, ay counter 126 that holds y coordinates, and an error calculation unit 8 that gives information as to whether or not to update these counters. .

The x counter 125 internally takes in the value of the signal xs when the signal load is output, and outputs it as a signal px. The signal sgnX is treated as an up / down signal,
When it is “1”, the x counter 125 is down-counted,
When it is "0", it is counted up. When longX is "1", the straight line has an inclination of 45 degrees or less with respect to the X-axis, and therefore the x counter 125 depends on the 3-bit carry signal carry (2: 0) output from the error calculator 8. Update the contents of the counter. At this time, if the signal up1 is "1", only "1" is updated, and if the signal up2 is "1", "2" is updated. However, when the signal ajust is "1", only the y counter 126 is updated and the x counter 125 does not change.

On the other hand, when longX is "0", the straight line has an inclination of 45 degrees or more with respect to the X axis. Therefore, when either of the signals up1 and up2 is "u1", the error calculation is performed on the x coordinate. 3-bit carry signal carry output from section 8
The y counter 126 is updated by the value of (2: 0). Further, the x counter 125 indicates whether the x coordinate of the next update matches the given identification signal PiD next_.
Output sameX.

The y counter 126 basically has the same function as the x counter 125. However, the only difference is that the value fetched by the load signal is the signal ys and the operation for longX is the reverse of that of the x counter 125.

In the error calculator 8, the error term E is initialized by the initialization signal err_init and updated by the signals up1 and up2. The result is output as carry signal carry (2: 0) and signal ajust.

FIG. 8 is a block diagram of the error calculator 8. The error calculation unit 8 is roughly divided into two types of operations.
That is, the operation when the straight line indicated by the signal COM is given by the start point, the inclination, and the length, and the operation when given by the start point and the end point are performed. Here, the former operation will be described first.

After the command for generating a straight line is activated, the control section 14 sends an initialization signal err_init to the error calculation section 8. At that time, the selector 81 selects “0.5”,
The adder 82 adds the signal short (S) indicating the slope value when the update signal up1 is "1", and adds twice or four times the signal short when the update signal up2 is "1", The adder 83 adds nothing and stores the integer part of the result in the carry register 84 and the decimal part in the error register 85.

When the coordinates of the starting point do not match the given identification signal PiD, that is, both sameX and sameY are "1".
If not, the control unit 14 outputs the update signal up1, and when both are “1”, the control unit 14 outputs the signal up2. How many times the value of the signal short is added by the adder 82 when the signal up2 is "1" depends on how many processors the straight line drawing device is composed of. This is signal config, which is set by an external pin (not shown). If the number of drawing processors indicated by the signal config is one pixel skipped, it is doubled and 3
To skip individual pieces, add 4 times the value.

Next, the operation when starting by giving a start point and an end point will be described. When a command is given to start a straight line at the start point and the end point, the selector 81 selects a value obtained by inverting the sign of the output of the error register 85 and the signal length.
The adder 82 adds the value of the slope and 2 times, 4 times, or 8 times the signal short (S). The adder 82 indicates the numerator value when the decimal part of the coordinate on the minor axis side of the pixel to be obtained next and the integer part of the carry are expressed by fractions.

The adder 83 outputs the operation result err of the adder 82.
When 0 is negative, that is, when the fractional part is represented by a true fraction, nothing is done. When it is positive, it is in the state of improper fraction, so double the length indicating the value of the denominator is subtracted. The sign bit of the operation result of adder 82 is stored in the least significant bit of carry register 84, and the operation result of adder 83 is stored in error register 85. The sign bit of the error register 85 is unconditionally stored in the register 86 and outputs a signal ajust indicating that the coordinate output is not valid.

In order to clarify the operation of the error calculator 8, a concrete example will be described with reference to FIGS. 9 and 10. The operation of the drawing processor 2 in charge of odd x-coordinates when the straight line line1 shown in FIG. 9A is activated will be described. The starting point coordinates (x, y) are given by (0, 0), and the ending point coordinates are given by (7, 5). The time chart at this time is shown at times T0 to T8 in the left half of FIG.

First, when the CPU 3 writes to the register COM, the signal COM_EXEC becomes "1". This signal COM_EXEC is output from the system bus interface section, and the control section 14 can know the activation of the command by this signal COM_EXEC. The control unit 14 outputs the signal CO
When M_EXEC becomes "1", the signal load is output next, and the output of the parameter calculation unit 11 is instructed to be taken into the x counter 125, the y counter 126, and the counter unit 132.

Next, the control unit 14 outputs the signal err_init for initializing the error calculation unit 8. At this point, the X coordinate is even and does not match the identification signal PiD, so the signal s
ameX is not "1". By the way, the short-axis component short output from the parameter calculation unit 11 is "5", and the long-axis component lengt
Since h is “7”, the value output from the adder 82 at this time is (−7) +2 (5) = 3. Since this is a positive number, the adder 83 subtracts twice the length. "-11" is stored in the error register 85. Further, the carry register 84 stores "1" because the operation result of the adder 82 is positive.

After the signal err_init, the control unit 14 outputs x, y.
An update signal is generated to update the coordinates, but since the coordinates (px, py) do not match the identification signal PiD at time T2, the signal up is updated so that the pixels are updated pixel by pixel until they match.
1 is output. At time T3, carry signal carry
Since (2: 0) is determined, the x counter 125 and the y counter 126 can obtain the coordinates of the next pixel, and in this case, the x coordinate, which is the long axis, is always "+1",
The y-axis, which is the short axis, is "+" because the carry signal is "1".
1 ”, the coordinates of the next pixel are the identification signal PiD
And the signals Next_sameX and Next_sameY are both “1”. From this, first, the error calculation unit 8
It turns out that the coordinates are obtained one pixel at a time from the next, the selector 81 selects the output of the error register 85, the adder 82 adds 4 times the signal short, and the result is (-11) +4.
(5) = 9, which is a positive value.
Double the value and store “−5” in the error register 85.

Further, the control unit 14 determines that the next pixel is an identification signal.
Update signal up1 is set to “0” because it matches PiD
Instead, the update signal up2 is output. At time T4,
When the update signal up2 is output, the x-coordinate, which is the long axis, is updated by 2 pixels, and the counter 132 that obtains the number of remaining pixels is also decremented by "2". However, the y coordinate, which is the short axis, is "1"
Update each time. If the sign of the error register 85 becomes positive, as at time T5, it means that the fraction representing the fractional part is still an improper fraction, and the y-counter, which is the minor axis, is updated once again. The error register 85 is updated until it becomes negative. At time T6, it can be determined that the signal ajust indicating that the coordinates are invalid is "1".

Next, the operation at the time of starting the drawing of the straight line line2 in FIG. 9B will be described. The straight line line2 has start point coordinates (1,
1) and the end point coordinates are (6, 6). Therefore, the long axis component
Both the length and the short axis component short are "5". Since the start point coordinates match the identification signal PiD, the adder 82 adds 4 times the signal short from the beginning to find the coordinates two pixels ahead when the error calculator is initialized. Therefore, the result is
(−5) + 4 · (5) = 15, and the error register 85
Stores (15) -2. (5) = 5. Therefore,
Since the signal ajust becomes “1”, at time T13, the y counter 126, the error register 85, and the carry register 84.
Only updated. By continuing the same processing until the counter 132 becomes “0” or negative, it is possible to generate pixels for which the x-coordinate in charge is odd.

According to the present embodiment, since two processors generate pixels on a straight line given by a start point and an end point in parallel, the speed of a straight line close to horizontal or vertical can be doubled as compared with the conventional one. . This is not only the effect of parallel processing, but also the amount of calculation performed by the upper CPU 3 is small, so that the speed of the entire straight line generator can be increased. Furthermore, since the same hardware can handle both cases where a straight line is given at the start point and the end point and cases where it is expressed by the start point, the slope, and the length, the function is improved, and at the same time, the hardware amount is efficiently used. be able to.

On the other hand, although not clearly shown in the above embodiment, the function of the adder 83 is twice the length of the long axis, that is, 4 times.
If you change to subtract 6 times, 6 times, and 8 times respectively, the signal indicating that the coordinates are being calculated is invalid.
Ajust is no longer necessary, and you can speed up the processor by a few minutes regardless of the slope of the line. That is, the decision circuit is provided by the number of values that the integer part can take when the improper fraction is converted into the mixed fraction.

[0041]

According to the present invention, when a plurality of drawing processors assigned to each pixel generate pixels on a straight line in parallel, the slope is represented by a fraction, and a given true straight line and the generated pixel are generated. The value of the slope is added to the deviation to sequentially generate the pixel closest to the straight line, and when the value of the deviation is an improper fraction, the denominator is repeatedly subtracted from the numerator, so the integer part is larger than "1". Even if it is an improper fraction, high-speed straight line drawing is possible with little hardware.

A means for subtracting the denominator from the numerator is
There is no waiting time to convert the value of the improper fraction to a mixed number by providing a number that corresponds to all possible values of the integer part when converted to a mixed number, that is, the number of drawing processors prepared in parallel. Therefore, the processing can be performed, and the processing speed can be further increased.

It is also possible to give the slope of the straight line as a decimal value, and the hardware is also used in common with the arithmetic unit for the fractional calculation, which is also effective.

[Brief description of drawings]

FIG. 1 is a configuration diagram of main parts of a CAD system according to an embodiment of the present invention.

FIG. 2 is a diagram showing an arrangement example of pixels on a frame memory which is handled by one drawing processor.

FIG. 3 is an internal configuration diagram of one drawing processor.

FIG. 4 is an internal configuration diagram of a parameter calculation unit.

FIG. 5 is an internal configuration diagram of a pixel generation unit.

FIG. 6 is an internal configuration diagram of a control unit.

FIG. 7 is an internal configuration diagram of a coordinate generation unit in the pixel generation unit.

FIG. 8 is an internal configuration diagram of an error calculation unit in the coordinate generation unit in the pixel generation unit.

FIG. 9 is a diagram showing pixels generated by one drawing processor when two straight lines are given.

10 is a time chart explaining how the drawing processor operates when the drawing operation of the two straight lines shown in FIG. 9 is started.

[Explanation of symbols]

1 ... 1st drawing processor, 2 ... 2nd drawing processor, 3
... CPU, 4 ... Main memory, 5 ... First frame memory, 6 ... Second frame memory, 11 ... Parameter calculating section, 12 ... Pixel generating section, 13 ... FM writing section, 14 ...
Control unit, 121 ... Coordinate generation unit, 132 ... Counter, 8 ...
Error calculator, 125 ... X counter, 126 ... Y counter, 85 ... Error register.

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Mitsuru Soga 7-1-1 Omika-cho, Hitachi-shi, Ibaraki Hitachi Ltd. Hitachi Research Laboratory (72) Inventor Koji Ozawa 5-2, Omika-cho, Hitachi-shi, Ibaraki No. 1 Incorporated company Hitachi Ltd. Omika factory (72) Inventor Takaharu Morishige 5-22-1, Kamisuihonmachi, Kodaira-shi, Tokyo Inside Hitachi Microcomputer System Ltd.

Claims (9)

[Claims] 1. In a straight line generation parallel processing method in which a plurality of drawing processors assigned to each pixel on an image memory generate a straight line in parallel, the slope of the straight line is represented by a fraction, and the fractional value of the slope is a pixel coordinate. When updating by adding to, when the error term indicating the deviation between the generated pixel coordinates and the true straight line becomes an improper fraction, it is converted to a mixed fraction by repeatedly subtracting the denominator from the numerator and the integer part Is added to the coordinates of the pixels, a straight line generation parallel processing method. 2. A straight line generation parallel processing apparatus in which a plurality of drawing processors assigned to each pixel on an image memory generate a straight line in parallel, wherein the slope of the straight line is represented by a fraction and the fractional value of the slope is represented by pixel coordinates. A means for adding and updating, a means for converting to a mixed fraction by repeatedly subtracting the denominator from the numerator when the error term indicating the deviation between the generated pixel coordinates and the true straight line becomes an improper fraction, and its integer And a unit for adding a unit to the coordinates of the pixel. 3. The straight line generation parallel according to claim 2, wherein when the error term becomes an improper fraction, a plurality of means for subtracting an integer multiple of the denominator from the numerator are provided to convert into a mixed fraction. Processing equipment. 4. The method according to claim 2, wherein the means for adding and updating the value of the inclination to the coordinates of the pixel when the inclination of the straight line is represented by a decimal number is common to the means for adding the fractional value of the inclination to the coordinates of the pixel. Then, the straight line generation parallel processing device characterized in that the designation of giving the slope as a decimal and the designation of giving as a fraction are selected. 5. A pixel on an image memory is divided into a pixel group for each periodic array, one drawing processor is assigned to each pixel group, and a pixel corresponding to a straight line connecting a given start point and end point is given to each drawing processor. Is a CAD system that calculates by calculation from the pixel group that it is in charge of, and means for expressing the slope of a straight line by a fraction, and adding the fractional value of the slope to the coordinates of the pixels that are arranged in a cycle of the pixel group and updated. A means for performing, a means for converting the numerator to the mixed fraction by repeatedly subtracting the denominator from the numerator when the error term indicating the deviation between the generated pixel coordinates and the true straight line becomes the improper fraction, and the integer part of the mixed fraction A CAD system comprising means for determining a pixel corresponding to a straight line by adding the pixel coordinates. 6. In a CAD system having a plurality of drawing processors for parallel processing of line drawing, input means for designating a line to be drawn by starting point coordinates and ending point coordinates, and pixels on an image memory for each periodic array. Means for dividing into pixel groups and assigning one drawing processor to each pixel group, and each drawing processor executing the Bresenham algorithm on the pixel group for which each drawing processor is in charge to obtain pixels corresponding to the straight line When the error term indicating the difference between the coordinate and the true straight line becomes an improper fraction, it is applied to the straight line by repeatedly subtracting the denominator from the numerator to convert it into a mixed number and adding the integer part of this mixed number to the pixel coordinates. A CAD system comprising means for sequentially obtaining pixels and means for rendering pixels obtained by each rendering processor on a screen. 7. A drawing processor that executes a straight line drawing process executes a Bresenham algorithm to obtain a pixel corresponding to a slope of a straight line connecting a start point and an end point, and when calculating a deviation between coordinates of the pixel and the straight line. When the error term shown becomes an improper fraction, the denominator is repeatedly subtracted from the numerator to convert it into a mixed number, and the integer part of this mixed number is added to the pixel coordinates to provide a means for successively finding pixels corresponding to a straight line. Is a drawing processor. 8. A single board is provided with one or a plurality of drawing processors according to claim 7, a frame memory written by the drawing processor, and means for converting data on the frame memory into RGB signals and outputting the RGB signals. A graphic board that is characterized. 9. In a CAD system in which a plurality of drawing processors perform a straight line drawing in parallel, a means for designating a straight line to be drawn only by specifying coordinates of a start point and an end point, and a position of the specified start point and end point are drawn. And a means for performing drawing without error, in which the starting point and the ending point of the straight line coincide with each other.