JPH06338854A - Digital portable telephone set - Google Patents

Abstract

PURPOSE:To prevent the generation of asynchronous interference and to secure the stable communication by instructing the line switching when detecting the fact that an interference burst signal comes close from both front and back direction of its own slot. CONSTITUTION:When the transmission burst of the other base station comes close from both front and back of its own slot, the pulse signal from an AND circuit 11 is latched by a latch circuit 13. The output value of the circuit 13 holds '1' until it is cleared by the latch clear signal from the timing circuit. The pulse signal is outputted from an AND circuit 10 as well while the output value of the circuit 13 is '1' and the pulse signal, that is, the line switching request signal is outputted from the circuit 14. The microcomputer which accepts the line switching request signal gives up the use of the slot used at present and prevents the asynchronous interference by changing the slot or changing the frequency.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a digital portable telephone apparatus capable of communicating via a base station to be communicated with by using a plurality of communication slots time-divided with a plurality of base stations. Regarding

[0002]

2. Description of the Related Art A mobile phone system uses radio to enable free mobile communication within a fixed area, and is a typical mobile communication mode for individuals. And, at present, land mobile communication by analog wireless communication using a specific frequency is performed.

A mobile telephone device as a communication terminal is a device that allows a person to carry and carry mobile communications while carrying it. Therefore, the transmission capacity of the mobile telephone device is inevitable, considering the battery capacity, the size of the terminal, the talk time and the like. It has a low power consumption. Then, a plurality of base stations physically located at different positions are provided, and terminals (slave stations) are provided within the communication zone of each base station.
When a mobile station moves, it can communicate with the other party via the corresponding base station.

By the way, by further developing such a portable telephone system, the contents of data transmission are diversified and progressed.
In order to support SDN, a digital mobile phone system that encodes a voice signal into a digital signal and performs time division multiplex communication is being constructed. In such a digital mobile phone system, the base station and the slave stations use the same radio frequency (generally, the frequency band of 1.9 GHz) is divided on the time axis for communication. There is. Specifically, a frame having a fixed time length, which is a basic period for transmitting and receiving a signal, is further divided into a plurality of small sections to form a plurality of time slots, which are assigned to each slave station. And using that assigned time slot,
The slave station communicates with the partner station via the base station. Therefore, in time division multiplex communication by a digital mobile phone system, a plurality of communication lines are formed between a plurality of base stations and a plurality of slave stations.

In this case, in order to prevent the burst signals transmitted to the slave stations from temporally overlapping with the transmission signals of other stations in the space and causing mutual interference,
We are trying to adjust the transmission timing. As a method of adjusting the transmission timing, there is a method called a time division multiple access method. In this method, one base station transmits a synchronization signal serving as a time reference for each slave station, each slave station detects the synchronization signal, and uses this synchronization signal as a time reference, and the downlink signal assigned to the own station. The time positions of the line (the circuit that receives the signal sent from the base station) and the uplink (the circuit that sends the signal to the base station) are confirmed, and each communication line is captured.

FIG. 5 is a schematic diagram showing an example of a frame structure used in the time division multiple access method. In this figure, one frame (T _f ) allocated on the time axis in which the passage of time is displayed from left to right is assigned to the transmission slots T ₁ , T _{2 to TN} on the base station side, and manner that is configured by the transmission slot R _1, R ₂ ~R _N subsequent slave station are shown. Then, by using a set of transmission slots composed of a transmission slot on the base station side (eg, T _N ) and a corresponding transmission slot on the slave station side (eg, R _N ), one base station and a plurality of slave stations are used. It is possible to perform N sets of two-way communication between them.

[0007]

However, according to the time division multiple access method described above, each base station adjusts the transmission timing with the slave station based on its own time reference, and the transmission between the base stations is performed. Timing is not synchronized at all. Further, in each base station, there is an accuracy error in the oscillator provided for measuring the transmission timing, and a subtle error may occur in the frame cycle managed by each base station. As a result, when a plurality of base stations try to communicate with a plurality of slave stations using a plurality of slots that are time-divided on the same frequency, another base station in the slot occupied by a certain base station The time position relative to the slot occupied by is shifted with the passage of time.

Then, while one base station is communicating with one slave station, burst signals from other base stations approach the position of the occupied slot and overlap in terms of time. This causes a situation where they interfere with each other. Such asynchronous interference can be detected by measuring the error rate of the received signal, etc. If asynchronous interference is detected, the slot used in order to restart normal communication. The frequency may be changed, or in the worst case, the transmission may be stopped or the communication line may be released.

The present invention has been made in view of the above circumstances, and it is possible to prevent the occurrence of asynchronous interference and to always ensure a stable call quality by using a time division multiple access digital mobile phone. The purpose is to provide a device.

[0010]

In order to achieve the above-mentioned object, the present invention detects the predetermined synchronization signal pattern in a burst signal transmitted from a base station to communicate with, thereby performing time-division. By capturing and occupying the own station downlink from the base station, and further by measuring the time position of the own station uplink to the base station, which is time-divided, using the captured synchronization signal of the own station downlink as a time reference. , In a time-division multiple access digital mobile phone device that captures and occupies the uplink of its own station, measures the electric field strength level of the received signal and compares it with a threshold value to approach the interference burst signal from another base station. Interference burst signal detection means, a time position that is a predetermined time before the front end position of the own slot having a time width corresponding to the own station uplink and / or own station downlink, and the own slot The interference burst signal detection time determining means for determining a time position after a predetermined time from the rear end position as the detection time by the interference burst signal detecting means, and the interference burst signal detecting means for causing the interference burst signal to be forward of the own slot. In the case where it is detected that the interference burst signal is approaching from the rear of the own slot, while the frame period is lengthened by a predetermined time in order to shift the own slot to the rear, An interference burst signal is approached from both front and rear directions of the own slot by a frame cycle control means for controlling the frame cycle to be shortened by a predetermined time in order to shift the own slot forward and the interference burst signal detection means. If it is detected, the line switching unit is instructed to switch the line. It is characterized in that a line switching instruction means.

[0011]

According to the above construction, in this digital portable telephone device, the electric field strength level of the received signal is measured by the interference burst signal detecting means, and this measured value is compared with the threshold value, so that the other base station. The approach of the interfering burst signal from is detected. In detecting the approach of the interference burst signal, the interference burst signal detection time determination means determines a time position before the front end position of the own slot, which is a time width corresponding to the own station uplink and / or downlink, and The time position after a predetermined time from the rear end position of the own slot is determined as the detection time.

Further, when it is detected that the interference burst signal is approaching from the front of the own slot by detecting the approach of the interference burst signal, the own slot is shifted backward so as to avoid interference. In addition, the frame cycle control means controls the frame cycle so that it becomes longer by a predetermined time. Further, when it is detected that the interference burst signal is approaching from the rear of the own slot, the frame period control means similarly shifts the frame period to a predetermined time to avoid interference by shifting the own slot forward. It is controlled to be short.

Further, when the approach of the interference burst signal is detected and it is detected that the interference burst signal approaches from both the front and rear directions of the own slot,
The line switching instructing means gives a line switching instruction to the line switching unit. As described above, during communication, even when an interference burst signal from another base station approaches, an appropriate frame period is adjusted,
The occurrence of asynchronous interference is avoided in advance. As a result, there is no need to change the slot or frequency used or stop transmission.

[0014]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be specifically described below with reference to the drawings. FIG. 1 is a block diagram showing a circuit configuration for performing frame cycle control of a mobile phone device according to the present invention. First, the radio signal from the base station received by the antenna 1 is applied to the RF block 2. The RF block 2 amplifies the received signal and then outputs an RSSI (electric field strength) signal indicating the level of the received signal to the comparator 3. The comparator 3 compares the input RSSI signal with a predetermined threshold value set for determining the presence / absence of a reception signal accompanied by asynchronous interference. When it is determined that there is a reception signal, “1”, When it is determined that there is no received signal, a received signal presence / absence signal which becomes “0” is applied to the frame cycle control circuit 6.

On the other hand, a VCO (voltage control oscillator) 4 is an oscillator for outputting a system clock, and this clock is applied to the timing circuit 5. The timing circuit 5 is a circuit that uses the clock from the VCO 4 to generate various timing signals used in the system. That is, a frame cycle signal for managing the timing of burst transmission / reception that is a frame cycle, a timing pulse signal 1 indicating the timing for checking the presence / absence of a burst signal immediately before the own slot, and the presence / absence of a burst signal immediately after the own slot are checked. A timing pulse signal 2 indicating the timing to perform and a latch clear signal for clearing the latch circuit (see FIG. 2) inside the frame cycle control circuit 6 are generated.

The frame cycle control circuit 6 checks the received signal presence signal (1 or 0) output from the comparator 3 at the timing of the timing pulse signal 1 and the timing pulse signal 2 output from the timing circuit 5,
Based on the result, n-bit V applied to the D / A converter 7
The value of the CO control data is changed, and a line switching request signal is output to the microcomputer 9 if necessary. The n-bit VCO control data is converted into an analog signal by the D / A converter 7, the high frequency component is removed by the LPF (low pass filter) 8 and applied to the VCO 4 to control the frequency of the system clock. used. Since the frame cycle signal is created based on the clock from the VCO 4 as described above, the frame cycle is eventually controlled by the n-bit VCO control data output from the frame cycle control circuit 6. Will be.

FIG. 2 is a block diagram showing the circuit configuration of the frame cycle control circuit 6 in FIG. As shown in the figure, the frame cycle control circuit 6 includes an n-bit counter 12, a latch circuit 13, and three AND circuits 10, 1
It is composed of 1 and 14. n-bit counter 12
Is loaded with the initial value m before starting the counter operation. In the AND circuit 10, FIG.
The logical product of the reception signal presence / absence signal output from the comparator 3 and the timing pulse signal 2 output from the timing circuit 5 is calculated, and the pulse signal output therefrom is input to the UP terminal of the n-bit counter 12. 1
It is counted up. Further, the AND circuit 11 calculates the logical product of the reception signal presence signal output from the comparator 3 and the timing pulse signal 1 output from the timing circuit 5, and the pulse signal output therefrom is the n-bit counter 12. Is input to the DOWN terminal of and the countdown is performed by one.

Therefore, in the n-bit counter 12, n-bit VCO control data Q1 to Qn are generated based on the pulse signals input from the AND circuit 10 and the AND circuit 11.
It outputs to each D / A converter 7 from each terminal. The pulse signal output from the AND circuit 11 is input to the latch circuit 13 and latched. The latch circuit 13 is cleared by the latch clear signal output from the timing circuit 5. Then, the logical product circuit 14 takes the logical product of the pulse signal output from the latch circuit 13 and the pulse signal output from the logical product circuit 10, and outputs a line switching request signal to the microcomputer 9.

FIG. 3 is a schematic diagram showing a state of asynchronous interference on the time axis. In this figure, the time axis t showing the passage of time from left to right is taken in the horizontal direction,
The arrangement on the time axis of the transmission slot T1 on the base station side and the transmission slot R1 on the slave station side forming one frame on the time axis t is shown. Also, in the figure, the shaded slots indicate transmission bursts from other base stations and slave stations communicating with the base station. Further, a certain time immediately before the transmission slot T1 is t1, a certain time immediately after the transmission slot T1 is t2, and a certain time immediately before the transmission slot R1 is t2.
3, a certain time immediately after is shown as t4, and a certain time before t3 is shown as t5.

(1) shows a state in which asynchronous interference has never occurred since the start of communication. In this state, the n-bit counter 12 is still loaded with the initial value m, and the initial value m is output as the VCO control data. In this case, the clock output from the VCO 4 has the standard frequency of the system, and the frame cycle has the standard cycle of the system.

In (2), the transmission burst of another base station is approaching from the front of its own slot (time t1 and t).
3 shows a state in which a transmission burst of another station is coming in). In such a state, the pulse signal output from the AND circuit 11 decreases the output value from the n-bit counter 12, that is, the value of the VCO control data by 1. As a result, the frequency of the clock output from the VCO 4 becomes lower, and the frame period becomes longer than the standard value. Regarding the operation of lengthening this frame period, until the relative time position of the burst signal approaching from the front of the own slot starts to move away from the front end of the own slot,
It is repeated every frame.

(3) is a state in which a transmission burst of another base station is approaching from behind the own slot (time t2 and t2).
4 shows a state in which a transmission burst of another station is coming in). In such a state, the pulse signal output from the AND circuit 10 increases the output value from the n-bit counter 12, that is, the value of the VCO control data by 1. As a result, the frequency of the clock output from the VCO 4 becomes higher, and the frame period becomes shorter than the standard value. Regarding the operation of shortening the frame period, until the relative time position of the burst signal approaching from the rear of the own slot starts to move away from the rear end of the own slot,
It is repeated every frame.

(4) is a state in which the transmission bursts of other base stations are approaching from the front and the rear of the own slot at the same time (time t1 and t2, and transmission bursts of other stations at time t3 and t4). The state). In such a state, first, the pulse signal output from the AND circuit 11 is latched by the latch circuit 13, and the output value from the latch circuit 13 is changed by the latch clear signal applied from the timing circuit 5 at time t5. Holds "1" until it is cleared. While the output value of the latch circuit 13 is 1, the AND circuit 1
A pulse signal is also output from 0, and a pulse signal, that is, a line switching request signal is output from the AND circuit 14. Therefore, the microcomputer 9 which has received the line switching request signal gives up the use of the currently used slot and switches the slot or the frequency to avoid asynchronous interference.

The presence / absence of a transmission burst of another station may be checked at a time t1 immediately before the transmission slot T1 on the base station side and a time t2 immediately after the transmission slot T1 on the base station side, as described above. It may be performed at time t3 immediately before R1 and time t4 immediately after R1. FIG. 4 is a flowchart showing the control contents of the frame cycle control circuit 6 shown in FIG. First, the initial value m is loaded into the counter 12 (S
1). Here, when the counter 12 is an 8-bit counter, m = 128. Next, when the timing is time t1 immediately before the transmission slot T1 shown in FIG. 3 (S2
In the case of Yes), the reception signal presence / absence signal is checked (S3), and in the case of "1" (that is, when the reception signal exists), the latch circuit 13 is set to "1" (S).
4), the counter 12 is counted down by "1" (S
5). Here, by setting the value of the counter 12 to "-1", the VCO control data is decreased by 1 and the VCO control voltage is lowered. As a result, the cycle of the system clock becomes long, and the frame cycle signal is generated by counting a certain number of system clocks. Therefore, the cycle of the frame cycle signal also becomes long. In this way, the position of its own slot shifts backward with respect to the interference burst signal. Also,
As a result of checking the reception signal presence / absence signal in S3, if the result is "0" (that is, no reception signal), the latch circuit 1
3 is set to "0" (S6).

Then, at time t immediately after the transmission slot T1
When the timing is 2 (Yes in S7), the reception signal presence / absence signal is checked again (S7).
8) In the case of "1" (that is, when there is a received signal), it is confirmed whether or not the latch circuit 13 is set to "1" (S9), and when it is set to "1" If Yes in S9, a line switching request signal is output to the microcomputer 9 (line switching unit) (S1).
0). If the latch circuit 13 is not set to "1" (No in S9), the counter 12
Is incremented by "1" (S11), and the process proceeds to S12.

As a result of checking the received signal presence / absence signal in S8, when it is "0" (that is, when there is no received signal)
It is confirmed whether or not the timing is at time t5, which is a certain time before the time t3 immediately before the reception slot R1 (S12), and if it is timing at time t5 (S1).
If Yes in 2), the latch circuit 13 is set to "0" (S13), and the process proceeds to S2.

[0027]

As described above, according to the present invention, even when an interference burst signal from another base station approaches, the frame period is appropriately adjusted, so that the occurrence of asynchronous interference is avoided in advance. Therefore, it is possible to reduce the frequency of occurrence of voice interruptions due to the slot switching operation and the frequency switching operation, and to reduce the risk of line disconnection that may occur due to lack of channel resources when performing those operations. it can. Therefore, when using the digital mobile phone device, it becomes possible to always ensure stable call quality, which greatly improves usability.

[Brief description of drawings]

FIG. 1 is a block diagram showing a circuit configuration for performing frame cycle control of a mobile phone device according to the present invention.

FIG. 2 is a block diagram showing a circuit configuration of a frame cycle control circuit 6 in FIG.

FIG. 3 is a schematic diagram showing a state of asynchronous interference on a time axis.

4 is a flowchart showing the control contents of the frame cycle control circuit 6 shown in FIG.

FIG. 5 is a schematic diagram showing an example of a frame configuration used in the time division multiple access method.

[Explanation of symbols]

 1 Antenna 2 RF Block 3 Comparator 4 VCO 5 Timing Circuit 6 Frame Cycle Control Circuit 7 D / A 8 LPF 9 Microcomputer

Claims (1)

[Claims] 1. A time-divided own station downlink from the base station is captured and occupied by detecting a predetermined synchronization signal pattern in a burst signal transmitted from the base station to be communicated, and further captured. The time-division multiple access digital system that captures and occupies the own station's uplink by measuring the time position of the own station's uplink to the base station that has been time-divided using the synchronization signal of the own station's downlink as a time reference. In the mobile phone device, an interference burst signal detection unit that detects the approach of an interference burst signal from another base station by measuring the electric field strength level of the received signal and comparing it with a threshold value; And / or a time position that is a predetermined time before the front end position of the own slot and has a time width corresponding to the downlink of the own station, and a time position that is a predetermined time after the rear end position of the own slot are the interference bars. Interference burst signal detection time determining means for determining the detection time by the automatic signal detecting means, and the interference burst signal detecting means, when the interference burst signal is detected to approach from the front of the own slot, The frame period is lengthened by a predetermined time in order to shift it to the rear, while the frame period is shifted to the front by a predetermined time in order to shift the own slot forward when it is detected that the interference burst signal approaches from the rear of the own slot. When the interference burst signal is detected to approach from both the front and the rear of the own slot by the frame cycle control means for controlling so as to shorten it, and the interference burst signal detection means, to the line switching unit. A mobile phone characterized by comprising line switching instruction means for instructing to switch the line. Telephone device.