JPH06338729A - Bias circuit - Google Patents

Abstract

PURPOSE:To improve the voltage use rate and to obtain a satisfactory linearity by setting the collector current of a transistor TR, which has the emitter directly grounded, to an optimum value by a current detecting circuit and detecting the minute change of the collector current with a satisfactory sensitivity and comparing it with the reference voltage preliminarily set by a differential amplifying circuit and changing it to a current value corresponding to the difference to feed back this value to the base of the TR. CONSTITUTION:A current detecting circuit 1 of small loss is interposed between a tuning circuit C2 and a low voltage power source, and a differential amplifying circuit 2 is connected to its detection output side, and the output side is connected to the base of a TR TR1. The passing current and the detection sensitivity of the current detecting circuit 1 and the reference voltage of the differential amplifying circuit 2 are set by a memory circuit 4 where data outputted from a control circuit 3 is stored. The output of the current detecting circuit 1 and the reference voltage are compared with each other by the differential amplifying circuit 2, and the output generated by this comparison is fed back to the base of the TR TR1.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a bias circuit for a transistor or FET of a high frequency amplifier which requires a high degree of linearity such as a receiver of a mobile phone.

[0002]

2. Description of the Related Art Conventionally, a high frequency amplifier of a portable telephone or the like is fed by a low voltage power source, and a grounded emitter type circuit shown in FIG. 3 is usually used. C ₁ and C ₄ are coupling capacitors, C ₂ and L ₁ are elements of the tuning circuit, C ₃ and C ₅ are AC bypass capacitors, R ₃ is an emitter resistor, and the voltage drop across the resistor R ₃ causes the transistor TR _{1 to} drop. The operating point is stabilized.

In addition, there is an emitter direct grounded circuit of FIG. 4, in which the base current is controlled by the collector current flowing through the resistor R ₅ to stabilize the operating point.

[0004]

The receiving portion of a portable telephone or the like is generally supplied with power from a low voltage power source, but efficient use thereof is indispensable. That is, between the collector and emitter of the transistor (between the drain and source of the FET)
It is necessary to increase the efficiency (voltage utilization rate) of (1) to obtain good linearity and reduce intermodulation.

[0005] In the circuit of Figure 3, the voltage of the low voltage power supply is divided into the voltage drop and the collector-emitter voltage of the emitter resistor and the circuit of Figure 4 is the collector current and the base current common flow resistor R ₅ Also takes a relatively large value from the viewpoint of stability, so that each circuit has a drawback that the voltage utilization rate is poor.

[0006]

In order to solve these problems, the present invention sets the collector current of a transistor whose emitter is directly grounded to an optimum value in a current detection circuit and makes a small change in the collector current good. The configuration is such that it is detected with sensitivity, compared with a preset reference voltage by a differential amplifier circuit, converted into a current value corresponding to the difference, and fed back to the base of the transistor.

Further, the voltage drop due to the collector current is made small in the current detection circuit. Hereinafter, embodiments will be described in detail with reference to the drawings.

[0008]

DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1 is a block diagram of an amplifier showing an embodiment, in which an amplifier circuit is a direct emitter-grounded transistor TR _{1 having} one stage. In the figure, 1 is a current detection circuit, 2 is a differential amplifier circuit, 3 is a control circuit, and 4 is a memory circuit.

The amplifier circuit comprises a transistor TR ₁ , coupling capacitors C ₁ and C ₄ , tuning circuits C ₂ and L _1, and an AC grounding capacitor C ₃ . A low-loss current detection circuit 1 is interposed between the tuning circuit and the low-voltage power supply, a differential amplifier circuit 2 is connected to the detection output side, and the output side is connected to the base of the transistor TR _1. . The control signal from the control circuit 3 stores each data of the operating point setting, the detection sensitivity setting, and the reference voltage V _r of the transistor TR _{1 in} the memory circuit 4. The memory circuit 4 outputs necessary data to the current detection circuit 1 and the differential amplifier circuit 2, respectively.

Next, the operation of the current detection circuit 1 and the differential amplifier circuit 2 will be described with reference to FIG. The collector currents of TR ₂ and TR ₃ are I ₂ , I ₃ , the emitter-base voltage is V _BE2 ,
V _BE3 , base current I _B2 , I _B3 , current flowing through R ₁ is I ₀ , and reference voltage is V _r , R ₁ I ₀ + V _BE2 = V _BE3 (1) R ₂ I ₂ = V _r ……… (2) Now, T so that I ₀ >> I ₂ and I _B2 << I ₃
When R ₂ , TR ₃ , R ₁ and R ₂ are selected, the constant current circuit A1 makes I ₃ almost constant and V _BE3 also almost constant.

Here, when the current flowing through the amplifier circuit increases due to a temperature change or the like, I ₀ R ₁ becomes large, and from the equation (1), V 0 can be obtained.
_BE2 is small, I ₂ also becomes small. When I ₂ becomes small, R ₂ I ₂
Becomes small, the output of the differential amplifier circuit 2 becomes small, the bias current (base current) of the amplifier circuit transistor becomes small, and I ₀ decreases. As a result, R ₁ I ₀ returns to the original value and the change is suppressed. That is, the stability of the operating point of the transistor is maintained. From these things, TR ₂ , TR ₃ , R
I ₀ can be set by appropriately selecting ₁ , R ₂ and V _r . Here, since R ₁ I ₀ is about 0.1 V, the collector-emitter voltage of the amplifier circuit becomes substantially the same as the power supply voltage, and the voltage utilization rate improves.

Further, as shown in FIG. 1, an appropriate value of stability such as I ₀ , detection sensitivity, reference voltage V _r, etc. is stored in the memory circuit 4 via the control circuit 3. Can be obtained.

In the case of an amplifier circuit of multi-stage connection, by increasing the number of parts by increasing the number of parts by integrating the bias circuits of each stage into an IC, each current value can be set from each section. By doing so, improvement in functionality and versatility can be expected.

The bias circuit can be applied even when the power supply voltage is high.

[0015]

As described above, since the collector-emitter voltage of the transistor of the amplifier circuit has almost the same value as the power supply voltage, the voltage utilization rate is improved and good linearity can be obtained.

Further, also in the case of a multistage amplifier, it is easy to form an IC, which is small in size and low in cost. From these points, it can be applied very effectively to mobile phones and the like with strict standards.

[Brief description of drawings]

FIG. 1 is a configuration diagram showing an embodiment of the present invention.

FIG. 2 is a circuit diagram showing details of a bias circuit.

FIG. 3 is a circuit diagram of a grounded-emitter circuit of a conventional example.

FIG. 4 is a circuit diagram of a conventional emitter direct grounding type circuit.

[Explanation of symbols]

 1 current detection circuit 2 differential amplifier circuit 3 control circuit 4 memory circuit

Claims (1)

[Claims] 1. An amplifier circuit fed by a low voltage power source, wherein a current detection circuit (1) and a differential amplifier circuit (2) are connected between a collector feeding point and a base of a transistor (TR ₁ ) of the amplifier circuit. Then, the memory circuit (4) for storing the data output by the control circuit (3) causes the passing current and detection sensitivity of the current detection circuit (1) and the reference voltage (V _{r of the} differential amplifier circuit (2)). ) Is set, and the output generated by comparing the output of the current detection circuit (1) with the reference voltage (V _r ) in the differential amplifier circuit (2) is fed back to the base of the transistor (TR ₁ ). A bias circuit configured as described above.