JPH06334313A - Manufacture of circuit board - Google Patents
Manufacture of circuit boardInfo
- Publication number
- JPH06334313A JPH06334313A JP12562793A JP12562793A JPH06334313A JP H06334313 A JPH06334313 A JP H06334313A JP 12562793 A JP12562793 A JP 12562793A JP 12562793 A JP12562793 A JP 12562793A JP H06334313 A JPH06334313 A JP H06334313A
- Authority
- JP
- Japan
- Prior art keywords
- conductor
- film
- circuit board
- resist
- manufacturing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
Landscapes
- Manufacturing Of Printed Wiring (AREA)
Abstract
Description
【0001】[0001]
【産業上の利用分野】本発明は、電子機器に使用される
回路基板の製造方法、特にセラミックス基板上に配線パ
ターンが形成された配線基板の製造方法に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a circuit board used in electronic equipment, and more particularly to a method of manufacturing a wiring board having a wiring pattern formed on a ceramics substrate.
【0002】[0002]
【従来の技術】従来よりセラミックス基板上に回路が形
成されてなる回路基板が電子機器等に広く使用されてお
り、その回路基板の1つとして、信号の伝送を担う、所
望の導体パターンが形成された配線基板が使用されるこ
とがある。従来、この配線基板は、セラミックス基板上
にめっきなどにより導体膜を形成すること等により製造
されるが、従来は、セラミックス基板にケミカルエッチ
ング処理、シーディング処理を施した後に化学めっきを
施すことにより導体膜が形成されていた。また、膜厚の
厚い導体膜を短時間で形成する場合、化学めっきによっ
て形成した導体を電極として電解めっきが行われる。こ
のようにして導体膜を形成した後、不要部分のみが露出
するようなレジストを形成し、エッチングによって不要
部分を除去して所望の導体パターンを得ていた。2. Description of the Related Art Conventionally, a circuit board having a circuit formed on a ceramic substrate has been widely used in electronic devices and the like. As one of the circuit boards, a desired conductor pattern for transmitting a signal is formed. A printed wiring board may be used. Conventionally, this wiring board is manufactured by forming a conductor film on the ceramics substrate by plating, etc., but conventionally, by performing chemical etching treatment, seeding treatment and then chemical plating on the ceramics substrate, The conductor film was formed. Further, when forming a thick conductor film in a short time, electrolytic plating is performed using the conductor formed by chemical plating as an electrode. After forming the conductor film in this manner, a resist is formed so that only the unnecessary portion is exposed, and the unnecessary portion is removed by etching to obtain a desired conductor pattern.
【0003】[0003]
【発明が解決しようとする課題】上記従来の方法には次
のような問題があった。 (1)電気めっきを行うために必要な下地電極を化学め
っきによって形成するために、あらかじめ基板に対して
ケミカルエッチング処理、シーディング処理といった前
処理が必要である。 (2)化学めっきによって下地電極を形成するのに時間
がかかる。 (3)化学めっきには選択性がないために、基板全面に
導体膜が付着し、これを後に除去しなければならないた
め、材料の無駄が多い。The above-mentioned conventional method has the following problems. (1) In order to form a base electrode required for electroplating by chemical plating, pretreatment such as chemical etching treatment or seeding treatment is necessary for the substrate in advance. (2) It takes time to form the base electrode by chemical plating. (3) Since the chemical plating has no selectivity, a conductive film adheres to the entire surface of the substrate and must be removed later, which results in a large waste of materials.
【0004】本発明は、上記事情に鑑み、電気めっきに
必要な下地電極を容易に形成することにより回路基板を
低コストに製造することのできる回路基板の製造方法を
提供することを目的とする。In view of the above circumstances, it is an object of the present invention to provide a method for manufacturing a circuit board, which allows a circuit board to be manufactured at low cost by easily forming a base electrode required for electroplating. .
【0005】[0005]
【課題を解決するための手段】上記目的を達成するため
の本発明は、セラミックス基板上に導体膜が形成されて
なる回路基板を製造する回路基板の製造方法において、
セラミックス基板上に有機金属ペーストを塗布して焼成
し、この焼成により形成された有機金属膜を電極として
用い、電気めっき法により、その有機金属膜上に導体膜
を形成することを特徴とするものである。The present invention for achieving the above object provides a circuit board manufacturing method for manufacturing a circuit board in which a conductor film is formed on a ceramics substrate.
Characterized in that an organometallic paste is applied on a ceramic substrate and fired, and the organometallic film formed by this firing is used as an electrode to form a conductor film on the organometallic film by electroplating. Is.
【0006】ここで、セラミックス基板上に、スクリー
ン印刷法を用いて、有機金属ペーストを所望のパターン
に塗布することが好ましい。また、本発明の一態様とし
て、セラミックス基板上に導体膜が形成されてなる回路
基板を製造する回路基板の製造方法において、セラミッ
クス基板上に、金を金属成分とする有機金属ペーストを
塗布して焼成し、この焼成により形成された有機金属膜
上に、所望領域が露出したレジストを形成し、前記有機
金属膜を電極として用いて、電気めっき法により、その
有機金属膜の上記所望領域上に銅の導体膜を形成し、前
記レジストを剥離し、よう素−よう化カリウム溶液中に
浸漬することにより、上記所望領域を除く領域に形成さ
れた有機金属膜を取り除く方法を採用してもよい。Here, it is preferable to apply the organometallic paste in a desired pattern on the ceramic substrate by screen printing. Further, as one aspect of the present invention, in a circuit board manufacturing method for manufacturing a circuit board in which a conductor film is formed on a ceramics substrate, an organic metal paste containing gold as a metal component is applied onto the ceramics substrate. By firing, a resist having a desired region exposed is formed on the organometallic film formed by this firing, and the organometallic film is used as an electrode on the desired region of the organometallic film by electroplating. A method of forming a copper conductor film, removing the resist, and immersing the resist film in an iodine-potassium iodide solution to remove the organometallic film formed in the region other than the desired region may be adopted. .
【0007】[0007]
【作用】有機金属ペーストは、セラミックス基板上に緻
密な膜を形成するために開発され、市販されているもの
である。従って、この材料を用いるとセラミックス基板
上に下地電極を形成するための特別な前処理は必要な
い。市販の有機金属ペーストにはスクリーン印刷にて塗
布することができるものがある。これを用いてあらかじ
め導体が不要な部分には塗布せず、しかも電気めっきに
必要な全てのパターンの電気的な持続を得ることが可能
となる。FUNCTION The organometallic paste is developed and commercially available for forming a dense film on a ceramic substrate. Therefore, when this material is used, no special pretreatment is required to form the base electrode on the ceramic substrate. Some commercially available organometallic pastes can be applied by screen printing. By using this, it is possible to obtain the electrical continuity of all the patterns required for electroplating without applying the conductor in advance to the unnecessary portions.
【0008】また、金の下地電極上に導体が必要な部分
のみが露出するようなレジストを設け、これに電気めっ
きによる銅導体の厚付けを行う。レジストを剥離後、よ
う素−よう化カリウム溶液に浸漬することにより、下地
電極の不要部分が除去されて所望の導体パターンが得ら
れる。このようなことから、回路基板を低コストにて製
造することができる。Further, a resist is formed on the gold base electrode so that only a necessary portion of the conductor is exposed, and a copper conductor is thickened by electroplating. After the resist is peeled off, it is immersed in an iodine-potassium iodide solution to remove unnecessary portions of the base electrode and obtain a desired conductor pattern. Because of this, the circuit board can be manufactured at low cost.
【0009】[0009]
【実施例】以下、本発明の実施例について説明する。図
1は、本発明の回路基板の製造方法の一実施例の各工程
を表す、回路基板の模式的斜視図である。50.8×5
0.8mm、厚み0.635mmのアルミナ基板10上
に、スクリーン印刷法を用いて、導体の不要な部分を除
き且つ全ての導体パターンを接続するように有機金属ペ
ースト12(GB−1003;田中貴金属インターナシ
ョナル株式会社製)を塗布した。これを乾燥機にて12
0℃10分間乾燥し、ベルト式連続焼成炉にて大気中、
810℃、5分の条件で焼成し、厚み約0.7μmの金
導体12を形成した(図1(A))。EXAMPLES Examples of the present invention will be described below. FIG. 1 is a schematic perspective view of a circuit board showing each step of an embodiment of a method for manufacturing a circuit board of the present invention. 50.8 x 5
Organometallic paste 12 (GB-1003; Tanaka Kikinzoku Co., Ltd.) was applied on an alumina substrate 10 having a thickness of 0.8 mm and a thickness of 0.635 mm by screen printing so as to connect all conductor patterns except unnecessary portions of the conductor. International Co., Ltd.) was applied. This in a dryer 12
Dry at 0 ° C for 10 minutes, and in a belt-type continuous firing furnace in air,
Firing was performed under conditions of 810 ° C. and 5 minutes to form a gold conductor 12 having a thickness of about 0.7 μm (FIG. 1 (A)).
【0010】上記のようにして形成された金導体12上
に感光性ドライフィルムを貼り、写真法を用いて金導体
12の必要な部分のみが露出するようなレジスト14を
形成した(図1(B))。その後、レジスト14の形成
されたアルミナ基板10に、硫酸銅200g/リット
ル、電流密度33mA/cm2 の条件で銅の電解めっき
を行って、必要な部分のみに厚み約35μmの銅導体膜
16を形成した(図1(C)))。A photosensitive dry film was adhered on the gold conductor 12 formed as described above, and a resist 14 was formed by a photographic method so that only a necessary portion of the gold conductor 12 was exposed (see FIG. 1 ( B)). Then, on the alumina substrate 10 on which the resist 14 is formed, electrolytic plating of copper is performed under the conditions of copper sulfate of 200 g / liter and current density of 33 mA / cm 2 , and a copper conductor film 16 having a thickness of about 35 μm is formed only on a necessary portion. Formed (FIG. 1 (C))).
【0011】その後、レジスト14を剥離し、レジスト
14が剥離されたアルミナ基板10を300ccの水に
よう素200g、よう化カリウム100gを溶解した溶
液中に30秒間浸漬して不要な下地電極を除去し、所望
の導体パターンを得た(図1(D))。After that, the resist 14 is peeled off, and the alumina substrate 10 from which the resist 14 is peeled off is dipped in a solution of 300 cc of water containing 200 g of iodine and 100 g of potassium iodide for 30 seconds to remove unnecessary base electrodes. Then, a desired conductor pattern was obtained (FIG. 1 (D)).
【0012】[0012]
【発明の効果】以上説明したように本発明は、セラミッ
クス基板上に有機金属ペーストを塗布して焼成し、それ
により形成された有機金属膜を電極として電気めっきを
行うものであるため、化学めっきにより電極を形成する
従来の方法と比べ、少ない工程で導体パターンが形成さ
れ、これにより回路基板が低コストに製造される。As described above, according to the present invention, the organic metal paste is applied on the ceramic substrate and fired, and electroplating is performed using the organic metal film formed thereby as an electrode. The conductive pattern is formed in a smaller number of steps as compared with the conventional method of forming an electrode by the method, whereby the circuit board is manufactured at low cost.
【図1】本発明の回路基板の製造方法の一実施例の各工
程を表す、回路基板の模式的斜視図である。FIG. 1 is a schematic perspective view of a circuit board showing each step of an embodiment of a method for manufacturing a circuit board of the present invention.
10 アルミナ基板 12 有機金属ペースト 14 レジスト 16 銅導体膜 10 Alumina substrate 12 Organic metal paste 14 Resist 16 Copper conductor film
Claims (3)
てなる回路基板を製造する回路基板の製造方法におい
て、 セラミックス基板上に有機金属ペーストを塗布して焼成
し、 この焼成により形成された有機金属膜を電極として用
い、電気めっき法により、該有機金属膜上に導体膜を形
成することを特徴とする回路基板の製造方法。1. A method of manufacturing a circuit board for manufacturing a circuit board in which a conductor film is formed on a ceramics substrate, wherein an organic metal paste is applied onto the ceramics substrate and baked, and the organic metal formed by this baking. A method for manufacturing a circuit board, which comprises using a film as an electrode and forming a conductor film on the organometallic film by electroplating.
法を用いて、有機金属ペーストを所望のパターンに塗布
することを特徴とする請求項1記載の回路基板の製造方
法。2. The method for manufacturing a circuit board according to claim 1, wherein the organometallic paste is applied in a desired pattern on the ceramic substrate by screen printing.
てなる回路基板を製造する回路基板の製造方法におい
て、 セラミックス基板上に、金を金属成分とする有機金属ペ
ーストを塗布して焼成し、 この焼成により形成された有機金属膜上に、所望領域が
露出したレジストを形成し、 前記有機金属膜を電極として用いて、電気めっき法によ
り、該有機金属膜の前記所望領域上に銅の導体膜を形成
し、 前記レジストを剥離し、 よう素−よう化カリウム溶液中に浸漬することにより、
前記所望領域を除く領域に形成された前記有機金属膜を
取り除くことを特徴とする回路基板の製造方法。3. A circuit board manufacturing method for manufacturing a circuit board in which a conductor film is formed on a ceramics substrate, wherein an organic metal paste containing gold as a metal component is applied onto the ceramics substrate and baked, A resist in which a desired region is exposed is formed on the organometallic film formed by baking, and the organometallic film is used as an electrode, and a copper conductor film is formed on the desired region of the organometallic film by electroplating. Is formed, and the resist is peeled off and immersed in an iodine-potassium iodide solution,
A method of manufacturing a circuit board, characterized in that the organometallic film formed in a region other than the desired region is removed.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP12562793A JPH06334313A (en) | 1993-05-27 | 1993-05-27 | Manufacture of circuit board |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP12562793A JPH06334313A (en) | 1993-05-27 | 1993-05-27 | Manufacture of circuit board |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH06334313A true JPH06334313A (en) | 1994-12-02 |
Family
ID=14914740
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP12562793A Withdrawn JPH06334313A (en) | 1993-05-27 | 1993-05-27 | Manufacture of circuit board |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH06334313A (en) |
-
1993
- 1993-05-27 JP JP12562793A patent/JPH06334313A/en not_active Withdrawn
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
A300 | Withdrawal of application because of no request for examination |
Free format text: JAPANESE INTERMEDIATE CODE: A300 Effective date: 20000801 |